* arm.cc: Added support for ARM group relocations.
(Target_arm::reloc_needs_sym_origin): New method. (Arm_relocate_functions::calc_grp_kn): New method. (Arm_relocate_functions::calc_grp_residual): New method. (Arm_relocate_functions::calc_grp_gn): New method. (Arm_relocate_functions::arm_grp_alu): New Method. (Arm_relocate_functions::arm_grp_ldr): New Method. (Arm_relocate_functions::arm_grp_ldrs): New Method. (Arm_relocate_functions::arm_grp_ldc): New Method. (Target_arm::Scan::local): Handle the ARM group relocations. (Target_arm::Scan::global): Likewise. (Target_arm::Relocate::relocate): Likewise. (Target_arm::Relocatable_size_for_reloc::get_size_for_reloc): Likewise.
This commit is contained in:
Ian Lance Taylor
parent
539f890d01
commit
b10d287364
@ -1,3 +1,20 @@
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2010-01-27 Viktor Kutuzov <vkutuzov@accesssoftek.com>
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* arm.cc: Added support for ARM group relocations.
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(Target_arm::reloc_needs_sym_origin): New method.
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(Arm_relocate_functions::calc_grp_kn): New method.
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(Arm_relocate_functions::calc_grp_residual): New method.
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(Arm_relocate_functions::calc_grp_gn): New method.
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(Arm_relocate_functions::arm_grp_alu): New Method.
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(Arm_relocate_functions::arm_grp_ldr): New Method.
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(Arm_relocate_functions::arm_grp_ldrs): New Method.
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(Arm_relocate_functions::arm_grp_ldc): New Method.
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(Target_arm::Scan::local): Handle the ARM group relocations.
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(Target_arm::Scan::global): Likewise.
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(Target_arm::Relocate::relocate): Likewise.
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(Target_arm::Relocatable_size_for_reloc::get_size_for_reloc):
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Likewise.
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2010-01-26 Doug Kwan <dougkwan@google.com>
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* arm.cc (set): Include.
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657
gold/arm.cc
657
gold/arm.cc
@ -1,6 +1,6 @@
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// arm.cc -- arm target support for gold.
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// Copyright 2009 Free Software Foundation, Inc.
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// Copyright 2009, 2010 Free Software Foundation, Inc.
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// Written by Doug Kwan <dougkwan@google.com> based on the i386 code
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// by Ian Lance Taylor <iant@google.com>.
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// This file also contains borrowed and adapted code from
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@ -96,48 +96,38 @@ const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
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// The arm target class.
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//
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// This is a very simple port of gold for ARM-EABI. It is intended for
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// supporting Android only for the time being. Only these relocation types
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// are supported.
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//
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// R_ARM_NONE
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// R_ARM_ABS32
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// R_ARM_ABS32_NOI
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// R_ARM_ABS16
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// R_ARM_ABS12
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// R_ARM_ABS8
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// R_ARM_THM_ABS5
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// R_ARM_BASE_ABS
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// R_ARM_REL32
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// R_ARM_THM_CALL
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// R_ARM_COPY
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// R_ARM_GLOB_DAT
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// R_ARM_BASE_PREL
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// R_ARM_JUMP_SLOT
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// R_ARM_RELATIVE
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// R_ARM_GOTOFF32
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// R_ARM_GOT_BREL
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// R_ARM_GOT_PREL
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// R_ARM_PLT32
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// R_ARM_CALL
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// R_ARM_JUMP24
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// R_ARM_TARGET1
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// R_ARM_PREL31
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// R_ARM_ABS8
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// R_ARM_MOVW_ABS_NC
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// R_ARM_MOVT_ABS
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// R_ARM_THM_MOVW_ABS_NC
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// R_ARM_THM_MOVT_ABS
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// R_ARM_MOVW_PREL_NC
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// R_ARM_MOVT_PREL
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// R_ARM_THM_MOVW_PREL_NC
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// R_ARM_THM_MOVT_PREL
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// R_ARM_V4BX
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// R_ARM_THM_JUMP6
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// R_ARM_THM_JUMP8
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// R_ARM_THM_JUMP11
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// supporting Android only for the time being.
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//
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// TODOs:
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// - Support more relocation types as needed.
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// - Support the following relocation types as needed:
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// R_ARM_SBREL32
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// R_ARM_THM_PC8
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// R_ARM_LDR_SBREL_11_0_NC
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// R_ARM_ALU_SBREL_19_12_NC
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// R_ARM_ALU_SBREL_27_20_CK
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// R_ARM_SBREL31
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// R_ARM_THM_ALU_PREL_11_0
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// R_ARM_THM_PC12
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// R_ARM_REL32_NOI
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// R_ARM_MOVW_BREL_NC
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// R_ARM_MOVT_BREL
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// R_ARM_MOVW_BREL
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// R_ARM_THM_MOVW_BREL_NC
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// R_ARM_THM_MOVT_BREL
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// R_ARM_THM_MOVW_BREL
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// R_ARM_PLT32_ABS
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// R_ARM_GOT_ABS
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// R_ARM_GOT_BREL12
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// R_ARM_GOTOFF12
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// R_ARM_TLS_GD32
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// R_ARM_TLS_LDM32
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// R_ARM_TLS_LDO32
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// R_ARM_TLS_IE32
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// R_ARM_TLS_LE32
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// R_ARM_TLS_LDO12
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// R_ARM_TLS_LE12
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// R_ARM_TLS_IE12GP
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//
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// - Make PLTs more flexible for different architecture features like
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// Thumb-2 and BE8.
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// There are probably a lot more.
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@ -2245,6 +2235,47 @@ class Target_arm : public Sized_target<32, big_endian>
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return true;
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}
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}
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// Return whether we need to calculate the addressing origin of
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// the output segment defining the symbol - B(S).
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static bool
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reloc_needs_sym_origin(unsigned int r_type)
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{
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switch (r_type)
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{
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case elfcpp::R_ARM_SBREL32:
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case elfcpp::R_ARM_BASE_PREL:
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case elfcpp::R_ARM_BASE_ABS:
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case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
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case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
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case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
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case elfcpp::R_ARM_SBREL31:
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case elfcpp::R_ARM_ALU_SB_G0_NC:
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case elfcpp::R_ARM_ALU_SB_G0:
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case elfcpp::R_ARM_ALU_SB_G1_NC:
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case elfcpp::R_ARM_ALU_SB_G1:
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case elfcpp::R_ARM_ALU_SB_G2:
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case elfcpp::R_ARM_LDR_SB_G0:
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case elfcpp::R_ARM_LDR_SB_G1:
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case elfcpp::R_ARM_LDR_SB_G2:
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case elfcpp::R_ARM_LDRS_SB_G0:
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case elfcpp::R_ARM_LDRS_SB_G1:
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case elfcpp::R_ARM_LDRS_SB_G2:
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case elfcpp::R_ARM_LDC_SB_G0:
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case elfcpp::R_ARM_LDC_SB_G1:
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case elfcpp::R_ARM_LDC_SB_G2:
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case elfcpp::R_ARM_MOVW_BREL_NC:
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case elfcpp::R_ARM_MOVT_BREL:
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case elfcpp::R_ARM_MOVW_BREL:
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case elfcpp::R_ARM_THM_MOVW_BREL_NC:
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case elfcpp::R_ARM_THM_MOVT_BREL:
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case elfcpp::R_ARM_THM_MOVW_BREL:
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return true;
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default:
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return false;
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}
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}
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};
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// A class which returns the size required for a relocation type,
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@ -2557,6 +2588,66 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian>
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return val;
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}
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// Calculate the smallest constant Kn for the specified residual.
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// (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
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static uint32_t
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calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
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{
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int32_t msb;
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if (residual == 0)
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return 0;
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// Determine the most significant bit in the residual and
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// align the resulting value to a 2-bit boundary.
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for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
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;
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// The desired shift is now (msb - 6), or zero, whichever
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// is the greater.
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return (((msb - 6) < 0) ? 0 : (msb - 6));
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}
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// Calculate the final residual for the specified group index.
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// If the passed group index is less than zero, the method will return
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// the value of the specified residual without any change.
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// (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
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static typename elfcpp::Swap<32, big_endian>::Valtype
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calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
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const int group)
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{
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for (int n = 0; n <= group; n++)
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{
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// Calculate which part of the value to mask.
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uint32_t shift = calc_grp_kn(residual);
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// Calculate the residual for the next time around.
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residual &= ~(residual & (0xff << shift));
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}
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return residual;
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}
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// Calculate the value of Gn for the specified group index.
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// We return it in the form of an encoded constant-and-rotation.
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// (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
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static typename elfcpp::Swap<32, big_endian>::Valtype
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calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
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const int group)
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{
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typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
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uint32_t shift = 0;
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for (int n = 0; n <= group; n++)
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{
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// Calculate which part of the value to mask.
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shift = calc_grp_kn(residual);
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// Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
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gn = residual & (0xff << shift);
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// Calculate the residual for the next time around.
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residual &= ~gn;
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}
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// Return Gn in the form of an encoded constant-and-rotation.
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return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
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}
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// Handle ARM long branches.
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static typename This::Status
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arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
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@ -3181,6 +3272,177 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian>
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elfcpp::Swap<32, big_endian>::writeval(wv, val);
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return This::STATUS_OKAY;
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}
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// R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
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// R_ARM_ALU_PC_G0: ((S + A) | T) - P
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// R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
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// R_ARM_ALU_PC_G1: ((S + A) | T) - P
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// R_ARM_ALU_PC_G2: ((S + A) | T) - P
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// R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
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// R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
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// R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
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// R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
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// R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
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static inline typename This::Status
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arm_grp_alu(unsigned char* view,
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const Sized_relobj<32, big_endian>* object,
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const Symbol_value<32>* psymval,
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const int group,
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Arm_address address,
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Arm_address thumb_bit,
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bool check_overflow)
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{
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typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
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Valtype* wv = reinterpret_cast<Valtype*>(view);
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Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
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// ALU group relocations are allowed only for the ADD/SUB instructions.
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// (0x00800000 - ADD, 0x00400000 - SUB)
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const Valtype opcode = insn & 0x01e00000;
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if (opcode != 0x00800000 && opcode != 0x00400000)
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return This::STATUS_BAD_RELOC;
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// Determine a sign for the addend.
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const int sign = (opcode == 0x00800000) ? 1 : -1;
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// shifter = rotate_imm * 2
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const uint32_t shifter = (insn & 0xf00) >> 7;
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// Initial addend value.
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int32_t addend = insn & 0xff;
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// Rotate addend right by shifter.
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addend = (addend >> shifter) | (addend << (32 - shifter));
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// Apply a sign to the added.
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addend *= sign;
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int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
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Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
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// Check for overflow if required
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if (check_overflow
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&& (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
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return This::STATUS_OVERFLOW;
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// Mask out the value and the ADD/SUB part of the opcode; take care
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// not to destroy the S bit.
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insn &= 0xff1ff000;
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// Set the opcode according to whether the value to go in the
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// place is negative.
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insn |= ((x < 0) ? 0x00400000 : 0x00800000);
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// Encode the offset (encoded Gn).
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insn |= gn;
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elfcpp::Swap<32, big_endian>::writeval(wv, insn);
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return This::STATUS_OKAY;
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}
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// R_ARM_LDR_PC_G0: S + A - P
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// R_ARM_LDR_PC_G1: S + A - P
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// R_ARM_LDR_PC_G2: S + A - P
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// R_ARM_LDR_SB_G0: S + A - B(S)
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// R_ARM_LDR_SB_G1: S + A - B(S)
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// R_ARM_LDR_SB_G2: S + A - B(S)
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static inline typename This::Status
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arm_grp_ldr(unsigned char* view,
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const Sized_relobj<32, big_endian>* object,
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const Symbol_value<32>* psymval,
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const int group,
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Arm_address address)
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{
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typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
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Valtype* wv = reinterpret_cast<Valtype*>(view);
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Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
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const int sign = (insn & 0x00800000) ? 1 : -1;
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int32_t addend = (insn & 0xfff) * sign;
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int32_t x = (psymval->value(object, addend) - address);
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// Calculate the relevant G(n-1) value to obtain this stage residual.
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Valtype residual =
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Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
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if (residual >= 0x1000)
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return This::STATUS_OVERFLOW;
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// Mask out the value and U bit.
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insn &= 0xff7ff000;
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// Set the U bit for non-negative values.
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if (x >= 0)
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insn |= 0x00800000;
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insn |= residual;
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elfcpp::Swap<32, big_endian>::writeval(wv, insn);
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return This::STATUS_OKAY;
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}
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// R_ARM_LDRS_PC_G0: S + A - P
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// R_ARM_LDRS_PC_G1: S + A - P
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// R_ARM_LDRS_PC_G2: S + A - P
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// R_ARM_LDRS_SB_G0: S + A - B(S)
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// R_ARM_LDRS_SB_G1: S + A - B(S)
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// R_ARM_LDRS_SB_G2: S + A - B(S)
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static inline typename This::Status
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arm_grp_ldrs(unsigned char* view,
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const Sized_relobj<32, big_endian>* object,
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const Symbol_value<32>* psymval,
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const int group,
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Arm_address address)
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{
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typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
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Valtype* wv = reinterpret_cast<Valtype*>(view);
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Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
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const int sign = (insn & 0x00800000) ? 1 : -1;
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int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
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int32_t x = (psymval->value(object, addend) - address);
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// Calculate the relevant G(n-1) value to obtain this stage residual.
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Valtype residual =
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Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
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if (residual >= 0x100)
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return This::STATUS_OVERFLOW;
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// Mask out the value and U bit.
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insn &= 0xff7ff0f0;
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// Set the U bit for non-negative values.
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if (x >= 0)
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insn |= 0x00800000;
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insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
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elfcpp::Swap<32, big_endian>::writeval(wv, insn);
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return This::STATUS_OKAY;
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}
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// R_ARM_LDC_PC_G0: S + A - P
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// R_ARM_LDC_PC_G1: S + A - P
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// R_ARM_LDC_PC_G2: S + A - P
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// R_ARM_LDC_SB_G0: S + A - B(S)
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// R_ARM_LDC_SB_G1: S + A - B(S)
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// R_ARM_LDC_SB_G2: S + A - B(S)
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static inline typename This::Status
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arm_grp_ldc(unsigned char* view,
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const Sized_relobj<32, big_endian>* object,
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const Symbol_value<32>* psymval,
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const int group,
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Arm_address address)
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{
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typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
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Valtype* wv = reinterpret_cast<Valtype*>(view);
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Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
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const int sign = (insn & 0x00800000) ? 1 : -1;
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int32_t addend = ((insn & 0xff) << 2) * sign;
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int32_t x = (psymval->value(object, addend) - address);
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// Calculate the relevant G(n-1) value to obtain this stage residual.
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Valtype residual =
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Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
|
||||
if ((residual & 0x3) != 0 || residual >= 0x400)
|
||||
return This::STATUS_OVERFLOW;
|
||||
|
||||
// Mask out the value and U bit.
|
||||
insn &= 0xff7fff00;
|
||||
// Set the U bit for non-negative values.
|
||||
if (x >= 0)
|
||||
insn |= 0x00800000;
|
||||
insn |= (residual >> 2);
|
||||
|
||||
elfcpp::Swap<32, big_endian>::writeval(wv, insn);
|
||||
return This::STATUS_OKAY;
|
||||
}
|
||||
};
|
||||
|
||||
// Relocate ARM long branches. This handles relocation types
|
||||
@ -6256,6 +6518,34 @@ Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
|
||||
case elfcpp::R_ARM_THM_JUMP8:
|
||||
case elfcpp::R_ARM_THM_JUMP11:
|
||||
case elfcpp::R_ARM_V4BX:
|
||||
case elfcpp::R_ARM_ALU_PC_G0_NC:
|
||||
case elfcpp::R_ARM_ALU_PC_G0:
|
||||
case elfcpp::R_ARM_ALU_PC_G1_NC:
|
||||
case elfcpp::R_ARM_ALU_PC_G1:
|
||||
case elfcpp::R_ARM_ALU_PC_G2:
|
||||
case elfcpp::R_ARM_ALU_SB_G0_NC:
|
||||
case elfcpp::R_ARM_ALU_SB_G0:
|
||||
case elfcpp::R_ARM_ALU_SB_G1_NC:
|
||||
case elfcpp::R_ARM_ALU_SB_G1:
|
||||
case elfcpp::R_ARM_ALU_SB_G2:
|
||||
case elfcpp::R_ARM_LDR_PC_G0:
|
||||
case elfcpp::R_ARM_LDR_PC_G1:
|
||||
case elfcpp::R_ARM_LDR_PC_G2:
|
||||
case elfcpp::R_ARM_LDR_SB_G0:
|
||||
case elfcpp::R_ARM_LDR_SB_G1:
|
||||
case elfcpp::R_ARM_LDR_SB_G2:
|
||||
case elfcpp::R_ARM_LDRS_PC_G0:
|
||||
case elfcpp::R_ARM_LDRS_PC_G1:
|
||||
case elfcpp::R_ARM_LDRS_PC_G2:
|
||||
case elfcpp::R_ARM_LDRS_SB_G0:
|
||||
case elfcpp::R_ARM_LDRS_SB_G1:
|
||||
case elfcpp::R_ARM_LDRS_SB_G2:
|
||||
case elfcpp::R_ARM_LDC_PC_G0:
|
||||
case elfcpp::R_ARM_LDC_PC_G1:
|
||||
case elfcpp::R_ARM_LDC_PC_G2:
|
||||
case elfcpp::R_ARM_LDC_SB_G0:
|
||||
case elfcpp::R_ARM_LDC_SB_G1:
|
||||
case elfcpp::R_ARM_LDC_SB_G2:
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_GOTOFF32:
|
||||
@ -6388,6 +6678,34 @@ Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
|
||||
case elfcpp::R_ARM_THM_JUMP8:
|
||||
case elfcpp::R_ARM_THM_JUMP11:
|
||||
case elfcpp::R_ARM_V4BX:
|
||||
case elfcpp::R_ARM_ALU_PC_G0_NC:
|
||||
case elfcpp::R_ARM_ALU_PC_G0:
|
||||
case elfcpp::R_ARM_ALU_PC_G1_NC:
|
||||
case elfcpp::R_ARM_ALU_PC_G1:
|
||||
case elfcpp::R_ARM_ALU_PC_G2:
|
||||
case elfcpp::R_ARM_ALU_SB_G0_NC:
|
||||
case elfcpp::R_ARM_ALU_SB_G0:
|
||||
case elfcpp::R_ARM_ALU_SB_G1_NC:
|
||||
case elfcpp::R_ARM_ALU_SB_G1:
|
||||
case elfcpp::R_ARM_ALU_SB_G2:
|
||||
case elfcpp::R_ARM_LDR_PC_G0:
|
||||
case elfcpp::R_ARM_LDR_PC_G1:
|
||||
case elfcpp::R_ARM_LDR_PC_G2:
|
||||
case elfcpp::R_ARM_LDR_SB_G0:
|
||||
case elfcpp::R_ARM_LDR_SB_G1:
|
||||
case elfcpp::R_ARM_LDR_SB_G2:
|
||||
case elfcpp::R_ARM_LDRS_PC_G0:
|
||||
case elfcpp::R_ARM_LDRS_PC_G1:
|
||||
case elfcpp::R_ARM_LDRS_PC_G2:
|
||||
case elfcpp::R_ARM_LDRS_SB_G0:
|
||||
case elfcpp::R_ARM_LDRS_SB_G1:
|
||||
case elfcpp::R_ARM_LDRS_SB_G2:
|
||||
case elfcpp::R_ARM_LDC_PC_G0:
|
||||
case elfcpp::R_ARM_LDC_PC_G1:
|
||||
case elfcpp::R_ARM_LDC_PC_G2:
|
||||
case elfcpp::R_ARM_LDC_SB_G0:
|
||||
case elfcpp::R_ARM_LDC_SB_G1:
|
||||
case elfcpp::R_ARM_LDC_SB_G2:
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_THM_ABS5:
|
||||
@ -6881,6 +7199,28 @@ Target_arm<big_endian>::Relocate::relocate(
|
||||
// a local symbol.
|
||||
unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
|
||||
|
||||
// Get the addressing origin of the output segment defining the
|
||||
// symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
|
||||
Arm_address sym_origin = 0;
|
||||
if (Relocate::reloc_needs_sym_origin(r_type))
|
||||
{
|
||||
if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
|
||||
// R_ARM_BASE_ABS with the NULL symbol will give the
|
||||
// absolute address of the GOT origin (GOT_ORG) (see ARM IHI
|
||||
// 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
|
||||
sym_origin = target->got_plt_section()->address();
|
||||
else if (gsym == NULL)
|
||||
sym_origin = 0;
|
||||
else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
|
||||
sym_origin = gsym->output_segment()->vaddr();
|
||||
else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
|
||||
sym_origin = gsym->output_data()->address();
|
||||
|
||||
// TODO: Assumes the segment base to be zero for the global symbols
|
||||
// till the proper support for the segment-base-relative addressing
|
||||
// will be implemented. This is consistent with GNU ld.
|
||||
}
|
||||
|
||||
typename Arm_relocate_functions::Status reloc_status =
|
||||
Arm_relocate_functions::STATUS_OKAY;
|
||||
switch (r_type)
|
||||
@ -7026,23 +7366,9 @@ Target_arm<big_endian>::Relocate::relocate(
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_BASE_PREL:
|
||||
{
|
||||
uint32_t origin;
|
||||
// Get the addressing origin of the output segment defining the
|
||||
// symbol gsym (AAELF 4.6.1.2 Relocation types)
|
||||
gold_assert(gsym != NULL);
|
||||
if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
|
||||
origin = gsym->output_segment()->vaddr();
|
||||
else if (gsym->source () == Symbol::IN_OUTPUT_DATA)
|
||||
origin = gsym->output_data()->address();
|
||||
else
|
||||
{
|
||||
gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
|
||||
_("cannot find origin of R_ARM_BASE_PREL"));
|
||||
return true;
|
||||
}
|
||||
reloc_status = Arm_relocate_functions::base_prel(view, origin, address);
|
||||
}
|
||||
reloc_status =
|
||||
Arm_relocate_functions::base_prel(view, sym_origin, address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_BASE_ABS:
|
||||
@ -7051,26 +7377,7 @@ Target_arm<big_endian>::Relocate::relocate(
|
||||
output_section))
|
||||
break;
|
||||
|
||||
uint32_t origin;
|
||||
// Get the addressing origin of the output segment defining
|
||||
// the symbol gsym (AAELF 4.6.1.2 Relocation types).
|
||||
if (gsym == NULL)
|
||||
// R_ARM_BASE_ABS with the NULL symbol will give the
|
||||
// absolute address of the GOT origin (GOT_ORG) (see ARM IHI
|
||||
// 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
|
||||
origin = target->got_plt_section()->address();
|
||||
else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
|
||||
origin = gsym->output_segment()->vaddr();
|
||||
else if (gsym->source () == Symbol::IN_OUTPUT_DATA)
|
||||
origin = gsym->output_data()->address();
|
||||
else
|
||||
{
|
||||
gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
|
||||
_("cannot find origin of R_ARM_BASE_ABS"));
|
||||
return true;
|
||||
}
|
||||
|
||||
reloc_status = Arm_relocate_functions::base_abs(view, origin);
|
||||
reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -7162,6 +7469,174 @@ Target_arm<big_endian>::Relocate::relocate(
|
||||
}
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_PC_G0_NC:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
|
||||
address, thumb_bit, false);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_PC_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
|
||||
address, thumb_bit, true);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_PC_G1_NC:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
|
||||
address, thumb_bit, false);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_PC_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
|
||||
address, thumb_bit, true);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_PC_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2,
|
||||
address, thumb_bit, true);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_SB_G0_NC:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
|
||||
sym_origin, thumb_bit, false);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_SB_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 0,
|
||||
sym_origin, thumb_bit, true);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_SB_G1_NC:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
|
||||
sym_origin, thumb_bit, false);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_SB_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 1,
|
||||
sym_origin, thumb_bit, true);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_ALU_SB_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_alu(view, object, psymval, 2,
|
||||
sym_origin, thumb_bit, true);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDR_PC_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDR_PC_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDR_PC_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDR_SB_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 0,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDR_SB_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 1,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDR_SB_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 2,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDRS_PC_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDRS_PC_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDRS_PC_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDRS_SB_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 0,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDRS_SB_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 1,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDRS_SB_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 2,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDC_PC_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDC_PC_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDC_PC_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2,
|
||||
address);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDC_SB_G0:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 0,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDC_SB_G1:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 1,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_LDC_SB_G2:
|
||||
reloc_status =
|
||||
Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 2,
|
||||
sym_origin);
|
||||
break;
|
||||
|
||||
case elfcpp::R_ARM_TARGET1:
|
||||
// This should have been mapped to another type already.
|
||||
// Fall through.
|
||||
@ -7311,6 +7786,34 @@ Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
|
||||
case elfcpp::R_ARM_THM_MOVW_PREL_NC:
|
||||
case elfcpp::R_ARM_THM_MOVT_PREL:
|
||||
case elfcpp::R_ARM_V4BX:
|
||||
case elfcpp::R_ARM_ALU_PC_G0_NC:
|
||||
case elfcpp::R_ARM_ALU_PC_G0:
|
||||
case elfcpp::R_ARM_ALU_PC_G1_NC:
|
||||
case elfcpp::R_ARM_ALU_PC_G1:
|
||||
case elfcpp::R_ARM_ALU_PC_G2:
|
||||
case elfcpp::R_ARM_ALU_SB_G0_NC:
|
||||
case elfcpp::R_ARM_ALU_SB_G0:
|
||||
case elfcpp::R_ARM_ALU_SB_G1_NC:
|
||||
case elfcpp::R_ARM_ALU_SB_G1:
|
||||
case elfcpp::R_ARM_ALU_SB_G2:
|
||||
case elfcpp::R_ARM_LDR_PC_G0:
|
||||
case elfcpp::R_ARM_LDR_PC_G1:
|
||||
case elfcpp::R_ARM_LDR_PC_G2:
|
||||
case elfcpp::R_ARM_LDR_SB_G0:
|
||||
case elfcpp::R_ARM_LDR_SB_G1:
|
||||
case elfcpp::R_ARM_LDR_SB_G2:
|
||||
case elfcpp::R_ARM_LDRS_PC_G0:
|
||||
case elfcpp::R_ARM_LDRS_PC_G1:
|
||||
case elfcpp::R_ARM_LDRS_PC_G2:
|
||||
case elfcpp::R_ARM_LDRS_SB_G0:
|
||||
case elfcpp::R_ARM_LDRS_SB_G1:
|
||||
case elfcpp::R_ARM_LDRS_SB_G2:
|
||||
case elfcpp::R_ARM_LDC_PC_G0:
|
||||
case elfcpp::R_ARM_LDC_PC_G1:
|
||||
case elfcpp::R_ARM_LDC_PC_G2:
|
||||
case elfcpp::R_ARM_LDC_SB_G0:
|
||||
case elfcpp::R_ARM_LDC_SB_G1:
|
||||
case elfcpp::R_ARM_LDC_SB_G2:
|
||||
return 4;
|
||||
|
||||
case elfcpp::R_ARM_TARGET1:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user