* mips-tdep.c (mips16_decode_reg_save): Distinguish between
sd and sw instructions correctly. (heuristic_proc_start): Add support for MIPS16. (mips16_get_imm, mips16_heuristic_proc_desc, mips32_heuristic_proc_desc): New helper functions for heuristic_proc_desc. (heuristic_proc_desc): Rewrite and reorganize to support MIPS16. (mips_push_arguments): Don't align small arguments in EABI. (mips32_skip_prologue): Attempt to shrink code size a little.
This commit is contained in:
Mark Alexander
parent
7b43bcb28c
commit
b348b9fd0e
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@ -1,3 +1,15 @@
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Mon Feb 03 17:57:58 1997 Mark Alexander <marka@cygnus.com>
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* mips-tdep.c (mips16_decode_reg_save): Distinguish between
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sd and sw instructions correctly.
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(heuristic_proc_start): Add support for MIPS16.
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(mips16_get_imm, mips16_heuristic_proc_desc,
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mips32_heuristic_proc_desc): New helper functions for
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heuristic_proc_desc.
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(heuristic_proc_desc): Rewrite and reorganize to support MIPS16.
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(mips_push_arguments): Don't align small arguments in EABI.
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(mips32_skip_prologue): Attempt to shrink code size a little.
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start-sanitize-m32r
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Mon Feb 3 11:06:05 1997 Michael Snyder <msnyder@cleaver.cygnus.com>
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363
gdb/mips-tdep.c
363
gdb/mips-tdep.c
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@ -295,10 +295,14 @@ mips16_decode_reg_save (inst, gen_mask)
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t_inst inst;
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unsigned long *gen_mask;
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{
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if ((inst & 0xf800) == 0xd000 /* sw reg,n($sp) */
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|| (inst & 0xff00) == 0xf900) /* sd reg,n($sp) */
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if ((inst & 0xf800) == 0xd000) /* sw reg,n($sp) */
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{
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int reg = mips16_to_32_reg[(inst & 0xf00) >> 8];
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int reg = mips16_to_32_reg[(inst & 0x700) >> 8];
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*gen_mask |= (1 << reg);
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}
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else if ((inst & 0xff00) == 0xf900) /* sd reg,n($sp) */
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{
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int reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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*gen_mask |= (1 << reg);
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}
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else if ((inst & 0xff00) == 0x6200 /* sw $ra,n($sp) */
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@ -553,6 +557,7 @@ heuristic_proc_start(pc)
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CORE_ADDR start_pc = pc;
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CORE_ADDR fence = start_pc - heuristic_fence_post;
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int instlen;
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int seen_adjsp = 0;
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if (start_pc == 0) return 0;
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@ -597,12 +602,23 @@ Otherwise, you told GDB there was a function where there isn't one, or\n\
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}
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else if (start_pc & 1)
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{
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/* On MIPS16, look for the 'entry' pseudo-op at the start
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of a function. This is only going to work if the program
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was compiled with -mentry. Otherwise, there's no reliable
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way of finding the start of a function. */
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if ((read_memory_integer (start_pc & ~1, 2) & 0xf81f)== 0xe809)
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return start_pc;
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/* On MIPS16, any one of the following is likely to be the
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start of a function:
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entry
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addiu sp,-n
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daddiu sp,-n
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extend -n followed by 'addiu sp,+n' or 'daddiu sp,+n' */
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unsigned short inst = read_memory_integer (start_pc & ~1, 2);
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if (((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700) /* entry */
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|| (inst & 0xff80) == 0x6380 /* addiu sp,-n */
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|| (inst & 0xff80) == 0xfb80 /* daddiu sp,-n */
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|| ((inst & 0xf810) == 0xf010 && seen_adjsp)) /* extend -n */
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break;
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else if ((inst & 0xff00) == 0x6300 /* addiu sp */
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|| (inst & 0xff00) == 0xfb00) /* daddiu sp */
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seen_adjsp = 1;
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else
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seen_adjsp = 0;
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}
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else if (ABOUT_TO_RETURN(start_pc))
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{
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@ -618,71 +634,227 @@ Otherwise, you told GDB there was a function where there isn't one, or\n\
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return start_pc;
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}
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static mips_extra_func_info_t
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heuristic_proc_desc(start_pc, limit_pc, next_frame)
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/* Fetch the immediate value from the current instruction.
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If the previous instruction was an EXTEND, use it to extend
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the upper bits of the immediate value. This is a helper function
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for mips16_heuristic_proc_desc. */
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static int
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mips16_get_imm (prev_inst, inst, nbits, scale, is_signed)
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unsigned short prev_inst; /* previous instruction */
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unsigned short inst; /* current current instruction */
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int nbits; /* number of bits in imm field */
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int scale; /* scale factor to be applied to imm */
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int is_signed; /* is the imm field signed? */
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{
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int offset;
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if ((prev_inst & 0xf800) == 0xf000) /* prev instruction was EXTEND? */
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{
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offset = ((prev_inst & 0x1f) << 11) | (prev_inst & 0x7e00);
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if (offset & 0x8000) /* check for negative extend */
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offset = 0 - (0x10000 - (offset & 0xffff));
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return offset | (inst & 0x1f);
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}
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else
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{
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int max_imm = 1 << nbits;
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int mask = max_imm - 1;
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int sign_bit = max_imm >> 1;
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offset = inst & mask;
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if (is_signed && (offset & sign_bit))
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offset = 0 - (max_imm - offset);
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return offset * scale;
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}
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}
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/* Fill in values in temp_proc_desc based on the MIPS16 instruction
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stream from start_pc to limit_pc. */
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static void
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mips16_heuristic_proc_desc(start_pc, limit_pc, next_frame, sp)
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CORE_ADDR start_pc, limit_pc;
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struct frame_info *next_frame;
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CORE_ADDR sp;
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{
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CORE_ADDR sp = read_next_frame_reg (next_frame, SP_REGNUM);
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CORE_ADDR cur_pc;
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unsigned long frame_size;
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unsigned long r30_frame_size = 0;
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int has_frame_reg = 0;
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CORE_ADDR reg30 = 0; /* Value of $r30. Used by gcc for frame-pointer */
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unsigned long reg_mask = 0;
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CORE_ADDR frame_addr = 0; /* Value of $r17, used as frame pointer */
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unsigned short prev_inst = 0; /* saved copy of previous instruction */
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unsigned inst = 0; /* current instruction */
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if (start_pc == 0) return NULL;
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memset (&temp_proc_desc, '\0', sizeof(temp_proc_desc));
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memset (&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
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PROC_LOW_ADDR (&temp_proc_desc) = start_pc;
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PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
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if (start_pc + 200 < limit_pc)
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limit_pc = start_pc + 200;
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restart:
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frame_size = 0;
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for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSTLEN) {
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char buf[MIPS_INSTLEN];
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unsigned long word;
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int status;
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for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS16_INSTLEN)
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{
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char buf[MIPS16_INSTLEN];
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int status, reg, offset;
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status = (unsigned long) read_memory_nobpt (cur_pc, buf, MIPS_INSTLEN); /* FIXME!! */
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/* Save the previous instruction. If it's an EXTEND, we'll extract
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the immediate offset extension from it in mips16_get_imm. */
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prev_inst = inst;
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/* Fetch the instruction. */
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status = read_memory_nobpt (cur_pc & ~1, buf, MIPS16_INSTLEN);
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if (status) memory_error (status, cur_pc);
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word = (unsigned long) extract_unsigned_integer (buf, MIPS_INSTLEN); /* FIXME!! */
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inst = (unsigned short) extract_unsigned_integer (buf, MIPS16_INSTLEN);
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if ((word & 0xFFFF0000) == 0x27bd0000 /* addiu $sp,$sp,-i */
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|| (word & 0xFFFF0000) == 0x23bd0000 /* addi $sp,$sp,-i */
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|| (word & 0xFFFF0000) == 0x67bd0000) { /* daddiu $sp,$sp,-i */
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if (word & 0x8000)
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frame_size += (-word) & 0xffff;
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if ((inst & 0xff00) == 0x6300 /* addiu sp */
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|| (inst & 0xff00) == 0xfb00) /* daddiu sp */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 8, 1);
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if (offset < 0) /* negative stack adjustment? */
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PROC_FRAME_OFFSET(&temp_proc_desc) -= offset;
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else
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/* Exit loop if a positive stack adjustment is found, which
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usually means that the stack cleanup code in the function
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epilogue is reached. */
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break;
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}
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else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */
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int reg = (word & 0x001F0000) >> 16;
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reg_mask |= 1 << reg;
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temp_saved_regs.regs[reg] = sp + (word & 0xffff);
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else if ((inst & 0xf800) == 0xd000) /* sw reg,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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reg = mips16_to_32_reg[(inst & 0x700) >> 8];
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PROC_REG_MASK(&temp_proc_desc) |= (1 << reg);
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temp_saved_regs.regs[reg] = sp + offset;
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}
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else if ((word & 0xFFE00000) == 0xffa00000) { /* sd reg,offset($sp) */
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else if ((inst & 0xff00) == 0xf900) /* sd reg,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK(&temp_proc_desc) |= (1 << reg);
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temp_saved_regs.regs[reg] = sp + offset;
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}
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else if ((inst & 0xff00) == 0x6200) /* sw $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 4, 0);
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PROC_REG_MASK(&temp_proc_desc) |= (1 << 31);
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temp_saved_regs.regs[31] = sp + offset;
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}
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else if ((inst & 0xff00) == 0xfa00) /* sd $ra,n($sp) */
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{
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offset = mips16_get_imm (prev_inst, inst, 8, 8, 0);
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PROC_REG_MASK(&temp_proc_desc) |= (1 << 31);
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temp_saved_regs.regs[31] = sp + offset;
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}
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else if (inst == 0x673d) /* move $s1, $sp */
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{
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frame_addr = read_next_frame_reg(next_frame, 30);
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PROC_FRAME_REG (&temp_proc_desc) = 17;
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}
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else if ((inst & 0xFF00) == 0xd900) /* sw reg,offset($s1) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 4, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = frame_addr + offset;
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}
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else if ((inst & 0xFF00) == 0x7900) /* sd reg,offset($s1) */
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{
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offset = mips16_get_imm (prev_inst, inst, 5, 8, 0);
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reg = mips16_to_32_reg[(inst & 0xe0) >> 5];
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = frame_addr + offset;
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}
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else if ((inst & 0xf81f) == 0xe809 && (inst & 0x700) != 0x700) /* entry */
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{
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int areg_count = (inst >> 8) & 7;
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int sreg_count = (inst >> 6) & 3;
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/* The entry instruction always subtracts 32 from the SP. */
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PROC_FRAME_OFFSET(&temp_proc_desc) += 32;
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/* Check if a0-a3 were saved in the caller's argument save area. */
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for (reg = 4, offset = 32; reg < areg_count+4; reg++, offset += 4)
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{
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = sp + offset;
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}
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/* Check if the ra register was pushed on the stack. */
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offset = 28;
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if (inst & 0x20)
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{
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PROC_REG_MASK(&temp_proc_desc) |= 1 << 31;
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temp_saved_regs.regs[31] = sp + offset;
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offset -= 4;
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}
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/* Check if the s0 and s1 registers were pushed on the stack. */
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for (reg = 16; reg < sreg_count+16; reg++, offset -= 4)
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{
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = sp + offset;
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}
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}
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}
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}
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static void
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mips32_heuristic_proc_desc(start_pc, limit_pc, next_frame, sp)
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CORE_ADDR start_pc, limit_pc;
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struct frame_info *next_frame;
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CORE_ADDR sp;
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{
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CORE_ADDR cur_pc;
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CORE_ADDR frame_addr = 0; /* Value of $r30. Used by gcc for frame-pointer */
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restart:
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PROC_FRAME_OFFSET(&temp_proc_desc) = 0;
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for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSTLEN)
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{
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char buf[MIPS_INSTLEN];
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unsigned long inst, high_word, low_word;
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int status, reg;
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/* Fetch the instruction. */
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status = (unsigned long) read_memory_nobpt (cur_pc, buf, MIPS_INSTLEN);
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if (status) memory_error (status, cur_pc);
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inst = (unsigned long) extract_unsigned_integer (buf, MIPS_INSTLEN);
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/* Save some code by pre-extracting some useful fields. */
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high_word = (inst >> 16) & 0xffff;
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low_word = inst & 0xffff;
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reg = high_word & 0x1f;
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if (high_word == 0x27bd /* addiu $sp,$sp,-i */
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|| high_word == 0x23bd /* addi $sp,$sp,-i */
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|| high_word == 0x67bd) /* daddiu $sp,$sp,-i */
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{
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if (low_word & 0x8000) /* negative stack adjustment? */
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PROC_FRAME_OFFSET(&temp_proc_desc) += 0x10000 - low_word;
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else
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/* Exit loop if a positive stack adjustment is found, which
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usually means that the stack cleanup code in the function
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epilogue is reached. */
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break;
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}
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else if ((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */
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{
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = sp + low_word;
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}
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else if ((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */
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{
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/* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra,
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but the register size used is only 32 bits. Make the address
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for the saved register point to the lower 32 bits. */
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int reg = (word & 0x001F0000) >> 16;
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reg_mask |= 1 << reg;
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temp_saved_regs.regs[reg] = sp + (word & 0xffff) + 8 - MIPS_REGSIZE;
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = sp + low_word + 8 - MIPS_REGSIZE;
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}
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else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */
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else if (high_word == 0x27be) /* addiu $30,$sp,size */
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{
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/* Old gcc frame, r30 is virtual frame pointer. */
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if ((word & 0xffff) != frame_size)
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reg30 = sp + (word & 0xffff);
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else if (!has_frame_reg) {
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if (low_word != PROC_FRAME_OFFSET(&temp_proc_desc))
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frame_addr = sp + low_word;
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else if (PROC_FRAME_REG (&temp_proc_desc) == SP_REGNUM)
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{
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unsigned alloca_adjust;
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has_frame_reg = 1;
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reg30 = read_next_frame_reg(next_frame, 30);
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alloca_adjust = (unsigned)(reg30 - (sp + (word & 0xffff)));
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if (alloca_adjust > 0) {
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PROC_FRAME_REG (&temp_proc_desc) = 30;
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frame_addr = read_next_frame_reg(next_frame, 30);
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alloca_adjust = (unsigned)(frame_addr - (sp + low_word));
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if (alloca_adjust > 0)
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{
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/* FP > SP + frame_size. This may be because
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* of an alloca or somethings similar.
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* Fix sp to "pre-alloca" value, and try again.
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@ -692,15 +864,20 @@ heuristic_proc_desc(start_pc, limit_pc, next_frame)
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}
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}
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}
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else if ((word & 0xFFFFFFFB) == 0x03a0f021) { /* mov $30,$sp */
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/* move $30,$sp. With different versions of gas this will be either
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`addu $30,$sp,$zero' or `or $30,$sp,$zero' or `daddu 30,sp,$0'.
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Accept any one of these. */
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else if (inst == 0x03A0F021 || inst == 0x03a0f025 || inst == 0x03a0f02d)
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{
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/* New gcc frame, virtual frame pointer is at r30 + frame_size. */
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if (!has_frame_reg) {
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if (PROC_FRAME_REG (&temp_proc_desc) == SP_REGNUM)
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{
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unsigned alloca_adjust;
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has_frame_reg = 1;
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reg30 = read_next_frame_reg(next_frame, 30);
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r30_frame_size = frame_size;
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alloca_adjust = (unsigned)(reg30 - sp);
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if (alloca_adjust > 0) {
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PROC_FRAME_REG (&temp_proc_desc) = 30;
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frame_addr = read_next_frame_reg(next_frame, 30);
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alloca_adjust = (unsigned)(frame_addr - sp);
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if (alloca_adjust > 0)
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{
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/* FP > SP + frame_size. This may be because
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* of an alloca or somethings similar.
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* Fix sp to "pre-alloca" value, and try again.
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@ -710,22 +887,34 @@ heuristic_proc_desc(start_pc, limit_pc, next_frame)
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}
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}
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}
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else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */
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int reg = (word & 0x001F0000) >> 16;
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reg_mask |= 1 << reg;
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temp_saved_regs.regs[reg] = reg30 + (word & 0xffff);
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else if ((high_word & 0xFFE0) == 0xafc0) /* sw reg,offset($30) */
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{
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PROC_REG_MASK(&temp_proc_desc) |= 1 << reg;
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temp_saved_regs.regs[reg] = frame_addr + low_word;
|
||||
}
|
||||
}
|
||||
if (has_frame_reg) {
|
||||
PROC_FRAME_REG(&temp_proc_desc) = 30;
|
||||
PROC_FRAME_OFFSET(&temp_proc_desc) = r30_frame_size;
|
||||
}
|
||||
else {
|
||||
PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM;
|
||||
PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size;
|
||||
}
|
||||
PROC_REG_MASK(&temp_proc_desc) = reg_mask;
|
||||
PROC_PC_REG(&temp_proc_desc) = RA_REGNUM;
|
||||
}
|
||||
|
||||
static mips_extra_func_info_t
|
||||
heuristic_proc_desc(start_pc, limit_pc, next_frame)
|
||||
CORE_ADDR start_pc, limit_pc;
|
||||
struct frame_info *next_frame;
|
||||
{
|
||||
CORE_ADDR sp = read_next_frame_reg (next_frame, SP_REGNUM);
|
||||
|
||||
if (start_pc == 0) return NULL;
|
||||
memset (&temp_proc_desc, '\0', sizeof(temp_proc_desc));
|
||||
memset (&temp_saved_regs, '\0', sizeof(struct frame_saved_regs));
|
||||
PROC_LOW_ADDR (&temp_proc_desc) = start_pc;
|
||||
PROC_FRAME_REG (&temp_proc_desc) = SP_REGNUM;
|
||||
PROC_PC_REG (&temp_proc_desc) = RA_REGNUM;
|
||||
|
||||
if (start_pc + 200 < limit_pc)
|
||||
limit_pc = start_pc + 200;
|
||||
if (start_pc & 1)
|
||||
mips16_heuristic_proc_desc (start_pc, limit_pc, next_frame, sp);
|
||||
else
|
||||
mips32_heuristic_proc_desc (start_pc, limit_pc, next_frame, sp);
|
||||
return &temp_proc_desc;
|
||||
}
|
||||
|
||||
|
|
@ -1054,9 +1243,11 @@ mips_push_arguments(nargs, args, sp, struct_return, struct_addr)
|
|||
/* It's a simple argument being passed in a general
|
||||
register.
|
||||
If the argument length is smaller than the register size,
|
||||
we have to adjust the argument on big endian targets. */
|
||||
we have to adjust the argument on big endian targets.
|
||||
But don't do this adjustment on EABI targets. */
|
||||
if (TARGET_BYTE_ORDER == BIG_ENDIAN
|
||||
&& partial_len < MIPS_REGSIZE)
|
||||
&& partial_len < MIPS_REGSIZE
|
||||
&& !MIPS_EABI)
|
||||
regval <<= ((MIPS_REGSIZE - partial_len) * TARGET_CHAR_BIT);
|
||||
write_register (argreg, regval);
|
||||
argreg++;
|
||||
|
|
@ -1398,19 +1589,21 @@ mips32_skip_prologue (pc, lenient)
|
|||
{
|
||||
char buf[MIPS_INSTLEN];
|
||||
int status;
|
||||
unsigned long high_word;
|
||||
|
||||
status = read_memory_nobpt (pc, buf, MIPS_INSTLEN);
|
||||
if (status)
|
||||
memory_error (status, pc);
|
||||
inst = (unsigned long)extract_unsigned_integer (buf, MIPS_INSTLEN);
|
||||
high_word = (inst >> 16) & 0xffff;
|
||||
|
||||
#if 0
|
||||
if (lenient && is_delayed (inst))
|
||||
continue;
|
||||
#endif
|
||||
|
||||
if ((inst & 0xffff0000) == 0x27bd0000 /* addiu $sp,$sp,offset */
|
||||
|| (inst & 0xffff0000) == 0x67bd0000) /* daddiu $sp,$sp,offset */
|
||||
if (high_word == 0x27bd /* addiu $sp,$sp,offset */
|
||||
|| high_word == 0x67bd) /* daddiu $sp,$sp,offset */
|
||||
seen_sp_adjust = 1;
|
||||
else if (inst == 0x03a1e823 || /* subu $sp,$sp,$at */
|
||||
inst == 0x03a8e823) /* subu $sp,$sp,$t0 */
|
||||
|
|
@ -1434,9 +1627,9 @@ mips32_skip_prologue (pc, lenient)
|
|||
|
||||
else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */
|
||||
continue;
|
||||
else if ((inst & 0xffff0000) == 0x3c1c0000) /* lui $gp,n */
|
||||
else if (high_word == 0x3c1c) /* lui $gp,n */
|
||||
continue;
|
||||
else if ((inst & 0xffff0000) == 0x279c0000) /* addiu $gp,$gp,n */
|
||||
else if (high_word == 0x279c) /* addiu $gp,$gp,n */
|
||||
continue;
|
||||
else if (inst == 0x0399e021 /* addu $gp,$gp,$t9 */
|
||||
|| inst == 0x033ce021) /* addu $gp,$t9,$gp */
|
||||
|
|
@ -1448,16 +1641,16 @@ mips32_skip_prologue (pc, lenient)
|
|||
instruction was seen. */
|
||||
else if (!seen_sp_adjust)
|
||||
{
|
||||
if ((inst & 0xffff0000) == 0x3c010000 || /* lui $at,n */
|
||||
(inst & 0xffff0000) == 0x3c080000) /* lui $t0,n */
|
||||
if (high_word == 0x3c01 || /* lui $at,n */
|
||||
high_word == 0x3c08) /* lui $t0,n */
|
||||
{
|
||||
load_immediate_bytes += MIPS_INSTLEN; /* FIXME!! */
|
||||
continue;
|
||||
}
|
||||
else if ((inst & 0xffff0000) == 0x34210000 || /* ori $at,$at,n */
|
||||
(inst & 0xffff0000) == 0x35080000 || /* ori $t0,$t0,n */
|
||||
(inst & 0xffff0000) == 0x34010000 || /* ori $at,$zero,n */
|
||||
(inst & 0xffff0000) == 0x34080000) /* ori $t0,$zero,n */
|
||||
else if (high_word == 0x3421 || /* ori $at,$at,n */
|
||||
high_word == 0x3508 || /* ori $t0,$t0,n */
|
||||
high_word == 0x3401 || /* ori $at,$zero,n */
|
||||
high_word == 0x3408) /* ori $t0,$zero,n */
|
||||
{
|
||||
load_immediate_bytes += MIPS_INSTLEN; /* FIXME!! */
|
||||
continue;
|
||||
|
|
|
|||
Loading…
Reference in New Issue