gdb/hppa-tdep.c: Fix logical working flow issues and check additional store instructions.
Original working flow has several issues: - typo issue: "(inst >> 26) == 0x1f && ..." for checking 'stw(m)'. - "(inst >> 6) == 0xa" needs to be "((inst >> 6) & 0xf) == 0xa". And also need check additional store instructions: - For absolute memory: 'stby', 'stdby'. - For unaligned: 'stwa', 'stda'. The original code also can be improved: - Remove redundant double check "(inst >> 26) == 0x1b" for 'stwm'. - Use 2 'switch' statements instead of all 'if' statements. * hppa-tdep.c (inst_saves_gr): Fix logical working flow issues and check additional store instructions.
This commit is contained in:
Chen Gang
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2015-01-22 Chen Gang <gang.chen.5i5j@gmail.com>
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* hppa-tdep.c (inst_saves_gr): Fix logical working flow issues
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and check additional store instructions.
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2015-01-21 Wei-cheng Wang <cole945@gmail.com>
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* MAINTAINERS (Write After Approval): Add "Wei-cheng Wang".
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123
gdb/hppa-tdep.c
123
gdb/hppa-tdep.c
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@ -1376,37 +1376,106 @@ is_branch (unsigned long inst)
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}
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/* Return the register number for a GR which is saved by INST or
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zero it INST does not save a GR. */
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zero if INST does not save a GR.
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Referenced from:
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parisc 1.1:
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https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
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parisc 2.0:
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https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
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According to Table 6-5 of Chapter 6 (Memory Reference Instructions)
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on page 106 in parisc 2.0, all instructions for storing values from
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the general registers are:
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Store: stb, sth, stw, std (according to Chapter 7, they
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are only in both "inst >> 26" and "inst >> 6".
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Store Absolute: stwa, stda (according to Chapter 7, they are only
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in "inst >> 6".
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Store Bytes: stby, stdby (according to Chapter 7, they are
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only in "inst >> 6").
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For (inst >> 26), according to Chapter 7:
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The effective memory reference address is formed by the addition
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of an immediate displacement to a base value.
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- stb: 0x18, store a byte from a general register.
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- sth: 0x19, store a halfword from a general register.
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- stw: 0x1a, store a word from a general register.
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- stwm: 0x1b, store a word from a general register and perform base
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register modification (2.0 will still treate it as stw).
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- std: 0x1c, store a doubleword from a general register (2.0 only).
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- stw: 0x1f, store a word from a general register (2.0 only).
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For (inst >> 6) when ((inst >> 26) == 0x03), according to Chapter 7:
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The effective memory reference address is formed by the addition
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of an index value to a base value specified in the instruction.
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- stb: 0x08, store a byte from a general register (1.1 calls stbs).
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- sth: 0x09, store a halfword from a general register (1.1 calls
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sths).
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- stw: 0x0a, store a word from a general register (1.1 calls stws).
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- std: 0x0b: store a doubleword from a general register (2.0 only)
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Implement fast byte moves (stores) to unaligned word or doubleword
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destination.
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- stby: 0x0c, for unaligned word (1.1 calls stbys).
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- stdby: 0x0d for unaligned doubleword (2.0 only).
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Store a word or doubleword using an absolute memory address formed
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using short or long displacement or indexed
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- stwa: 0x0e, store a word from a general register to an absolute
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address (1.0 calls stwas).
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- stda: 0x0f, store a doubleword from a general register to an
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absolute address (2.0 only). */
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static int
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inst_saves_gr (unsigned long inst)
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{
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/* Does it look like a stw? */
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if ((inst >> 26) == 0x1a || (inst >> 26) == 0x1b
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|| (inst >> 26) == 0x1f
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|| ((inst >> 26) == 0x1f
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&& ((inst >> 6) == 0xa)))
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return hppa_extract_5R_store (inst);
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/* Does it look like a std? */
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if ((inst >> 26) == 0x1c
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|| ((inst >> 26) == 0x03
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&& ((inst >> 6) & 0xf) == 0xb))
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return hppa_extract_5R_store (inst);
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/* Does it look like a stwm? GCC & HPC may use this in prologues. */
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if ((inst >> 26) == 0x1b)
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return hppa_extract_5R_store (inst);
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/* Does it look like sth or stb? HPC versions 9.0 and later use these
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too. */
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if ((inst >> 26) == 0x19 || (inst >> 26) == 0x18
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|| ((inst >> 26) == 0x3
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&& (((inst >> 6) & 0xf) == 0x8
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|| ((inst >> 6) & 0xf) == 0x9)))
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return hppa_extract_5R_store (inst);
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return 0;
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switch ((inst >> 26) & 0x0f)
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{
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case 0x03:
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switch ((inst >> 6) & 0x0f)
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{
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case 0x08:
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case 0x09:
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case 0x0a:
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case 0x0b:
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case 0x0c:
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case 0x0d:
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case 0x0e:
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case 0x0f:
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return hppa_extract_5R_store (inst);
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default:
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return 0;
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}
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case 0x18:
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case 0x19:
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case 0x1a:
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case 0x1b:
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case 0x1c:
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/* no 0x1d or 0x1e -- according to parisc 2.0 document */
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case 0x1f:
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return hppa_extract_5R_store (inst);
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default:
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return 0;
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}
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}
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/* Return the register number for a FR which is saved by INST or
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