sim: d10v: fix signal updates
Way back in aba6488e0b
, a bunch of signal
defines were changed to TARGET_SIGNAL_xxx. For d10v, the transition was
incomplete which lead to sim_stop_reason using the new set but sim_resume
still using the old set. Which meant in some cases, the sim would never
actually stop.
Convert all the remaining SIGxxx defines in here to TARGET_SIGNAL_xxx.
This has the nice side effect of fixing the testsuite.
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@ -1,3 +1,9 @@
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2015-04-02 Mike Frysinger <vapier@gentoo.org>
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* interp.c (lookup_hash): Change SIGILL to GDB_SIGNAL_ILL.
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(sim_resume): Change SIGBUS/SIGSEGV to GDB_SIGNAL_BUS, SIGILL to
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GDB_SIGNAL_ILL, and SIGTRAP to GDB_SIGNAL_TRAP.
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2015-04-01 Mike Frysinger <vapier@gentoo.org>
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* interp.c (sim_set_profile, sim_set_profile_size): Delete.
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@ -80,7 +80,7 @@ lookup_hash (uint32 ins, int size)
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{
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if (h->next == NULL)
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{
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State.exception = SIGILL;
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State.exception = GDB_SIGNAL_ILL;
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State.pc_changed = 1; /* Don't increment the PC. */
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return NULL;
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}
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@ -936,17 +936,14 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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{
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case 0:
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break;
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#ifdef SIGBUS
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case SIGBUS:
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#endif
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case SIGSEGV:
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case GDB_SIGNAL_BUS:
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SET_BPC (PC);
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SET_BPSW (PSW);
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SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
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JMP (AE_VECTOR_START);
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SLOT_FLUSH ();
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break;
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case SIGILL:
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case GDB_SIGNAL_ILL:
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SET_BPC (PC);
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SET_BPSW (PSW);
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SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
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@ -963,7 +960,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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iaddr = imem_addr ((uint32)PC << 2);
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if (iaddr == State.mem.fault)
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{
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State.exception = SIGBUS;
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State.exception = GDB_SIGNAL_BUS;
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break;
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}
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@ -1035,7 +1032,7 @@ sim_resume (SIM_DESC sd, int step, int siggnal)
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while ( !State.exception && !stop_simulator);
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if (step && !State.exception)
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State.exception = SIGTRAP;
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State.exception = GDB_SIGNAL_TRAP;
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}
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void
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