* arm-linux-tdep.h (ARM_CPSR_REGNUM): Delete definition.
* arm-tdep.c (arm_frame_is_thumb): New. (arm_pc_is_thumb): Clarify comment. (thumb_analyze_prologue): Remove PC special case. (thumb_scan_prologue): Take a block_addr argument. Use it for find_pc_partial_function. Remove unused variables. (arm_scan_prologue): Use arm_frame_is_thumb. Use the block address for find_pc_partial_function. Remove PC special case. (arm_prologue_prev_register): Add special handling for PC and CPSR. (arm_dwarf2_prev_register, arm_dwarf2_frame_init_reg): New. (arm_get_next_pc): Use arm_frame_is_thumb. (arm_write_pc): Use CPSR_T instead of 0x20. (arm_gdbarch_init): Call dwarf2_frame_set_init_reg. * arm-tdep.h (enum gdb_regnum): Add ARM_CPSR_REGNUM. (CPSR_T): Define. * dwarf2-frame.c (dwarf2_frame_prev_register): Handle DWARF2_FRAME_REG_FN. * dwarf2-frame.h (enum dwarf2_frame_reg_rule): Add DWARF2_FRAME_REG_FN. (struct dwarf2_frame_state_reg): Add FN to loc union. * gdb.arch/thumb-prologue.exp: Do not expect a saved PC.
This commit is contained in:
Daniel Jacobowitz
parent
36d520f5f6
commit
b39cc96258
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@ -1,3 +1,26 @@
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2008-05-01 Daniel Jacobowitz <dan@codesourcery.com>
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* arm-linux-tdep.h (ARM_CPSR_REGNUM): Delete definition.
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* arm-tdep.c (arm_frame_is_thumb): New.
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(arm_pc_is_thumb): Clarify comment.
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(thumb_analyze_prologue): Remove PC special case.
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(thumb_scan_prologue): Take a block_addr argument. Use it for
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find_pc_partial_function. Remove unused variables.
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(arm_scan_prologue): Use arm_frame_is_thumb. Use the block address
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for find_pc_partial_function. Remove PC special case.
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(arm_prologue_prev_register): Add special handling for PC and CPSR.
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(arm_dwarf2_prev_register, arm_dwarf2_frame_init_reg): New.
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(arm_get_next_pc): Use arm_frame_is_thumb.
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(arm_write_pc): Use CPSR_T instead of 0x20.
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(arm_gdbarch_init): Call dwarf2_frame_set_init_reg.
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* arm-tdep.h (enum gdb_regnum): Add ARM_CPSR_REGNUM.
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(CPSR_T): Define.
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* dwarf2-frame.c (dwarf2_frame_prev_register): Handle
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DWARF2_FRAME_REG_FN.
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* dwarf2-frame.h (enum dwarf2_frame_reg_rule): Add
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DWARF2_FRAME_REG_FN.
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(struct dwarf2_frame_state_reg): Add FN to loc union.
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2008-05-01 Nick Roberts <nickrob@snap.net.nz>
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* exec.c (print_section_info): Add missing '\n'.
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@ -20,8 +20,6 @@
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struct regset;
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struct regcache;
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#define ARM_CPSR_REGNUM 16
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#define ARM_LINUX_SIZEOF_NWFPE (8 * FP_REGISTER_SIZE \
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+ 2 * INT_REGISTER_SIZE \
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+ 8 + INT_REGISTER_SIZE)
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147
gdb/arm-tdep.c
147
gdb/arm-tdep.c
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@ -211,8 +211,25 @@ struct arm_prologue_cache
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int arm_apcs_32 = 1;
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/* Determine if FRAME is executing in Thumb mode. */
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static int
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arm_frame_is_thumb (struct frame_info *frame)
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{
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CORE_ADDR cpsr;
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/* Every ARM frame unwinder can unwind the T bit of the CPSR, either
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directly (from a signal frame or dummy frame) or by interpreting
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the saved LR (from a prologue or DWARF frame). So consult it and
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trust the unwinders. */
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cpsr = get_frame_register_unsigned (frame, ARM_PS_REGNUM);
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return (cpsr & CPSR_T) != 0;
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}
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/* Determine if the program counter specified in MEMADDR is in a Thumb
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function. */
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function. This function should be called for addresses unrelated to
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any executing frame; otherwise, prefer arm_frame_is_thumb. */
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static int
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arm_pc_is_thumb (CORE_ADDR memaddr)
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@ -273,14 +290,6 @@ thumb_analyze_prologue (struct gdbarch *gdbarch,
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stack = make_pv_area (ARM_SP_REGNUM);
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back_to = make_cleanup_free_pv_area (stack);
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/* The call instruction saved PC in LR, and the current PC is not
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interesting. Due to this file's conventions, we want the value
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of LR at this function's entry, not at the call site, so we do
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not record the save of the PC - when the ARM prologue analyzer
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has also been converted to the pv mechanism, we could record the
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save here and remove the hack in prev_register. */
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regs[ARM_PC_REGNUM] = pv_unknown ();
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while (start < limit)
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{
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unsigned short insn;
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@ -535,22 +544,14 @@ arm_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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static void
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thumb_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR prev_pc,
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struct arm_prologue_cache *cache)
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CORE_ADDR block_addr, struct arm_prologue_cache *cache)
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{
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CORE_ADDR prologue_start;
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CORE_ADDR prologue_end;
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CORE_ADDR current_pc;
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/* Which register has been copied to register n? */
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int saved_reg[16];
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/* findmask:
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bit 0 - push { rlist }
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bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
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bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
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*/
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int findmask = 0;
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int i;
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if (find_pc_partial_function (prev_pc, NULL, &prologue_start, &prologue_end))
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if (find_pc_partial_function (block_addr, NULL, &prologue_start,
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&prologue_end))
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{
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struct symtab_and_line sal = find_pc_line (prologue_start, 0);
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@ -644,6 +645,7 @@ arm_scan_prologue (struct frame_info *this_frame,
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int regno;
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CORE_ADDR prologue_start, prologue_end, current_pc;
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CORE_ADDR prev_pc = get_frame_pc (this_frame);
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CORE_ADDR block_addr = get_frame_address_in_block (this_frame);
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pv_t regs[ARM_FPS_REGNUM];
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struct pv_area *stack;
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struct cleanup *back_to;
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@ -654,15 +656,16 @@ arm_scan_prologue (struct frame_info *this_frame,
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cache->framesize = 0;
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/* Check for Thumb prologue. */
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if (arm_pc_is_thumb (prev_pc))
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if (arm_frame_is_thumb (this_frame))
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{
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thumb_scan_prologue (gdbarch, prev_pc, cache);
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thumb_scan_prologue (gdbarch, prev_pc, block_addr, cache);
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return;
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}
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/* Find the function prologue. If we can't find the function in
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the symbol table, peek in the stack frame to find the PC. */
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if (find_pc_partial_function (prev_pc, NULL, &prologue_start, &prologue_end))
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if (find_pc_partial_function (block_addr, NULL, &prologue_start,
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&prologue_end))
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{
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/* One way to find the end of the prologue (which works well
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for unoptimized code) is to do the following:
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@ -751,8 +754,6 @@ arm_scan_prologue (struct frame_info *this_frame,
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stack = make_pv_area (ARM_SP_REGNUM);
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back_to = make_cleanup_free_pv_area (stack);
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regs[ARM_PC_REGNUM] = pv_unknown ();
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for (current_pc = prologue_start;
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current_pc < prologue_end;
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current_pc += 4)
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@ -985,10 +986,18 @@ arm_prologue_prev_register (struct frame_info *this_frame,
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cache = *this_cache;
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/* If we are asked to unwind the PC, then we need to return the LR
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instead. The saved value of PC points into this frame's
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prologue, not the next frame's resume location. */
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instead. The prologue may save PC, but it will point into this
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frame's prologue, not the next frame's resume location. Also
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strip the saved T bit. A valid LR may have the low bit set, but
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a valid PC never does. */
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if (prev_regnum == ARM_PC_REGNUM)
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prev_regnum = ARM_LR_REGNUM;
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{
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CORE_ADDR lr;
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lr = frame_unwind_register_unsigned (this_frame, ARM_LR_REGNUM);
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return frame_unwind_got_constant (this_frame, prev_regnum,
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arm_addr_bits_remove (lr));
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}
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/* SP is generally not saved to the stack, but this frame is
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identified by the next frame's stack pointer at the time of the call.
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@ -996,6 +1005,27 @@ arm_prologue_prev_register (struct frame_info *this_frame,
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if (prev_regnum == ARM_SP_REGNUM)
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return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
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/* The CPSR may have been changed by the call instruction and by the
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called function. The only bit we can reconstruct is the T bit,
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by checking the low bit of LR as of the call. This is a reliable
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indicator of Thumb-ness except for some ARM v4T pre-interworking
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Thumb code, which could get away with a clear low bit as long as
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the called function did not use bx. Guess that all other
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bits are unchanged; the condition flags are presumably lost,
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but the processor status is likely valid. */
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if (prev_regnum == ARM_PS_REGNUM)
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{
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CORE_ADDR lr, cpsr;
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cpsr = get_frame_register_unsigned (this_frame, prev_regnum);
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lr = frame_unwind_register_unsigned (this_frame, ARM_LR_REGNUM);
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if (IS_THUMB_ADDR (lr))
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cpsr |= CPSR_T;
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else
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cpsr &= ~CPSR_T;
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return frame_unwind_got_constant (this_frame, prev_regnum, cpsr);
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}
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return trad_frame_get_prev_register (this_frame, cache->saved_regs,
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prev_regnum);
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}
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@ -1113,6 +1143,59 @@ arm_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame)
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return frame_unwind_register_unsigned (this_frame, ARM_SP_REGNUM);
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}
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static struct value *
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arm_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
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int regnum)
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{
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CORE_ADDR lr, cpsr;
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switch (regnum)
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{
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case ARM_PC_REGNUM:
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/* The PC is normally copied from the return column, which
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describes saves of LR. However, that version may have an
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extra bit set to indicate Thumb state. The bit is not
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part of the PC. */
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lr = frame_unwind_register_unsigned (this_frame, ARM_LR_REGNUM);
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return frame_unwind_got_constant (this_frame, regnum,
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arm_addr_bits_remove (lr));
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case ARM_PS_REGNUM:
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/* Reconstruct the T bit; see arm_prologue_prev_register for details. */
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CORE_ADDR lr, cpsr;
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cpsr = get_frame_register_unsigned (this_frame, prev_regnum);
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lr = frame_unwind_register_unsigned (this_frame, ARM_LR_REGNUM);
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if (IS_THUMB_ADDR (lr))
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cpsr |= CPSR_T;
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else
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cpsr &= ~CPSR_T;
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return frame_unwind_got_constant (this_frame, prev_regnum, cpsr);
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default:
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internal_error (__FILE__, __LINE__,
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_("Unexpected register %d"), regnum);
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}
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}
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static void
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arm_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
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struct dwarf2_frame_state_reg *reg,
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struct frame_info *this_frame)
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{
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switch (regnum)
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{
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case ARM_PC_REGNUM:
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case ARM_PS_REGNUM:
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reg->how = DWARF2_FRAME_REG_FN;
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reg->loc.fn = arm_dwarf2_prev_register;
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break;
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case ARM_SP_REGNUM:
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reg->how = DWARF2_FRAME_REG_CFA;
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break;
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}
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}
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/* When arguments must be pushed onto the stack, they go on in reverse
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order. The code below implements a FILO (stack) to do this. */
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@ -1694,7 +1777,7 @@ arm_get_next_pc (struct frame_info *frame, CORE_ADDR pc)
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unsigned long status;
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CORE_ADDR nextpc;
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if (arm_pc_is_thumb (pc))
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if (arm_frame_is_thumb (frame))
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return thumb_get_next_pc (frame, pc);
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pc_val = (unsigned long) pc;
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@ -2667,10 +2750,10 @@ arm_write_pc (struct regcache *regcache, CORE_ADDR pc)
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ULONGEST val;
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regcache_cooked_read_unsigned (regcache, ARM_PS_REGNUM, &val);
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if (arm_pc_is_thumb (pc))
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regcache_cooked_write_unsigned (regcache, ARM_PS_REGNUM, val | 0x20);
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regcache_cooked_write_unsigned (regcache, ARM_PS_REGNUM, val | CPSR_T);
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else
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regcache_cooked_write_unsigned (regcache, ARM_PS_REGNUM,
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val & ~(ULONGEST) 0x20);
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val & ~(ULONGEST) CPSR_T);
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}
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}
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@ -3034,6 +3117,8 @@ arm_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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/* Hook in the ABI-specific overrides, if they have been registered. */
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gdbarch_init_osabi (info, gdbarch);
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dwarf2_frame_set_init_reg (gdbarch, arm_dwarf2_frame_init_reg);
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/* Add some default predicates. */
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frame_unwind_append_unwinder (gdbarch, &arm_stub_unwind);
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dwarf2_append_unwinders (gdbarch);
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@ -38,6 +38,7 @@ enum gdb_regnum {
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ARM_F7_REGNUM = 23, /* last floating point register */
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ARM_FPS_REGNUM = 24, /* floating point status register */
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ARM_PS_REGNUM = 25, /* Contains processor status */
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ARM_CPSR_REGNUM = ARM_PS_REGNUM,
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ARM_WR0_REGNUM, /* WMMX data registers. */
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ARM_WR15_REGNUM = ARM_WR0_REGNUM + 15,
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ARM_WC0_REGNUM, /* WMMX control registers. */
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@ -107,6 +108,8 @@ enum gdb_regnum {
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#define FLAG_C 0x20000000
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#define FLAG_V 0x10000000
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#define CPSR_T 0x20
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/* Type of floating-point code in use by inferior. There are really 3 models
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that are traditionally supported (plus the endianness issue), but gcc can
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only generate 2 of those. The third is APCS_FLOAT, where arguments to
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@ -1139,6 +1139,9 @@ dwarf2_frame_prev_register (struct frame_info *this_frame, void **this_cache,
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addr += get_frame_register_unsigned (this_frame, regnum);
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return frame_unwind_got_address (this_frame, regnum, addr);
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case DWARF2_FRAME_REG_FN:
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return cache->reg[regnum].loc.fn (this_frame, this_cache, regnum);
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default:
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internal_error (__FILE__, __LINE__, _("Unknown register rule."));
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}
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@ -55,6 +55,7 @@ enum dwarf2_frame_reg_rule
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/* These aren't defined by the DWARF2 CFI specification, but are
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used internally by GDB. */
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DWARF2_FRAME_REG_FN, /* Call a registered function. */
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DWARF2_FRAME_REG_RA, /* Return Address. */
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DWARF2_FRAME_REG_RA_OFFSET, /* Return Address with offset. */
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DWARF2_FRAME_REG_CFA, /* Call Frame Address. */
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@ -71,6 +72,8 @@ struct dwarf2_frame_state_reg
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LONGEST offset;
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ULONGEST reg;
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unsigned char *exp;
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struct value *(*fn) (struct frame_info *this_frame, void **this_cache,
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int regnum);
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} loc;
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ULONGEST exp_len;
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enum dwarf2_frame_reg_rule how;
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@ -1,3 +1,7 @@
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2007-05-01 Daniel Jacobowitz <dan@codesourcery.com>
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* gdb.arch/thumb-prologue.exp: Do not expect a saved PC.
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2008-05-01 Joel Brobecker <brobecker@adacore.com>
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* gdb.base/info-target.exp: New testcase.
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@ -57,5 +57,5 @@ gdb_test "backtrace 10" \
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"backtrace in TPCS"
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gdb_test "info frame" \
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".*Saved registers:.*r7 at.*r10 at.*r11 at.*lr at.*pc at .*" \
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".*Saved registers:.*r7 at.*r10 at.*r11 at.*lr at.*" \
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"saved registers in TPCS"
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Loading…
Reference in New Issue