Jakub Jelinek <jj@ultra.linux.cz>
* gas/sparc/synth64.s: Add checks for single register signx/clruw.
* gas/sparc/set64.s: Add tests for setuw and setsw synthetic insns.
* gas/sparc/prefetch.d: Add -64 as switch.
* gas/sparc/rdpr.d: Ditto.
* gas/sparc/wrpr.d: Ditto.
* gas/sparc/synth64.d: Ditto, reflect synth64.s changes.
* gas/sparc/reloc64.d: Add -64 as switch, be more tolerant, as
current gas outputs %hi(0) and not %hi(0x0).
* gas/sparc/set64.d: Add -64 as switch, reflect set64.s changes and
optimizations for setx instruction.
* gas/sparc/sparc.exp: Do sparc64*-*-* checks if it is any of the
compiled-in targets.
This commit is contained in:
Richard Henderson
parent
09cb30ac5e
commit
b3fb1136bf
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@ -1,3 +1,18 @@
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1999-06-10 Jakub Jelinek <jj@ultra.linux.cz>
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* gas/sparc/synth64.s: Add checks for single register signx/clruw.
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* gas/sparc/set64.s: Add tests for setuw and setsw synthetic insns.
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* gas/sparc/prefetch.d: Add -64 as switch.
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* gas/sparc/rdpr.d: Ditto.
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* gas/sparc/wrpr.d: Ditto.
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* gas/sparc/synth64.d: Ditto, reflect synth64.s changes.
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* gas/sparc/reloc64.d: Add -64 as switch, be more tolerant, as
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current gas outputs %hi(0) and not %hi(0x0).
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* gas/sparc/set64.d: Add -64 as switch, reflect set64.s changes and
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optimizations for setx instruction.
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* gas/sparc/sparc.exp: Do sparc64*-*-* checks if it is any of the
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compiled-in targets.
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1999-06-10 Richard Henderson <rth@cygnus.com>
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* gas/macros/irp.s: Use `foo' and `bar' instead of `r' and `s'.
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@ -1,4 +1,4 @@
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#as: -Av9
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#as: -64 -Av9
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#objdump: -dr
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#name: sparc64 prefetch
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@ -1,4 +1,4 @@
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#as: -Av9
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#as: -64 -Av9
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#objdump: -dr
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#name: sparc64 rdpr
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@ -1,4 +1,4 @@
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#as: -Av9
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#as: -64 -Av9
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#objdump: -dr
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#name: sparc64 reloc64
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@ -10,12 +10,12 @@ Disassembly of section .text:
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0: 03 04 8d 15 sethi %hi\(0x12345400\), %g1
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4: 82 10 62 78 or %g1, 0x278, %g1.*
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8: 01 00 00 00 nop
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c: 03 00 00 00 sethi %hi\(0x0\), %g1
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c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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c: R_SPARC_HH22 .text
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10: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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10: R_SPARC_HM10 .text
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14: 01 00 00 00 nop
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18: 03 00 00 00 sethi %hi\(0x0\), %g1
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18: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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18: R_SPARC_HH22 .text\+0x1234567800000000
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1c: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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1c: R_SPARC_HM10 .text\+0x1234567800000000
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@ -25,20 +25,20 @@ Disassembly of section .text:
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2c: 05 1d 95 0c sethi %hi\(0x76543000\), %g2
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30: 84 10 62 10 or %g1, 0x210, %g2
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34: 01 00 00 00 nop
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38: 03 00 00 00 sethi %hi\(0x0\), %g1
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38: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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38: R_SPARC_HH22 .text
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3c: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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3c: R_SPARC_HM10 .text
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40: 05 00 00 00 sethi %hi\(0x0\), %g2
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40: 05 00 00 00 sethi %hi\((0x|)0\), %g2
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40: R_SPARC_LM22 .text
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44: 84 10 60 00 mov %g1, %g2
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44: R_SPARC_LO10 .text
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48: 01 00 00 00 nop
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4c: 03 00 00 00 sethi %hi\(0x0\), %g1
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4c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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4c: R_SPARC_HH22 .text\+0xfedcba9876543210
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50: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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50: R_SPARC_HM10 .text\+0xfedcba9876543210
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54: 05 00 00 00 sethi %hi\(0x0\), %g2
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54: 05 00 00 00 sethi %hi\((0x|)0\), %g2
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54: R_SPARC_LM22 .text\+0xfedcba9876543210
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58: 84 10 60 00 mov %g1, %g2
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58: R_SPARC_LO10 .text\+0xfedcba9876543210
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@ -47,14 +47,14 @@ Disassembly of section .text:
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64: 82 10 61 43 or %g1, 0x143, %g1.*
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68: 82 10 62 10 or %g1, 0x210, %g1
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6c: 01 00 00 00 nop
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70: 03 00 00 00 sethi %hi\(0x0\), %g1
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70: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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70: R_SPARC_H44 .text
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74: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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74: R_SPARC_M44 .text
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78: 82 10 60 00 mov %g1, %g1
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78: R_SPARC_L44 .text
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7c: 01 00 00 00 nop
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80: 03 00 00 00 sethi %hi\(0x0\), %g1
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80: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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80: R_SPARC_H44 .text\+0xa9876543210
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84: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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84: R_SPARC_M44 .text\+0xa9876543210
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@ -64,12 +64,12 @@ Disassembly of section .text:
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90: 03 22 6a f3 sethi %hi\(0x89abcc00\), %g1
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94: 82 18 7e 10 xor %g1, -496, %g1
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98: 01 00 00 00 nop
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9c: 03 00 00 00 sethi %hi\(0x0\), %g1
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9c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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9c: R_SPARC_HIX22 .text
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a0: 82 18 60 00 xor %g1, 0, %g1
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a0: R_SPARC_LOX10 .text
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a4: 01 00 00 00 nop
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a8: 03 00 00 00 sethi %hi\(0x0\), %g1
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a8: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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a8: R_SPARC_HIX22 .text\+0xffffffff76543210
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ac: 82 18 60 00 xor %g1, 0, %g1
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ac: R_SPARC_LOX10 .text\+0xffffffff76543210
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@ -1,4 +1,4 @@
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#as: -Av9
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#as: -64 -Av9
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#objdump: -dr
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#name: sparc64 set64
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@ -7,22 +7,22 @@
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Disassembly of section .text:
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0+ <foo>:
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0: 05 00 00 00 sethi %hi\(0x0\), %g2
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0: 05 00 00 00 sethi %hi\((0x|)0\), %g2
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0: R_SPARC_HI22 .text
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4: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
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4: R_SPARC_LO10 .text
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8: 07 1d 95 0c sethi %hi\(0x76543000\), %g3
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c: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <\*ABS\*\+(0x|)0x76543210>
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c: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <(\*ABS\*|foo)\+(0x|)0x76543210>
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10: 88 10 20 00 clr %g4
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14: 0b 00 00 3f sethi %hi\(0xfc00\), %g5
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18: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <\*ABS\*\+(0x|)ffff>
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1c: 03 00 00 00 sethi %hi\(0x0\), %g1
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18: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <(\*ABS\*|foo)\+(0x|)ffff>
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1c: 03 00 00 00 sethi %hi\((0x|)0\), %g1
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1c: R_SPARC_HH22 .text
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20: 82 10 60 00 mov %g1, %g1 ! 0 <foo>
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20: R_SPARC_HM10 .text
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24: 05 00 00 00 sethi %hi\(0x0\), %g2
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24: R_SPARC_HI22 .text
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28: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
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20: 05 00 00 00 sethi %hi\((0x|)0\), %g2
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20: R_SPARC_LM22 .text
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24: 82 10 60 00 mov %g1, %g1
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24: R_SPARC_HM10 .text
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28: 84 10 a0 00 mov %g2, %g2
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28: R_SPARC_LO10 .text
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2c: 83 28 70 20 sllx %g1, 0x20, %g1
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30: 84 10 80 01 or %g2, %g1, %g2
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@ -32,57 +32,78 @@ Disassembly of section .text:
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40: 86 10 2f ff mov 0xfff, %g3
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44: 07 00 00 04 sethi %hi\(0x1000\), %g3
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48: 86 10 30 00 mov -4096, %g3
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4c: 07 3f ff fb sethi %hi\(0xffffec00\), %g3
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50: 86 10 e3 ff or %g3, 0x3ff, %g3 ! ffffefff <\*ABS\*\+(0x|)ffffefff>
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54: 87 38 e0 00 sra %g3, 0, %g3
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58: 07 00 00 3f sethi %hi\(0xfc00\), %g3
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5c: 86 10 e3 ff or %g3, 0x3ff, %g3 ! ffff <\*ABS\*\+(0x|)ffff>
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60: 07 3f ff c0 sethi %hi\(0xffff0000\), %g3
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64: 87 38 e0 00 sra %g3, 0, %g3
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68: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4
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6c: 88 11 23 ff or %g4, 0x3ff, %g4 ! 7fffffff <\*ABS\*\+(0x|)7fffffff>
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70: 09 20 00 00 sethi %hi\(0x80000000\), %g4
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74: 09 20 00 00 sethi %hi\(0x80000000\), %g4
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78: 89 39 20 00 sra %g4, 0, %g4
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7c: 82 10 3f ff mov -1, %g1
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80: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4
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84: 88 11 23 ff or %g4, 0x3ff, %g4 ! 7fffffff <\*ABS\*\+(0x|)7fffffff>
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88: 83 28 70 20 sllx %g1, 0x20, %g1
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8c: 88 11 00 01 or %g4, %g1, %g4
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90: 09 3f ff ff sethi %hi\(0xfffffc00\), %g4
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94: 88 11 23 ff or %g4, 0x3ff, %g4 ! ffffffff <\*ABS\*\+(0x|)ffffffff>
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98: 88 10 20 01 mov 1, %g4
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9c: 89 29 30 20 sllx %g4, 0x20, %g4
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a0: 03 1f ff ff sethi %hi\(0x7ffffc00\), %g1
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a4: 82 10 63 ff or %g1, 0x3ff, %g1 ! 7fffffff <\*ABS\*\+(0x|)7fffffff>
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a8: 0b 3f ff ff sethi %hi\(0xfffffc00\), %g5
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ac: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffffffff <\*ABS\*\+(0x|)ffffffff>
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b0: 83 28 70 20 sllx %g1, 0x20, %g1
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b4: 8a 11 40 01 or %g5, %g1, %g5
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b8: 0b 20 00 00 sethi %hi\(0x80000000\), %g5
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bc: 8b 29 70 20 sllx %g5, 0x20, %g5
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c0: 8a 10 3f ff mov -1, %g5
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c4: 8b 29 70 20 sllx %g5, 0x20, %g5
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c8: 0b 20 00 00 sethi %hi\(0x80000000\), %g5
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cc: 8b 39 60 00 sra %g5, 0, %g5
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4c: 07 00 00 04 sethi %hi\(0x1000\), %g3
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50: 86 18 ff ff xor %g3, -1, %g3
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54: 07 00 00 3f sethi %hi\(0xfc00\), %g3
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58: 86 10 e3 ff or %g3, 0x3ff, %g3 ! ffff <(\*ABS\*|foo)\+(0x|)ffff>
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5c: 07 00 00 3f sethi %hi\(0xfc00\), %g3
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60: 86 18 fc 00 xor %g3, -1024, %g3
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64: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4
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68: 88 11 23 ff or %g4, 0x3ff, %g4 ! 7fffffff <(\*ABS\*|foo)\+(0x|)7fffffff>
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6c: 09 20 00 00 sethi %hi\(0x80000000\), %g4
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70: 09 1f ff ff sethi %hi\(0x7ffffc00\), %g4
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74: 88 19 3c 00 xor %g4, -1024, %g4
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78: 09 20 00 00 sethi %hi\(0x80000000\), %g4
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7c: 88 19 3f ff xor %g4, -1, %g4
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80: 09 3f ff ff sethi %hi\(0xfffffc00\), %g4
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84: 88 11 23 ff or %g4, 0x3ff, %g4 ! ffffffff <(\*ABS\*|foo)\+(0x|)ffffffff>
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88: 88 10 20 01 mov 1, %g4
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8c: 89 29 30 20 sllx %g4, 0x20, %g4
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90: 03 1f ff ff sethi %hi\(0x7ffffc00\), %g1
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94: 0b 3f ff ff sethi %hi\(0xfffffc00\), %g5
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98: 82 10 63 ff or %g1, 0x3ff, %g1
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9c: 8a 11 63 ff or %g5, 0x3ff, %g5
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a0: 83 28 70 20 sllx %g1, 0x20, %g1
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a4: 8a 11 40 01 or %g5, %g1, %g5
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a8: 0b 20 00 00 sethi %hi\(0x80000000\), %g5
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ac: 8b 29 70 20 sllx %g5, 0x20, %g5
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b0: 0b 3f ff ff sethi %hi\(0xfffffc00\), %g5
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b4: 8a 19 7c 00 xor %g5, -1024, %g5
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b8: 0b 1f ff ff sethi %hi\(0x7ffffc00\), %g5
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bc: 8a 19 7c 00 xor %g5, -1024, %g5
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c0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1
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c4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
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c8: 83 28 70 20 sllx %g1, 0x20, %g1
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cc: 8a 11 40 01 or %g5, %g1, %g5
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d0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1
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d4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
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d4: 8a 10 20 01 mov 1, %g5
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d8: 83 28 70 20 sllx %g1, 0x20, %g1
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dc: 8a 11 40 01 or %g5, %g1, %g5
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e0: 03 3f ff c0 sethi %hi\(0xffff0000\), %g1
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e4: 8a 10 20 01 mov 1, %g5
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e8: 83 28 70 20 sllx %g1, 0x20, %g1
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ec: 8a 11 40 01 or %g5, %g1, %g5
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f0: 82 10 20 01 mov 1, %g1
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e0: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
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e4: 82 10 20 01 mov 1, %g1
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e8: 8a 11 60 01 or %g5, 1, %g5
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ec: 83 28 70 20 sllx %g1, 0x20, %g1
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f0: 8a 11 40 01 or %g5, %g1, %g5
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f4: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
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f8: 8a 11 60 01 or %g5, 1, %g5 ! ffff0001 <\*ABS\*\+(0x|)ffff0001>
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f8: 82 10 20 01 mov 1, %g1
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fc: 83 28 70 20 sllx %g1, 0x20, %g1
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100: 8a 11 40 01 or %g5, %g1, %g5
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104: 82 10 20 01 mov 1, %g1
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108: 0b 3f ff c0 sethi %hi\(0xffff0000\), %g5
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108: 8a 10 20 01 mov 1, %g5
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10c: 83 28 70 20 sllx %g1, 0x20, %g1
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110: 8a 11 40 01 or %g5, %g1, %g5
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114: 82 10 20 01 mov 1, %g1
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118: 8a 10 20 01 mov 1, %g5
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11c: 83 28 70 20 sllx %g1, 0x20, %g1
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120: 8a 11 40 01 or %g5, %g1, %g5
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114: 05 00 00 00 sethi %hi\((0x|)0\), %g2
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114: R_SPARC_HI22 .text
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118: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
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118: R_SPARC_LO10 .text
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11c: 07 1d 95 0c sethi %hi\(0x76543000\), %g3
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120: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <(\*ABS\*|foo)\+0x76543210>
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124: 88 10 20 00 clr %g4
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128: 0b 00 00 3f sethi %hi\(0xfc00\), %g5
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12c: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <(\*ABS\*|foo)\+0xffff>
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130: 05 00 00 00 sethi %hi\((0x|)0\), %g2
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130: R_SPARC_HI22 .text
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134: 84 10 a0 00 mov %g2, %g2 ! 0 <foo>
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134: R_SPARC_LO10 .text
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138: 85 38 80 00 signx %g2
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13c: 07 1d 95 0c sethi %hi\(0x76543000\), %g3
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140: 86 10 e2 10 or %g3, 0x210, %g3 ! 76543210 <(\*ABS\*|foo)\+0x76543210>
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144: 88 10 20 00 clr %g4
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148: 0b 00 00 3f sethi %hi\(0xfc00\), %g5
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14c: 8a 11 63 ff or %g5, 0x3ff, %g5 ! ffff <(\*ABS\*|foo)\+0xffff>
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150: 82 10 3f ff mov -1, %g1
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154: 05 1f ff ff sethi %hi\(0x7ffffc00\), %g2
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158: 84 10 a3 ff or %g2, 0x3ff, %g2 ! 7fffffff <(\*ABS\*|foo)\+0x7fffffff>
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15c: 07 00 00 3f sethi %hi\(0xfc00\), %g3
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160: 86 18 fc 00 xor %g3, -1024, %g3
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164: 88 10 3f ff mov -1, %g4
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@ -1,5 +1,4 @@
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# sparc64 set insn handling (includes set, setuw, setsw, setx)
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# FIXME: setuw,setsw not tested for yet.
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foo:
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set foo,%g2
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@ -41,3 +40,17 @@ foo:
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setx 0x00000001ffff0001,%g1,%g5 ! test hm10,hi22,lo10
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setx 0x00000001ffff0000,%g1,%g5 ! test hm10,hi22
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setx 0x0000000100000001,%g1,%g5 ! test hm10,lo10
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setuw foo,%g2
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setuw 0x76543210,%g3
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setuw 0,%g4
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setuw 65535,%g5
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setsw foo,%g2
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setsw 0x76543210,%g3
|
||||
setsw 0,%g4
|
||||
setsw 65535,%g5
|
||||
setsw 0xffffffff,%g1
|
||||
setsw 0x7fffffff,%g2
|
||||
setsw 0xffff0000,%g3
|
||||
setsw -1,%g4
|
||||
|
|
|
|||
|
|
@ -5,20 +5,29 @@
|
|||
# disassembly. The way to fix this is to include a hex dump of the insns
|
||||
# and test that as well. Later.
|
||||
|
||||
if [istarget sparc*-*-*] {
|
||||
run_dump_test "synth"
|
||||
# Find out if these binutils are either sparc64*-*-* or
|
||||
# sparc*-*-* with --enable-targets=sparc64-*-*
|
||||
proc gas_64_check { } {
|
||||
global NM
|
||||
global NMFLAGS
|
||||
global srcdir
|
||||
|
||||
catch "exec $srcdir/lib/run $NM $NMFLAGS --help" nm_help
|
||||
return [regexp "elf64\[_-\]sparc" $nm_help];
|
||||
}
|
||||
|
||||
|
||||
if [istarget sparc64*-*-*] {
|
||||
run_dump_test "asi"
|
||||
run_dump_test "membar"
|
||||
run_dump_test "prefetch"
|
||||
run_dump_test "set64"
|
||||
run_dump_test "synth64"
|
||||
run_dump_test "rdpr"
|
||||
run_dump_test "wrpr"
|
||||
run_dump_test "reloc64"
|
||||
if [istarget sparc*-*-*] {
|
||||
run_dump_test "synth"
|
||||
if [gas_64_check] {
|
||||
run_dump_test "asi"
|
||||
run_dump_test "membar"
|
||||
run_dump_test "prefetch"
|
||||
run_dump_test "set64"
|
||||
run_dump_test "synth64"
|
||||
run_dump_test "rdpr"
|
||||
run_dump_test "wrpr"
|
||||
run_dump_test "reloc64"
|
||||
}
|
||||
}
|
||||
|
||||
if [istarget sparclet*-*-*] {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
#as: -Av9
|
||||
#as: -64 -Av9
|
||||
#objdump: -dr --prefix-addresses
|
||||
#name: sparc64 synth64
|
||||
|
||||
|
|
@ -17,3 +17,5 @@ Disassembly of section .text:
|
|||
0+0024 <foo\+(0x|)20> clrx \[ %g1 \+ 1 \]
|
||||
0+0028 <foo\+(0x|)24> clrx \[ %g1 \+ 0x2a \]
|
||||
0+002c <foo\+(0x|)28> clrx \[ 0x42 \]
|
||||
0+0030 <foo\+(0x|)2c> signx %g1
|
||||
0+0034 <foo\+(0x|)30> clruw %g2
|
||||
|
|
|
|||
|
|
@ -14,3 +14,6 @@ foo:
|
|||
clrx [%g1+1]
|
||||
clrx [42+%g1]
|
||||
clrx [0x42]
|
||||
|
||||
signx %g1
|
||||
clruw %g2
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
#as: -Av9
|
||||
#as: -64 -Av9
|
||||
#objdump: -dr
|
||||
#name: sparc64 wrpr
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue