2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
* s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF. (cfxr, cfdr, cfer, clclu): Add esa flag. (sqd): Instruction added. (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF. * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed. 2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d: Adjust according to the s390-opc changes. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z990.d: Likewise. * gas/s390/esa-z990.s: Likewise. * gas/s390/zarch-z900.d: Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z990.d: Likewise. * gas/s390/zarch-z990.s: Likewise.
This commit is contained in:
Andreas Krebbel
parent
2774199c31
commit
b40d5eb9ef
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@ -1,3 +1,14 @@
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2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com>
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* gas/s390/esa-g5.d: Adjust according to the s390-opc changes.
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* gas/s390/esa-g5.s: Likewise.
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* gas/s390/esa-z990.d: Likewise.
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* gas/s390/esa-z990.s: Likewise.
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* gas/s390/zarch-z900.d: Likewise.
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* gas/s390/zarch-z900.s: Likewise.
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* gas/s390/zarch-z990.d: Likewise.
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* gas/s390/zarch-z990.s: Likewise.
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2008-09-15 Alan Modra <amodra@bigpond.net.au>
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* gas/all/gas.exp: Don't run redef tests on a bunch of targets.
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@ -107,6 +107,9 @@ Disassembly of section .text:
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.*: b3 99 50 69 [ ]*cfdbr %r6,5,%f9
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.*: b3 98 50 69 [ ]*cfebr %r6,5,%f9
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.*: b3 9a 50 69 [ ]*cfxbr %r6,5,%f9
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.*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5
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.*: b3 b8 90 65 [ ]*cfer %r6,9,%f5
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.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5
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.*: 49 65 af ff [ ]*ch %r6,4095\(%r5,%r10\)
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.*: a7 6e 80 01 [ ]*chi %r6,-32767
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.*: b2 41 00 69 [ ]*cksm %r6,%r9
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@ -176,27 +179,27 @@ Disassembly of section .text:
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.*: b2 21 00 69 [ ]*ipte %r6,%r9
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.*: b2 29 00 69 [ ]*iske %r6,%r9
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.*: b2 23 00 69 [ ]*ivsk %r6,%r9
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.*: a7 f4 00 00 [ ]*j 268 <foo\+0x268>
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.*: a7 84 00 00 [ ]*je 26c <foo\+0x26c>
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.*: a7 24 00 00 [ ]*jh 270 <foo\+0x270>
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.*: a7 a4 00 00 [ ]*jhe 274 <foo\+0x274>
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.*: a7 44 00 00 [ ]*jl 278 <foo\+0x278>
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.*: a7 c4 00 00 [ ]*jle 27c <foo\+0x27c>
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.*: a7 64 00 00 [ ]*jlh 280 <foo\+0x280>
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.*: a7 f4 00 00 [ ]*j 274 <foo\+0x274>
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.*: a7 84 00 00 [ ]*je 278 <foo\+0x278>
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.*: a7 24 00 00 [ ]*jh 27c <foo\+0x27c>
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.*: a7 a4 00 00 [ ]*jhe 280 <foo\+0x280>
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.*: a7 44 00 00 [ ]*jl 284 <foo\+0x284>
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.*: a7 74 00 00 [ ]*jne 288 <foo\+0x288>
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.*: a7 d4 00 00 [ ]*jnh 28c <foo\+0x28c>
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.*: a7 54 00 00 [ ]*jnhe 290 <foo\+0x290>
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.*: a7 b4 00 00 [ ]*jnl 294 <foo\+0x294>
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.*: a7 34 00 00 [ ]*jnle 298 <foo\+0x298>
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.*: a7 94 00 00 [ ]*jnlh 29c <foo\+0x29c>
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.*: a7 c4 00 00 [ ]*jle 288 <foo\+0x288>
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.*: a7 64 00 00 [ ]*jlh 28c <foo\+0x28c>
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.*: a7 44 00 00 [ ]*jl 290 <foo\+0x290>
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.*: a7 74 00 00 [ ]*jne 294 <foo\+0x294>
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.*: a7 d4 00 00 [ ]*jnh 298 <foo\+0x298>
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.*: a7 54 00 00 [ ]*jnhe 29c <foo\+0x29c>
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.*: a7 b4 00 00 [ ]*jnl 2a0 <foo\+0x2a0>
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.*: a7 e4 00 00 [ ]*jno 2a4 <foo\+0x2a4>
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.*: a7 d4 00 00 [ ]*jnh 2a8 <foo\+0x2a8>
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.*: a7 74 00 00 [ ]*jne 2ac <foo\+0x2ac>
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.*: a7 14 00 00 [ ]*jo 2b0 <foo\+0x2b0>
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.*: a7 24 00 00 [ ]*jh 2b4 <foo\+0x2b4>
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.*: a7 84 00 00 [ ]*je 2b8 <foo\+0x2b8>
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.*: a7 34 00 00 [ ]*jnle 2a4 <foo\+0x2a4>
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.*: a7 94 00 00 [ ]*jnlh 2a8 <foo\+0x2a8>
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.*: a7 b4 00 00 [ ]*jnl 2ac <foo\+0x2ac>
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.*: a7 e4 00 00 [ ]*jno 2b0 <foo\+0x2b0>
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.*: a7 d4 00 00 [ ]*jnh 2b4 <foo\+0x2b4>
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.*: a7 74 00 00 [ ]*jne 2b8 <foo\+0x2b8>
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.*: a7 14 00 00 [ ]*jo 2bc <foo\+0x2bc>
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.*: a7 24 00 00 [ ]*jh 2c0 <foo\+0x2c0>
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.*: a7 84 00 00 [ ]*je 2c4 <foo\+0x2c4>
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.*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\)
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.*: b3 18 00 69 [ ]*kdbr %f6,%f9
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.*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\)
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@ -388,6 +391,7 @@ Disassembly of section .text:
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.*: b3 15 00 69 [ ]*sqdbr %f6,%f9
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.*: b2 44 00 69 [ ]*sqdr %f6,%f9
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.*: ed 65 af ff 00 34 [ ]*sqe %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 35 [ ]*sqd %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 14 [ ]*sqeb %f6,4095\(%r5,%r10\)
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.*: b3 14 00 69 [ ]*sqebr %f6,%f9
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.*: b2 45 00 69 [ ]*sqer %f6,%f9
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@ -443,8 +447,8 @@ Disassembly of section .text:
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.*: ed 65 af ff 00 11 [ ]*tcdb %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 10 [ ]*tceb %f6,4095\(%r5,%r10\)
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.*: ed 65 af ff 00 12 [ ]*tcxb %f6,4095\(%r5,%r10\)
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.*: b3 58 00 69 [ ]*thder %r6,%r9
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.*: b3 59 00 69 [ ]*thdr %r6,%r9
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.*: b3 58 00 69 [ ]*thder %f6,%f9
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.*: b3 59 00 69 [ ]*thdr %f6,%f9
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.*: 91 ff 5f ff [ ]*tm 4095\(%r5\),255
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.*: a7 60 ff ff [ ]*tmh %r6,65535
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.*: a7 61 ff ff [ ]*tml %r6,65535
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@ -475,3 +479,4 @@ Disassembly of section .text:
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.*: 17 69 [ ]*xr %r6,%r9
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.*: b2 76 00 00 [ ]*xsch
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.*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\)
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.*: 07 07 [ ]*bcr 0,%r7
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@ -101,6 +101,9 @@ foo:
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cfdbr %r6,5,%f9
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cfebr %r6,5,%f9
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cfxbr %r6,5,%f9
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cfdr %r6,9,%f5
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cfer %r6,9,%f5
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cfxr %r6,9,%f5
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ch %r6,4095(%r5,%r10)
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chi %r6,-32767
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cksm %r6,%r9
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@ -382,6 +385,7 @@ foo:
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sqdbr %f6,%f9
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sqdr %f6,%f9
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sqe %f6,4095(%r5,%r10)
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sqd %f6,4095(%r5,%r10)
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sqeb %f6,4095(%r5,%r10)
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sqebr %f6,%f9
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sqer %f6,%f9
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@ -437,8 +441,8 @@ foo:
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tcdb %f6,4095(%r5,%r10)
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tceb %f6,4095(%r5,%r10)
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tcxb %f6,4095(%r5,%r10)
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thder %r6,%r9
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thdr %r6,%r9
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thder %f6,%f9
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thdr %f6,%f9
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tm 4095(%r5),255
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tmh %r6,65535
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tml %r6,65535
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@ -11,3 +11,5 @@ Disassembly of section .text:
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.*: b9 3e 00 69 [ ]*kimd %r6,%r9
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.*: b9 3f 00 69 [ ]*klmd %r6,%r9
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.*: b9 1e 00 69 [ ]*kmac %r6,%r9
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.*: eb 69 50 00 80 8f [ ]*clclu %r6,%r9,-524288\(%r5\)
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.*: 07 07 [ ]*bcr 0,%r7
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@ -5,3 +5,4 @@ foo:
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kimd %r6,%r9
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klmd %r6,%r9
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kmac %r6,%r9
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clclu %r6,%r9,-524288(%r5)
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@ -29,9 +29,6 @@ Disassembly of section .text:
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.*: eb 96 5f ff 00 3e [ ]*cdsg %r9,%r6,4095\(%r5\)
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.*: b3 a4 00 96 [ ]*cegbr %f9,%r6
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.*: b3 c4 00 96 [ ]*cegr %f9,%r6
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.*: b3 b9 90 65 [ ]*cfdr %r6,9,%f5
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.*: b3 b8 90 65 [ ]*cfer %r6,9,%f5
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.*: b3 ba 90 65 [ ]*cfxr %r6,9,%f5
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.*: e3 95 af ff 00 20 [ ]*cg %r9,4095\(%r5,%r10\)
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.*: b3 a9 f0 65 [ ]*cgdbr %r6,15,%f5
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.*: b3 c9 f0 65 [ ]*cgdr %r6,15,%f5
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@ -23,9 +23,6 @@ foo:
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cdsg %r9,%r6,4095(%r5)
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cegbr %f9,%r6
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cegr %f9,%r6
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cfdr %r6,9,%f5
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cfer %r6,9,%f5
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cfxr %r6,9,%f5
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cg %r9,4095(%r5,%r10)
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cgdbr %r6,15,%f5
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cgdr %r6,15,%f5
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@ -23,7 +23,6 @@ Disassembly of section .text:
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.*: e3 65 a0 00 80 20 [ ]*cg %r6,-524288\(%r5,%r10\)
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.*: e3 65 a0 00 80 30 [ ]*cgf %r6,-524288\(%r5,%r10\)
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.*: e3 65 a0 00 80 79 [ ]*chy %r6,-524288\(%r5,%r10\)
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.*: eb 69 50 00 80 8f [ ]*clclu %r6,%r9,-524288\(%r5\)
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.*: e3 65 a0 00 80 21 [ ]*clg %r6,-524288\(%r5,%r10\)
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.*: e3 65 a0 00 80 31 [ ]*clgf %r6,-524288\(%r5,%r10\)
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.*: eb ff 50 00 80 55 [ ]*cliy -524288\(%r5\),255
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@ -129,4 +128,3 @@ Disassembly of section .text:
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.*: e3 65 a0 00 80 82 [ ]*xg %r6,-524288\(%r5,%r10\)
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.*: eb ff 50 00 80 57 [ ]*xiy -524288\(%r5\),255
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.*: e3 65 a0 00 80 57 [ ]*xy %r6,-524288\(%r5,%r10\)
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.*: 07 07 [ ]*bcr 0,%r7
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@ -17,7 +17,6 @@ foo:
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cg %r6,-524288(%r5,%r10)
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cgf %r6,-524288(%r5,%r10)
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chy %r6,-524288(%r5,%r10)
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clclu %r6,%r9,-524288(%r5)
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clg %r6,-524288(%r5,%r10)
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clgf %r6,-524288(%r5,%r10)
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cliy -524288(%r5),255
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@ -1,3 +1,11 @@
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2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
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* s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
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(cfxr, cfdr, cfer, clclu): Add esa flag.
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(sqd): Instruction added.
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(qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
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* s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
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2008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
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* z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
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@ -273,7 +273,6 @@ const struct s390_operand s390_operands[] =
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#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
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#define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } /* e.g. fidtr */
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#define INSTR_RRF_0UFF 4, { F_24,F_28,U4_20,0,0,0 } /* e.g. ldetr */
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#define INSTR_RRF_FFFU 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. qadtr */
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#define INSTR_RRF_FFRU 4, { F_24,F_16,R_28,U4_20,0,0 } /* e.g. rrdtr */
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#define INSTR_RRF_M0RR 4, { R_24,R_28,M_16,0,0,0 } /* e.g. sske */
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#define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. clrt */
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@ -378,7 +377,6 @@ const struct s390_operand s390_operands[] =
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#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_UUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_0UFF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
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#define MASK_RRF_FFFU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_FFRU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_M0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_U0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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@ -378,8 +378,8 @@ b991 trto RRE_RR "translate two to one" g5 esa,zarch
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b990 trtt RRE_RR "translate two to two" g5 esa,zarch
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ea unpka SS_L0RDRD "unpack ascii" g5 esa,zarch
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e2 unpku SS_L0RDRD "unpack unicode" g5 esa,zarch
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b358 thder RRE_RR "convert short bfp to long hfp" g5 esa,zarch
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b359 thdr RRE_RR "convert long bfp to long hfp" g5 esa,zarch
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b358 thder RRE_FF "convert short bfp to long hfp" g5 esa,zarch
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b359 thdr RRE_FF "convert long bfp to long hfp" g5 esa,zarch
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b350 tbedr RRF_U0FF "convert long hfp to short bfp" g5 esa,zarch
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b351 tbdr RRF_U0FF "convert long hfp to long bfp" g5 esa,zarch
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b374 lzer RRE_F0 "load short zero" g5 esa,zarch
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@ -554,9 +554,9 @@ b369 cxr RRE_FF "compare extended hfp" g5 esa,zarch
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b3b6 cxfr RRE_FR "convert from fixed 32 to extended hfp" g5 esa,zarch
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b3b5 cdfr RRE_FR "convert from fixed 32 to long hfp" g5 esa,zarch
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b3b4 cefr RRE_FR "convert from fixed 32 to short hfp" g5 esa,zarch
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b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" z900 zarch
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b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" z900 zarch
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b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" z900 zarch
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b3ba cfxr RRF_U0RF "convert to fixed extended hfp to 32" z900 esa,zarch
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b3b9 cfdr RRF_U0RF "convert to fixed long hfp to 32" z900 esa,zarch
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b3b8 cfer RRF_U0RF "convert to fixed short hfp to 32" z900 esa,zarch
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b362 ltxr RRE_FF "load and test extended hfp" g5 esa,zarch
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b363 lcxr RRE_FF "load complement extended hfp" g5 esa,zarch
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b367 fixr RRE_FF "load fp integer extended hfp" g5 esa,zarch
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@ -575,6 +575,7 @@ b337 meer RRE_FF "multiply short hfp" g5 esa,zarch
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ed0000000037 mee RXE_FRRD "multiply short hfp" g5 esa,zarch
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b336 sqxr RRE_FF "square root extended hfp" g5 esa,zarch
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ed0000000034 sqe RXE_FRRD "square root short hfp" g5 esa,zarch
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ed0000000035 sqd RXE_FRRD "square root long hfp" g5 esa,zarch
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b263 cmpsc RRE_RR "compression call" g5 esa,zarch
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eb00000000c0 tp RSL_R0RD "test decimal" g5 esa,zarch
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b365 lxr RRE_FF "load extended fp" g5 esa,zarch
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@ -695,7 +696,7 @@ eb0000000044 bxhg RSY_RRRD "branch on index high 64" z990 zarch
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eb0000000045 bxleg RSY_RRRD "branch on index low or equal 64" z990 zarch
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eb0000000080 icmh RSY_RURD "insert characters under mask high with long offset" z990 zarch
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eb000000008e mvclu RSY_RRRD "move long unicode" z990 esa,zarch
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eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990 zarch
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eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990 esa,zarch
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eb0000000096 lmh RSY_RRRD "load multiple high" z990 zarch
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# new z990 instructions
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b98a cspg RRE_RR "compare and swap and purge" z990 zarch
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@ -831,8 +832,8 @@ b3d5 ledtr RRF_UUFF "load rounded long dfp" z9-ec zarch
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b3dd ldxtr RRF_UUFF "load rounded extended dfp" z9-ec zarch
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b3d0 mdtr RRR_F0FF "multiply long dfp" z9-ec zarch
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b3d8 mxtr RRR_F0FF "multiply extended dfp" z9-ec zarch
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b3f5 qadtr RRF_FFFU "Quantize long dfp" z9-ec zarch
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b3fd qaxtr RRF_FFFU "Quantize extended dfp" z9-ec zarch
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b3f5 qadtr RRF_FUFF "Quantize long dfp" z9-ec zarch
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b3fd qaxtr RRF_FUFF "Quantize extended dfp" z9-ec zarch
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b3f7 rrdtr RRF_FFRU "Reround long dfp" z9-ec zarch
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b3ff rrxtr RRF_FFRU "Reround extended dfp" z9-ec zarch
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b2b9 srnmt S_RD "set rounding mode dfp" z9-ec zarch
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Loading…
Reference in New Issue