Add ud1 to x86.
gas/testsuite/ 2010-08-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run arch-4. * gas/i386/arch-4.d: New. * gas/i386/arch-4.s: Likewise. * gas/i386/intel.d: Replace ud2a/ud2b with ud2/ud1. * gas/i386/opcode-intel.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. opcodes/ 2010-08-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1. * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b. * i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu
parent
5044134579
commit
b414985b9e
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@ -1,3 +1,15 @@
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2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp: Run arch-4.
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* gas/i386/arch-4.d: New.
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* gas/i386/arch-4.s: Likewise.
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* gas/i386/intel.d: Replace ud2a/ud2b with ud2/ud1.
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* gas/i386/opcode-intel.d: Likewise.
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* gas/i386/opcode-suffix.d: Likewise.
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* gas/i386/opcode.d: Likewise.
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2010-08-03 Alan Modra <amodra@gmail.com>
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* gas/all/octa.s, * gas/all/octa.d: New test.
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@ -0,0 +1,14 @@
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#as: -march=generic32
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#objdump: -dw
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#name: i386 arch 4
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.*: file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 0f b9 ud1
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[ ]*[a-f0-9]+: 0f 0b ud2
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[ ]*[a-f0-9]+: 0f 0b ud2
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[ ]*[a-f0-9]+: 0f b9 ud1
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#pass
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@ -0,0 +1,5 @@
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.text
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ud1
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ud2
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ud2a
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ud2b
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@ -112,6 +112,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "arch-1"
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run_dump_test "arch-2"
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run_dump_test "arch-3"
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run_dump_test "arch-4"
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run_dump_test "arch-5"
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run_dump_test "arch-6"
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run_dump_test "arch-7"
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@ -257,7 +257,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f 06 [ ]*clts
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[ ]*[a-f0-9]+: 0f 08 [ ]*invd
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[ ]*[a-f0-9]+: 0f 09 [ ]*wbinvd
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[ ]*[a-f0-9]+: 0f 0b [ ]*ud2a
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[ ]*[a-f0-9]+: 0f 0b [ ]*ud2
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[ ]*[a-f0-9]+: 0f 20 d0 [ ]*mov %cr2,%eax
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[ ]*[a-f0-9]+: 0f 21 d0 [ ]*mov %db2,%eax
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[ ]*[a-f0-9]+: 0f 22 d0 [ ]*mov %eax,%cr2
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@ -360,7 +360,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 0f b5 90 90 90 90 90 [ ]*lgs -0x6f6f6f70\(%eax\),%edx
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[ ]*[a-f0-9]+: 0f b6 90 90 90 90 90 [ ]*movzbl -0x6f6f6f70\(%eax\),%edx
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[ ]*[a-f0-9]+: 0f b7 90 90 90 90 90 [ ]*movzwl -0x6f6f6f70\(%eax\),%edx
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[ ]*[a-f0-9]+: 0f b9 [ ]*ud2b
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[ ]*[a-f0-9]+: 0f b9 [ ]*ud1
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[ ]*[a-f0-9]+: 0f bb 90 90 90 90 90 [ ]*btc %edx,-0x6f6f6f70\(%eax\)
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[ ]*[a-f0-9]+: 0f bc 90 90 90 90 90 [ ]*bsf -0x6f6f6f70\(%eax\),%edx
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[ ]*[a-f0-9]+: 0f bd 90 90 90 90 90 [ ]*bsr -0x6f6f6f70\(%eax\),%edx
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@ -255,7 +255,7 @@ Disassembly of section .text:
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*[0-9a-f]+: 0f 06[ ]+clts[ ]*
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*[0-9a-f]+: 0f 08[ ]+invd[ ]*
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*[0-9a-f]+: 0f 09[ ]+wbinvd[ ]*
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*[0-9a-f]+: 0f 0b[ ]+ud2a[ ]*
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*[0-9a-f]+: 0f 0b[ ]+ud2[ ]*
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*[0-9a-f]+: 0f 20 d0[ ]+mov[ ]+eax,cr2
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*[0-9a-f]+: 0f 21 d0[ ]+mov[ ]+eax,db2
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*[0-9a-f]+: 0f 22 d0[ ]+mov[ ]+cr2,eax
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@ -358,7 +358,7 @@ Disassembly of section .text:
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*[0-9a-f]+: 0f b5 90 90 90 90 90[ ]+lgs[ ]+edx,(FWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 0f b6 90 90 90 90 90[ ]+movzx[ ]+edx,BYTE PTR \[eax-0x6f6f6f70\]
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*[0-9a-f]+: 0f b7 90 90 90 90 90[ ]+movzx[ ]+edx,WORD PTR \[eax-0x6f6f6f70\]
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*[0-9a-f]+: 0f b9[ ]+ud2b[ ]*
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*[0-9a-f]+: 0f b9[ ]+ud1[ ]*
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*[0-9a-f]+: 0f bb 90 90 90 90 90[ ]+btc[ ]+(DWORD PTR )?\[eax-0x6f6f6f70\],edx
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*[0-9a-f]+: 0f bc 90 90 90 90 90[ ]+bsf[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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*[0-9a-f]+: 0f bd 90 90 90 90 90[ ]+bsr[ ]+edx,(DWORD PTR )?\[eax-0x6f6f6f70\]
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@ -255,7 +255,7 @@ Disassembly of section .text:
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*[0-9a-f]+: 0f 06[ ]+clts[ ]+
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*[0-9a-f]+: 0f 08[ ]+invd[ ]+
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*[0-9a-f]+: 0f 09[ ]+wbinvd
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*[0-9a-f]+: 0f 0b[ ]+ud2a[ ]+
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*[0-9a-f]+: 0f 0b[ ]+ud2[ ]+
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*[0-9a-f]+: 0f 20 d0[ ]+movl[ ]+%cr2,%eax
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*[0-9a-f]+: 0f 21 d0[ ]+movl[ ]+%db2,%eax
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*[0-9a-f]+: 0f 22 d0[ ]+movl[ ]+%eax,%cr2
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@ -358,7 +358,7 @@ Disassembly of section .text:
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*[0-9a-f]+: 0f b5 90 90 90 90 90[ ]+lgsl[ ]+-0x6f6f6f70\(%eax\),%edx
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*[0-9a-f]+: 0f b6 90 90 90 90 90[ ]+movzbl -0x6f6f6f70\(%eax\),%edx
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*[0-9a-f]+: 0f b7 90 90 90 90 90[ ]+movzwl -0x6f6f6f70\(%eax\),%edx
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*[0-9a-f]+: 0f b9[ ]+ud2b[ ]+
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*[0-9a-f]+: 0f b9[ ]+ud1[ ]+
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*[0-9a-f]+: 0f bb 90 90 90 90 90[ ]+btcl[ ]+%edx,-0x6f6f6f70\(%eax\)
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*[0-9a-f]+: 0f bc 90 90 90 90 90[ ]+bsfl[ ]+-0x6f6f6f70\(%eax\),%edx
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*[0-9a-f]+: 0f bd 90 90 90 90 90[ ]+bsrl[ ]+-0x6f6f6f70\(%eax\),%edx
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@ -254,7 +254,7 @@ Disassembly of section .text:
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327: 0f 06 [ ]*clts
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329: 0f 08 [ ]*invd
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32b: 0f 09 [ ]*wbinvd
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32d: 0f 0b [ ]*ud2a
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32d: 0f 0b [ ]*ud2
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32f: 0f 20 d0 [ ]*mov %cr2,%eax
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332: 0f 21 d0 [ ]*mov %db2,%eax
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335: 0f 22 d0 [ ]*mov %eax,%cr2
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@ -357,7 +357,7 @@ Disassembly of section .text:
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57e: 0f b5 90 90 90 90 90 [ ]*lgs -0x6f6f6f70\(%eax\),%edx
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585: 0f b6 90 90 90 90 90 [ ]*movzbl -0x6f6f6f70\(%eax\),%edx
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58c: 0f b7 90 90 90 90 90 [ ]*movzwl -0x6f6f6f70\(%eax\),%edx
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593: 0f b9 [ ]*ud2b
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593: 0f b9 [ ]*ud1
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595: 0f bb 90 90 90 90 90 [ ]*btc %edx,-0x6f6f6f70\(%eax\)
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59c: 0f bc 90 90 90 90 90 [ ]*bsf -0x6f6f6f70\(%eax\),%edx
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5a3: 0f bd 90 90 90 90 90 [ ]*bsr -0x6f6f6f70\(%eax\),%edx
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@ -1,3 +1,10 @@
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2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
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* i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
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* i386-tbl.h: Regenerated.
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2010-07-29 DJ Delorie <dj@redhat.com>
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* rx-decode.opc (SRR): New.
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@ -1959,7 +1959,7 @@ static const struct dis386 dis386_twobyte[] = {
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{ "invd", { XX } },
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{ "wbinvd", { XX } },
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{ Bad_Opcode },
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{ "ud2a", { XX } },
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{ "ud2", { XX } },
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{ Bad_Opcode },
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{ REG_TABLE (REG_0F0D) },
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{ "femms", { XX } },
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@ -2155,7 +2155,7 @@ static const struct dis386 dis386_twobyte[] = {
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{ "movz{wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
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/* b8 */
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{ PREFIX_TABLE (PREFIX_0FB8) },
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{ "ud2b", { XX } },
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{ "ud1", { XX } },
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{ REG_TABLE (REG_0FBA) },
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{ "btcS", { Ev, Gv } },
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{ "bsfS", { Gv, Ev } },
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@ -853,11 +853,13 @@ fxrstor, 1, 0xfae, 0x1, 2, Cpu686, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSu
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fxrstor64, 1, 0xfae, 0x1, 2, Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf|Rex64, { Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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rdpmc, 0, 0xf33, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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// official undefined instr.
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ud2, 0, 0xf0b, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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ud2, 0, 0xf0b, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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// alias for ud2
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ud2a, 0, 0xf0b, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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ud2a, 0, 0xf0b, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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// 2nd. official undefined instr.
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ud2b, 0, 0xfb9, None, 2, Cpu686, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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ud1, 0, 0xfb9, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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// alias for ud1
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ud2b, 0, 0xfb9, None, 2, 0, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
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cmovo, 2, 0xf40, None, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
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cmovno, 2, 0xf41, None, 2, Cpu686, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
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@ -6943,7 +6943,7 @@ const insn_template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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{ "ud2", 0, 0xf0b, None, 2,
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{ { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
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@ -6953,7 +6953,17 @@ const insn_template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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{ "ud2a", 0, 0xf0b, None, 2,
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{ { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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{ "ud1", 0, 0xfb9, None, 2,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
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@ -6963,7 +6973,7 @@ const insn_template i386_optab[] =
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } } } },
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{ "ud2b", 0, 0xfb9, None, 2,
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{ { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,
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