diff --git a/bfd/ChangeLog b/bfd/ChangeLog index e088cdcad2..cd5cb579d1 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,11 @@ +2017-06-26 Maciej W. Rozycki + + * cpu-mips.c (arch_info_struct): Mark the 4010 32-bit. + * elfxx-mips.c (mips_set_isa_flags) : Set + E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'. + (mips_mach_extensions): Mark `bfd_mach_mips4010' as extending + `bfd_mach_mips6000' rather than `bfd_mach_mips4000'. + 2017-06-26 H.J. Lu PR binutils/21665 diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c index b9ecdd6e55..70a8aa71cc 100644 --- a/bfd/cpu-mips.c +++ b/bfd/cpu-mips.c @@ -114,7 +114,7 @@ static const bfd_arch_info_type arch_info_struct[] = N (32, 32, bfd_mach_mips3000, "mips:3000", FALSE, NN(I_mips3000)), N (32, 32, bfd_mach_mips3900, "mips:3900", FALSE, NN(I_mips3900)), N (64, 64, bfd_mach_mips4000, "mips:4000", FALSE, NN(I_mips4000)), - N (64, 64, bfd_mach_mips4010, "mips:4010", FALSE, NN(I_mips4010)), + N (32, 32, bfd_mach_mips4010, "mips:4010", FALSE, NN(I_mips4010)), N (64, 64, bfd_mach_mips4100, "mips:4100", FALSE, NN(I_mips4100)), N (64, 64, bfd_mach_mips4111, "mips:4111", FALSE, NN(I_mips4111)), N (64, 64, bfd_mach_mips4120, "mips:4120", FALSE, NN(I_mips4120)), diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 830207ad6a..e326edd325 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -11863,6 +11863,10 @@ mips_set_isa_flags (bfd *abfd) val = E_MIPS_ARCH_2; break; + case bfd_mach_mips4010: + val = E_MIPS_ARCH_2 | E_MIPS_MACH_4010; + break; + case bfd_mach_mips4000: case bfd_mach_mips4300: case bfd_mach_mips4400: @@ -11870,10 +11874,6 @@ mips_set_isa_flags (bfd *abfd) val = E_MIPS_ARCH_3; break; - case bfd_mach_mips4010: - val = E_MIPS_ARCH_3 | E_MIPS_MACH_4010; - break; - case bfd_mach_mips4100: val = E_MIPS_ARCH_3 | E_MIPS_MACH_4100; break; @@ -14024,7 +14024,6 @@ static const struct mips_mach_extension mips_mach_extensions[] = { bfd_mach_mips4400, bfd_mach_mips4000 }, { bfd_mach_mips4300, bfd_mach_mips4000 }, { bfd_mach_mips4100, bfd_mach_mips4000 }, - { bfd_mach_mips4010, bfd_mach_mips4000 }, { bfd_mach_mips5900, bfd_mach_mips4000 }, /* MIPS32 extensions. */ @@ -14033,6 +14032,7 @@ static const struct mips_mach_extension mips_mach_extensions[] = /* MIPS II extensions. */ { bfd_mach_mips4000, bfd_mach_mips6000 }, { bfd_mach_mipsisa32, bfd_mach_mips6000 }, + { bfd_mach_mips4010, bfd_mach_mips6000 }, /* MIPS I extensions. */ { bfd_mach_mips6000, bfd_mach_mips3000 }, diff --git a/ld/ChangeLog b/ld/ChangeLog index 9b16d43724..b92a82bb0d 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,8 @@ +2017-06-26 Maciej W. Rozycki + + * testsuite/ld-mips-elf/lsi-4010-isa.d: New test. + * ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test. + 2017-06-26 Maciej W. Rozycki * testsuite/ld-elf/sizeofa.d: Also accept the OBJECT type for diff --git a/ld/testsuite/ld-mips-elf/lsi-4010-isa.d b/ld/testsuite/ld-mips-elf/lsi-4010-isa.d new file mode 100644 index 0000000000..5e7872338f --- /dev/null +++ b/ld/testsuite/ld-mips-elf/lsi-4010-isa.d @@ -0,0 +1,23 @@ +#readelf: -Ah +#name: LSI 4010 processor ISA level +#source: empty.s +#as: -EB -32 -m4010 +#ld: -EB -r + +ELF Header: +#... + Flags: 0x1082[01]000, 4010(?:, o32)?, mips2 +#... + +MIPS ABI Flags Version: 0 + +ISA: MIPS2 +GPR size: 32 +CPR1 size: 32 +CPR2 size: 0 +FP ABI: .* +ISA Extension: LSI R4010 +ASEs: + None +FLAGS 1: .* +FLAGS 2: .* diff --git a/ld/testsuite/ld-mips-elf/mips-elf.exp b/ld/testsuite/ld-mips-elf/mips-elf.exp index e24c32cd80..66b2ae4677 100644 --- a/ld/testsuite/ld-mips-elf/mips-elf.exp +++ b/ld/testsuite/ld-mips-elf/mips-elf.exp @@ -1176,3 +1176,6 @@ run_ld_link_tests [list \ {{objdump {-d --prefix-addresses} pr21334.dd} \ {readelf -A pr21334.gd}} \ "pr21334"]] + +# Check that the ISA level is consistently II for the LSI 4010. +run_dump_test "lsi-4010-isa" [list [list ld $abi_ldflags(o32)]]