[gdbarch] New method "execute_dwarf_cfa_vendor_op" and migrate SPARC to it
Recently a feature called "return address signing" has been added to GCC to prevent stack smash stack on AArch64. For details please refer: https://gcc.gnu.org/ml/gcc-patches/2017-01/msg00376.html GDB needs to be aware of this feature so it can restore the original return address which is critical for unwinding. On compiler side, whenever return address, i.e. LR register, is mangled or restored by hardware instruction, compiler is expected to generate a DW_CFA_AARCH64_negate_ra_state to toggle return address signing status. DW_CFA_AARCH64_negate_ra_state is using the same CFI number and therefore need to be multiplexed with DW_CFA_GNU_window_save which was designed for SPARC. A new gdbarch method "execute_dwarf_cfa_vendor_op" is introduced by this patch. It's parameters has been restricted to those only needed by SPARC and AArch64 for multiplexing DW_CFA_GNU_window_save which is a CFI operation takes none operand. Should any further DWARF CFI operation want to be multiplexed in the future, the parameter list can be extended. Below is the current function prototype. typedef int (gdbarch_execute_dwarf_cfa_vendor_op_ftype) (struct gdbarch *gdbarch, gdb_byte op, struct dwarf2_frame_state *fs); DW_CFA_GNU_window_save support for SPARC is migrated to this new gdbarch method by this patch. gdb/ * gdbarch.sh: New gdbarch method execute_dwarf_cfa_vendor_op. * gdbarch.c: Regenerated. * gdbarch.h: Regenerated. * dwarf2-frame.c (dwarf2_frame_state_alloc_regs): Made the visibility external. (execute_cfa_program): Call execute_dwarf_cfa_vendor_op for CFI between DW_CFA_lo_user and DW_CFA_high_user inclusive. (enum cfa_how_kind): Move to ... (struct dwarf2_frame_state_reg_info): Likewise. (struct dwarf2_frame_state): Likewise. * dwarf2-frame.h: ... here. (dwarf2_frame_state_alloc_regs): New declaration. * sparc-tdep.c (sparc_execute_dwarf_cfa_vendor_op): New function. (sparc32_gdbarch_init): Register execute_dwarf_cfa_vendor_op hook.
This commit is contained in:
Jiong Wang
parent
23ec1e32b1
commit
b41c5a85a7
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@ -1,3 +1,20 @@
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2017-04-26 Jiong Wang <jiong.wang@arm.com>
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* gdbarch.sh: New gdbarch method execute_dwarf_cfa_vendor_op.
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* gdbarch.c: Regenerated.
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* gdbarch.h: Regenerated.
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* dwarf2-frame.c (dwarf2_frame_state_alloc_regs): Made the
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visibility external.
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(execute_cfa_program): Call execute_dwarf_cfa_vendor_op for CFI
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between DW_CFA_lo_user and DW_CFA_high_user inclusive.
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(enum cfa_how_kind): Move to ...
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(struct dwarf2_frame_state_reg_info): Likewise.
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(struct dwarf2_frame_state): Likewise.
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* dwarf2-frame.h: ... here.
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(dwarf2_frame_state_alloc_regs): New declaration.
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* sparc-tdep.c (sparc_execute_dwarf_cfa_vendor_op): New function.
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(sparc32_gdbarch_init): Register execute_dwarf_cfa_vendor_op hook.
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2017-04-26 Alan Hayward <alan.hayward@arm.com>
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* xtensa-tdep.c (xtensa_pseudo_register_read): Use
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@ -204,6 +204,15 @@ default_adjust_dwarf2_line (CORE_ADDR addr, int rel)
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return addr;
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}
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/* See arch-utils.h. */
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bool
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default_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op,
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struct dwarf2_frame_state *fs)
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{
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return false;
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}
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int
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cannot_register_not (struct gdbarch *gdbarch, int regnum)
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{
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@ -25,6 +25,7 @@ struct frame_info;
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struct minimal_symbol;
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struct type;
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struct gdbarch_info;
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struct dwarf2_frame_state;
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template <size_t bp_size, const gdb_byte *break_insn>
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struct bp_manipulation
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@ -130,6 +131,11 @@ CORE_ADDR default_adjust_dwarf2_addr (CORE_ADDR pc);
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CORE_ADDR default_adjust_dwarf2_line (CORE_ADDR addr, int rel);
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/* Default DWARF vendor CFI handler. */
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bool default_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op,
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struct dwarf2_frame_state *fs);
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/* Version of cannot_fetch_register() / cannot_store_register() that
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always fails. */
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@ -165,58 +165,6 @@ static CORE_ADDR read_encoded_value (struct comp_unit *unit, gdb_byte encoding,
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CORE_ADDR func_base);
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enum cfa_how_kind
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{
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CFA_UNSET,
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CFA_REG_OFFSET,
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CFA_EXP
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};
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struct dwarf2_frame_state_reg_info
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{
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struct dwarf2_frame_state_reg *reg;
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int num_regs;
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LONGEST cfa_offset;
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ULONGEST cfa_reg;
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enum cfa_how_kind cfa_how;
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const gdb_byte *cfa_exp;
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/* Used to implement DW_CFA_remember_state. */
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struct dwarf2_frame_state_reg_info *prev;
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};
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/* Structure describing a frame state. */
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struct dwarf2_frame_state
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{
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/* Each register save state can be described in terms of a CFA slot,
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another register, or a location expression. */
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struct dwarf2_frame_state_reg_info regs;
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/* The PC described by the current frame state. */
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CORE_ADDR pc;
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/* Initial register set from the CIE.
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Used to implement DW_CFA_restore. */
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struct dwarf2_frame_state_reg_info initial;
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/* The information we care about from the CIE. */
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LONGEST data_align;
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ULONGEST code_align;
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ULONGEST retaddr_column;
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/* Flags for known producer quirks. */
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/* The ARM compilers, in DWARF2 mode, assume that DW_CFA_def_cfa
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and DW_CFA_def_cfa_offset takes a factored offset. */
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int armcc_cfa_offsets_sf;
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/* The ARM compilers, in DWARF2 or DWARF3 mode, may assume that
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the CFA is defined as REG - OFFSET rather than REG + OFFSET. */
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int armcc_cfa_offsets_reversed;
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};
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/* Store the length the expression for the CFA in the `cfa_reg' field,
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which is unused in that case. */
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#define cfa_exp_len cfa_reg
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@ -224,7 +172,7 @@ struct dwarf2_frame_state
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/* Assert that the register set RS is large enough to store gdbarch_num_regs
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columns. If necessary, enlarge the register set. */
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static void
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void
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dwarf2_frame_state_alloc_regs (struct dwarf2_frame_state_reg_info *rs,
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int num_regs)
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{
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@ -672,31 +620,6 @@ bad CFI data; mismatched DW_CFA_restore_state at %s"),
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/* cfa_how deliberately not set. */
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break;
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case DW_CFA_GNU_window_save:
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/* This is SPARC-specific code, and contains hard-coded
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constants for the register numbering scheme used by
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GCC. Rather than having a architecture-specific
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operation that's only ever used by a single
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architecture, we provide the implementation here.
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Incidentally that's what GCC does too in its
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unwinder. */
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{
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int size = register_size (gdbarch, 0);
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dwarf2_frame_state_alloc_regs (&fs->regs, 32);
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for (reg = 8; reg < 16; reg++)
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{
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fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
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fs->regs.reg[reg].loc.reg = reg + 16;
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}
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for (reg = 16; reg < 32; reg++)
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{
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fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
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fs->regs.reg[reg].loc.offset = (reg - 16) * size;
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}
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}
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break;
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case DW_CFA_GNU_args_size:
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/* Ignored. */
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insn_ptr = safe_read_uleb128 (insn_ptr, insn_end, &utmp);
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@ -713,8 +636,17 @@ bad CFI data; mismatched DW_CFA_restore_state at %s"),
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break;
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default:
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internal_error (__FILE__, __LINE__,
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_("Unknown CFI encountered."));
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if (insn >= DW_CFA_lo_user && insn <= DW_CFA_hi_user)
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{
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/* Handle vendor-specific CFI for different architectures. */
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if (!gdbarch_execute_dwarf_cfa_vendor_op (gdbarch, insn, fs))
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error (_("Call Frame Instruction op %d in vendor extension "
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"space is not handled on this architecture."),
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insn);
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}
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else
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internal_error (__FILE__, __LINE__,
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_("Unknown CFI encountered."));
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}
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}
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}
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@ -82,6 +82,58 @@ struct dwarf2_frame_state_reg
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enum dwarf2_frame_reg_rule how;
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};
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enum cfa_how_kind
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{
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CFA_UNSET,
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CFA_REG_OFFSET,
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CFA_EXP
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};
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struct dwarf2_frame_state_reg_info
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{
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struct dwarf2_frame_state_reg *reg;
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int num_regs;
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LONGEST cfa_offset;
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ULONGEST cfa_reg;
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enum cfa_how_kind cfa_how;
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const gdb_byte *cfa_exp;
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/* Used to implement DW_CFA_remember_state. */
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struct dwarf2_frame_state_reg_info *prev;
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};
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/* Structure describing a frame state. */
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struct dwarf2_frame_state
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{
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/* Each register save state can be described in terms of a CFA slot,
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another register, or a location expression. */
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struct dwarf2_frame_state_reg_info regs;
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/* The PC described by the current frame state. */
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CORE_ADDR pc;
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/* Initial register set from the CIE.
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Used to implement DW_CFA_restore. */
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struct dwarf2_frame_state_reg_info initial;
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/* The information we care about from the CIE. */
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LONGEST data_align;
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ULONGEST code_align;
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ULONGEST retaddr_column;
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/* Flags for known producer quirks. */
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/* The ARM compilers, in DWARF2 mode, assume that DW_CFA_def_cfa
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and DW_CFA_def_cfa_offset takes a factored offset. */
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int armcc_cfa_offsets_sf;
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/* The ARM compilers, in DWARF2 or DWARF3 mode, may assume that
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the CFA is defined as REG - OFFSET rather than REG + OFFSET. */
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int armcc_cfa_offsets_reversed;
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};
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/* Set the architecture-specific register state initialization
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function for GDBARCH to INIT_REG. */
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@ -120,6 +172,12 @@ extern const struct frame_base *
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CORE_ADDR dwarf2_frame_cfa (struct frame_info *this_frame);
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/* Assert that the register set RS is large enough to store gdbarch_num_regs
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columns. If necessary, enlarge the register set. */
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void dwarf2_frame_state_alloc_regs (struct dwarf2_frame_state_reg_info *rs,
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int num_regs);
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/* Find the CFA information for PC.
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Return 1 if a register is used for the CFA, or 0 if another
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@ -275,6 +275,7 @@ struct gdbarch
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int have_nonsteppable_watchpoint;
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gdbarch_address_class_type_flags_ftype *address_class_type_flags;
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gdbarch_address_class_type_flags_to_name_ftype *address_class_type_flags_to_name;
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gdbarch_execute_dwarf_cfa_vendor_op_ftype *execute_dwarf_cfa_vendor_op;
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gdbarch_address_class_name_to_type_flags_ftype *address_class_name_to_type_flags;
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gdbarch_register_reggroup_p_ftype *register_reggroup_p;
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gdbarch_fetch_pointer_argument_ftype *fetch_pointer_argument;
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@ -436,6 +437,7 @@ gdbarch_alloc (const struct gdbarch_info *info,
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gdbarch->make_symbol_special = default_make_symbol_special;
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gdbarch->adjust_dwarf2_addr = default_adjust_dwarf2_addr;
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gdbarch->adjust_dwarf2_line = default_adjust_dwarf2_line;
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gdbarch->execute_dwarf_cfa_vendor_op = default_execute_dwarf_cfa_vendor_op;
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gdbarch->register_reggroup_p = default_register_reggroup_p;
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gdbarch->skip_permanent_breakpoint = default_skip_permanent_breakpoint;
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gdbarch->displaced_step_hw_singlestep = default_displaced_step_hw_singlestep;
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@ -634,6 +636,7 @@ verify_gdbarch (struct gdbarch *gdbarch)
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/* Skip verify of have_nonsteppable_watchpoint, invalid_p == 0 */
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/* Skip verify of address_class_type_flags, has predicate. */
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/* Skip verify of address_class_type_flags_to_name, has predicate. */
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/* Skip verify of execute_dwarf_cfa_vendor_op, invalid_p == 0 */
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/* Skip verify of address_class_name_to_type_flags, has predicate. */
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/* Skip verify of register_reggroup_p, invalid_p == 0 */
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/* Skip verify of fetch_pointer_argument, has predicate. */
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@ -974,6 +977,9 @@ gdbarch_dump (struct gdbarch *gdbarch, struct ui_file *file)
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fprintf_unfiltered (file,
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"gdbarch_dump: elfcore_write_linux_prpsinfo = <%s>\n",
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host_address_to_string (gdbarch->elfcore_write_linux_prpsinfo));
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fprintf_unfiltered (file,
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"gdbarch_dump: execute_dwarf_cfa_vendor_op = <%s>\n",
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host_address_to_string (gdbarch->execute_dwarf_cfa_vendor_op));
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fprintf_unfiltered (file,
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"gdbarch_dump: fast_tracepoint_valid_at = <%s>\n",
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host_address_to_string (gdbarch->fast_tracepoint_valid_at));
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@ -3523,6 +3529,23 @@ set_gdbarch_address_class_type_flags_to_name (struct gdbarch *gdbarch,
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gdbarch->address_class_type_flags_to_name = address_class_type_flags_to_name;
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}
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bool
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gdbarch_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op, struct dwarf2_frame_state *fs)
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{
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gdb_assert (gdbarch != NULL);
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gdb_assert (gdbarch->execute_dwarf_cfa_vendor_op != NULL);
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if (gdbarch_debug >= 2)
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fprintf_unfiltered (gdb_stdlog, "gdbarch_execute_dwarf_cfa_vendor_op called\n");
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return gdbarch->execute_dwarf_cfa_vendor_op (gdbarch, op, fs);
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}
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void
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set_gdbarch_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch,
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gdbarch_execute_dwarf_cfa_vendor_op_ftype execute_dwarf_cfa_vendor_op)
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{
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gdbarch->execute_dwarf_cfa_vendor_op = execute_dwarf_cfa_vendor_op;
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}
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int
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gdbarch_address_class_name_to_type_flags_p (struct gdbarch *gdbarch)
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{
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@ -827,6 +827,13 @@ typedef const char * (gdbarch_address_class_type_flags_to_name_ftype) (struct gd
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extern const char * gdbarch_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags);
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extern void set_gdbarch_address_class_type_flags_to_name (struct gdbarch *gdbarch, gdbarch_address_class_type_flags_to_name_ftype *address_class_type_flags_to_name);
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/* Execute vendor-specific DWARF Call Frame Instruction. OP is the instruction.
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FS are passed from the generic execute_cfa_program function. */
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typedef bool (gdbarch_execute_dwarf_cfa_vendor_op_ftype) (struct gdbarch *gdbarch, gdb_byte op, struct dwarf2_frame_state *fs);
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extern bool gdbarch_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op, struct dwarf2_frame_state *fs);
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extern void set_gdbarch_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdbarch_execute_dwarf_cfa_vendor_op_ftype *execute_dwarf_cfa_vendor_op);
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/* Return the appropriate type_flags for the supplied address class.
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This function should return 1 if the address class was recognized and
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type_flags was set, zero otherwise. */
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@ -708,6 +708,9 @@ v:int:cannot_step_breakpoint:::0:0::0
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v:int:have_nonsteppable_watchpoint:::0:0::0
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F:int:address_class_type_flags:int byte_size, int dwarf2_addr_class:byte_size, dwarf2_addr_class
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M:const char *:address_class_type_flags_to_name:int type_flags:type_flags
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# Execute vendor-specific DWARF Call Frame Instruction. OP is the instruction.
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# FS are passed from the generic execute_cfa_program function.
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m:bool:execute_dwarf_cfa_vendor_op:gdb_byte op, struct dwarf2_frame_state *fs:op, fs::default_execute_dwarf_cfa_vendor_op::0
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# Return the appropriate type_flags for the supplied address class.
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# This function should return 1 if the address class was recognized and
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@ -20,6 +20,7 @@
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#include "defs.h"
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#include "arch-utils.h"
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#include "dis-asm.h"
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#include "dwarf2.h"
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#include "dwarf2-frame.h"
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#include "floatformat.h"
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#include "frame.h"
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@ -1536,6 +1537,34 @@ sparc32_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
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}
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}
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/* Implement the execute_dwarf_cfa_vendor_op method. */
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static bool
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sparc_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op,
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struct dwarf2_frame_state *fs)
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{
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/* Only DW_CFA_GNU_window_save is expected on SPARC. */
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if (op != DW_CFA_GNU_window_save)
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return false;
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uint64_t reg;
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int size = register_size (gdbarch, 0);
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dwarf2_frame_state_alloc_regs (&fs->regs, 32);
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for (reg = 8; reg < 16; reg++)
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{
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fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_REG;
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fs->regs.reg[reg].loc.reg = reg + 16;
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}
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for (reg = 16; reg < 32; reg++)
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{
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fs->regs.reg[reg].how = DWARF2_FRAME_REG_SAVED_OFFSET;
|
||||
fs->regs.reg[reg].loc.offset = (reg - 16) * size;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
/* The SPARC Architecture doesn't have hardware single-step support,
|
||||
and most operating systems don't implement it either, so we provide
|
||||
|
|
@ -1801,6 +1830,9 @@ sparc32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
|
||||
/* Hook in the DWARF CFI frame unwinder. */
|
||||
dwarf2_frame_set_init_reg (gdbarch, sparc32_dwarf2_frame_init_reg);
|
||||
/* Register DWARF vendor CFI handler. */
|
||||
set_gdbarch_execute_dwarf_cfa_vendor_op (gdbarch,
|
||||
sparc_execute_dwarf_cfa_vendor_op);
|
||||
/* FIXME: kettenis/20050423: Don't enable the unwinder until the
|
||||
StackGhost issues have been resolved. */
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue