sim/testsuite/or1k: Add test for 64-bit fpu operations
This is a very basic test but it ensure the machine is wired up correctly and that the assembler works. sim/testsuite/sim/or1k/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * fpu64a32.S: New file.
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Stafford Horne
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2019-06-13 Stafford Horne <shorne@gmail.com>
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* fpu64a32.S: New file.
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2018-10-05 Stafford Horne <shorne@gmail.com>
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* div.S: Fix tests to match correct overflow/carry semantics.
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172
sim/testsuite/sim/or1k/fpu64a32.S
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172
sim/testsuite/sim/or1k/fpu64a32.S
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/* Tests some basic fpu instructions.
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Copyright (C) 2019 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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# mach: or1k
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# output: report(0x400921f9);\n
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# output: report(0xf01b866e);\n
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# output: report(0x4005bf09);\n
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# output: report(0x95aaf790);\n
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# output: report(0x00000000);\n
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# output: report(0x00001234);\n
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# output: \n
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# output: report(0x40b23400);\n
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# output: report(0x00000000);\n
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# output: report(0x40b23400);\n
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# output: report(0x00000000);\n
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# output: \n
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# output: report(0x40177081);\n
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# output: report(0xc2e33eff);\n
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# output: report(0x400921f9);\n
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# output: report(0xf01b866e);\n
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# output: \n
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# output: report(0x40211456);\n
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# output: report(0x587dfabf);\n
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# output: report(0x400921f9);\n
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# output: report(0xf01b866d);\n
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# output: \n
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# output: report(0x00000001);\n
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# output: \n
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# output: WARNING: ignoring fpu error caught in fast mode.\n
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# output: report(0x00000000);\n
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# output: \n
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# output: exit(0)\n
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#include "or1k-asm-test-helpers.h"
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STANDARD_TEST_ENVIRONMENT
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.section .exception_vectors
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/* Floating point exception. */
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.org 0xd00
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/* The handling is a bit dubious at present. We just patch the
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instruction with l.nop and restart. This will go wrong in branch
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delay slots. But we don't have those in this test. */
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l.addi r1, r1, -EXCEPTION_STACK_SKIP_SIZE
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PUSH r2
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PUSH r3
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/* Save the address of the instruction that caused the problem. */
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MOVE_FROM_SPR r2, SPR_EPCR_BASE
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LOAD_IMMEDIATE r3, 0x15000000 /* Opcode for l.nop */
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l.sw -4(r2), r3
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POP r3
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POP r2
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l.addi r1, r1, EXCEPTION_STACK_SKIP_SIZE
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l.rfe
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.section .data
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.align 4
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.type pi, @object
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.size pi, 8
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anchor:
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pi:
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.double 3.14159
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.type e, @object
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.size e, 8
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e:
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.double 2.71828
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.type large, @object
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.size large, 8
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large:
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.long 0
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.long 0x1234
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.section .text
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start_tests:
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PUSH LINK_REGISTER_R9
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/* Test lf.itof.d int to double conversion. Setting up:
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* r11 pointer to data
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* r12,r13 pi as double
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* r14,r15 e as double
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* r16,r17 a long long
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*/
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l.ori r11, r0, ha(anchor)
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l.addi r11, r11, lo(anchor)
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l.lwz r12, 0(r11)
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l.lwz r13, 4(r11)
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l.lwz r14, 8(r11)
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l.lwz r15, 12(r11)
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l.lwz r16, 16(r11)
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l.lwz r18, 20(r11)
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/* Output to ensure we loaded it correctly. */
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REPORT_REG_TO_CONSOLE r12
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REPORT_REG_TO_CONSOLE r13
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REPORT_REG_TO_CONSOLE r14
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REPORT_REG_TO_CONSOLE r15
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REPORT_REG_TO_CONSOLE r16
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REPORT_REG_TO_CONSOLE r18
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PRINT_NEWLINE_TO_CONSOLE
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/* Convert the big long to a double. */
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lf.itof.d r16,r18, r16,r18
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REPORT_REG_TO_CONSOLE r16
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REPORT_REG_TO_CONSOLE r18
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/* Convert the double back to a long, it should match before. */
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lf.ftoi.d r16,r18, r16,r18
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lf.itof.d r16,r18, r16,r18
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REPORT_REG_TO_CONSOLE r16
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REPORT_REG_TO_CONSOLE r18
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PRINT_NEWLINE_TO_CONSOLE
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/* Add and subtract some double values. */
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lf.add.d r12,r13, r12,r13, r14,r15
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REPORT_REG_TO_CONSOLE r12
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REPORT_REG_TO_CONSOLE r13
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lf.sub.d r12,r13, r12,r13, r14,r15
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REPORT_REG_TO_CONSOLE r12
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REPORT_REG_TO_CONSOLE r13
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PRINT_NEWLINE_TO_CONSOLE
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/* Multiply and divide double values. */
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lf.mul.d r12,r13, r12,r13, r14,r15
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REPORT_REG_TO_CONSOLE r12
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REPORT_REG_TO_CONSOLE r13
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lf.div.d r12,r13, r12,r13, r14,r15
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REPORT_REG_TO_CONSOLE r12
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REPORT_REG_TO_CONSOLE r13
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PRINT_NEWLINE_TO_CONSOLE
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/* Test lf.sfge.s set flag if r6 >= r10. */
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lf.sfge.d r12,r13, r14,r15
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MOVE_FROM_SPR r2, SPR_SR
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REPORT_BIT_TO_CONSOLE r2, SPR_SR_F
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PRINT_NEWLINE_TO_CONSOLE
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/* Test raising an exception by dividing by 0. */
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MOVE_FROM_SPR r2, SPR_FPCSR
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l.ori r2, r2, 0x1
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MOVE_TO_SPR SPR_FPCSR, r2
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div0: lf.div.d r2,r3, r12,r13, r0,r1
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REPORT_EXCEPTION div0
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PRINT_NEWLINE_TO_CONSOLE
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POP LINK_REGISTER_R9
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RETURN_TO_LINK_REGISTER_R9
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