* mips-tdep.c (mips_step_skips_delay), config/mips/tm-mips.h
(STEP_SKIPS_DELAY): Added. * infrun.c (proceed) [STEP_SKIPS_DELAY]: Check for a breakpoint in the delay slot.
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@ -1,5 +1,10 @@
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Mon Feb 28 12:40:46 1994 Jim Kingdon (kingdon@deneb.cygnus.com)
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* mips-tdep.c (mips_step_skips_delay), config/mips/tm-mips.h
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(STEP_SKIPS_DELAY): Added.
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* infrun.c (proceed) [STEP_SKIPS_DELAY]: Check for a breakpoint in
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the delay slot.
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* valprint.c (val_print_string): If errcode is set, always print
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an error, regardless of force_ellipsis. In the non-EIO case,
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just print the error message rather than calling error(). Don't
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@ -46,6 +46,10 @@ extern int mips_fpu;
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#define SKIP_PROLOGUE(pc) pc = mips_skip_prologue (pc, 0)
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extern CORE_ADDR mips_skip_prologue PARAMS ((CORE_ADDR addr, int lenient));
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/* Return non-zero if PC points to an instruction which will cause a step
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to execute both the instruction at PC and an instruction at PC+4. */
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#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
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/* Immediately after a function call, return the saved pc.
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Can't always go through the frames for this because on some machines
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the new frame is not set up until the new function executes
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@ -280,6 +280,15 @@ proceed (addr, siggnal, step)
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if (breakpoint_here_p (read_pc ()))
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oneproc = 1;
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#ifdef STEP_SKIPS_DELAY
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/* Check breakpoint_here_p first, because breakpoint_here_p is fast
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(it just checks internal GDB data structures) and STEP_SKIPS_DELAY
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is slow (it needs to read memory from the target). */
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if (breakpoint_here_p (read_pc () + 4)
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&& STEP_SKIPS_DELAY (read_pc ()))
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oneproc = 1;
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#endif /* STEP_SKIPS_DELAY */
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}
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else
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write_pc (addr);
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@ -32,9 +32,7 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "objfiles.h"
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#include "gdbtypes.h"
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#if 0
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#include "opcode/mips.h"
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#endif
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#define VM_MIN_ADDRESS (unsigned)0x400000
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@ -921,8 +919,9 @@ mips_frame_num_args(fip)
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return -1;
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}
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#if 0
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/* Is this a branch with a delay slot? */
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static int is_delayed PARAMS ((unsigned long));
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static int
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is_delayed (insn)
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unsigned long insn;
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@ -937,7 +936,18 @@ is_delayed (insn)
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| INSN_COND_BRANCH_DELAY
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| INSN_COND_BRANCH_LIKELY)));
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}
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#endif
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int
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mips_step_skips_delay (pc)
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CORE_ADDR pc;
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{
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char buf[4];
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if (target_read_memory (pc, buf, 4) != 0)
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/* If error reading memory, guess that it is not a delayed branch. */
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return 0;
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return is_delayed (extract_unsigned_integer (buf, 4));
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}
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/* To skip prologues, I use this predicate. Returns either PC itself
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if the code at PC does not look like a function prologue; otherwise
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