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x86: don't default variable shift count insns to 8-bit operand size

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Just like %dx in I/O instructions isn't suitable to derive operand size
information, %cl source operands of shift instructions aren't.
This commit is contained in:
Jan Beulich 2017-11-13 12:22:21 +01:00 committed by Jan Beulich
parent 897e603cb9
commit b76bc5d54e
4 changed files with 20 additions and 1 deletions
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7
gas/ChangeLog
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@ -1,3 +1,10 @@
2017-11-13 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (process_suffix): Treat .shiftcount just like
.inoutportreg.
* testsuite/gas/i386/inval.s: Add ambiguous shift/rotate cases.
* testsuite/gas/i386/inval.l: Adjust expectations.
2017-11-13 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register): Also

3
gas/config/tc-i386.c
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@ -5431,7 +5431,8 @@ process_suffix (void)
}
for (op = i.operands; --op >= 0;)
if (!i.tm.operand_types[op].bitfield.inoutportreg)
if (!i.tm.operand_types[op].bitfield.inoutportreg
&& !i.tm.operand_types[op].bitfield.shiftcount)
{
if (i.types[op].bitfield.reg8)
{

7
gas/testsuite/gas/i386/inval.l
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@ -80,6 +80,9 @@
.*:87: Error: .*
.*:88: Error: .*
.*:90: Error: .*
.*:92: Error: .*shl.*
.*:93: Error: .*rol.*
.*:94: Error: .*rcl.*
GAS LISTING .*
@ -176,3 +179,7 @@ GAS LISTING .*
[ ]*88[ ]+movzx eax, \[eax\]
[ ]*89[ ]+
[ ]*90[ ]+movnti word ptr \[eax\], ax
[ ]*[1-9][0-9]*[ ]+
[ ]*[1-9][0-9]*[ ]+shl \[eax\], 1
[ ]*[1-9][0-9]*[ ]+rol \[ecx\], 2
[ ]*[1-9][0-9]*[ ]+rcl \[edx\], cl

4
gas/testsuite/gas/i386/inval.s
View File

@ -88,3 +88,7 @@ movzx ax, [eax]
movzx eax, [eax]
movnti word ptr [eax], ax
shl [eax], 1
rol [ecx], 2
rcl [edx], cl