* erc32.c (mec_reset mec_read mec_write memory_read memory_write),
sis.h: Get rid of all uses of long long's. * (close_port read_uart write_uart uarta_tx): Don't seg fault when can't open pty's. * exec.c: Add two new instructions: smul, and divscc. * interf.c (flush_windows): New routine to flush the register windows out to the stack just before returning to GDB. Makes backtraces work much better.
This commit is contained in:
parent
eb2c851803
commit
b7b3111471
@ -1,3 +1,33 @@
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Wed Jul 3 16:05:23 1996 Stu Grossman (grossman@critters.cygnus.com)
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* erc32.c (mec_reset mec_read mec_write memory_read memory_write),
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sis.h: Get rid of all uses of long long's.
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* (close_port read_uart write_uart uarta_tx): Don't seg fault
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when can't open pty's.
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* exec.c: Add two new instructions: smul, and divscc.
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* interf.c (flush_windows): New routine to flush the register
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windows out to the stack just before returning to GDB. Makes
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backtraces work much better.
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Wed Jun 26 12:19:11 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
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* Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
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INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
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(docdir, oldincludedir): Removed.
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* configure.in (AC_PREREQ): autoconf 2.5 or higher.
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(AC_PROG_INSTALL): Added.
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* configure: Rebuilt.
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Mon Jun 24 14:19:07 1996 Ian Lance Taylor <ian@cygnus.com>
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* configure.in: Call AC_PROG_CC before running configure.host.
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* configure: Rebuild with autoconf 2.10.
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Tue Jun 4 10:37:12 1996 Tom Tromey <tromey@csk3.cygnus.com>
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* Makefile.in (install): Don't check to see if tooldir exists.
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Make $(tooldir) and $(tooldir)/bin.
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Mon Jun 3 12:33:38 1996 Ian Lance Taylor <ian@cygnus.com>
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Mon Jun 3 12:33:38 1996 Ian Lance Taylor <ian@cygnus.com>
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* Makefile.in (end.h): Use explicit ./ when running end.
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* Makefile.in (end.h): Use explicit ./ when running end.
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1495
sim/erc32/erc32.c
Normal file
1495
sim/erc32/erc32.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -228,10 +228,12 @@ sim_close(int quitting)
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};
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};
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/* Return non-zero if the caller should handle the load. Zero if
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we have loaded the image. */
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int
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int
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sim_load(char *prog, int from_tty)
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sim_load(char *prog, int from_tty)
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{
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{
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bfd_load(*prog);
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bfd_load(prog);
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return (0);
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return (0);
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}
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}
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@ -317,11 +319,63 @@ sim_stop_reason(enum sim_stop * reason, int *sigrc)
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simstat = OK;
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simstat = OK;
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}
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}
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/* Flush all register windows out to the stack. Starting after the invalid
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window, flush all windows up to, and including the current window. This
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allows GDB to do backtraces and look at local variables for frames that
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are still in the register windows. Note that strictly speaking, this
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behavior is *wrong* for several reasons. First, it doesn't use the window
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overflow handlers. It therefore assumes standard frame layouts and window
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handling policies. Second, it changes system state behind the back of the
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target program. I expect this to mainly pose problems when debugging trap
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handlers.
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*/
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#define PSR_CWP 0x7
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static void
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flush_windows ()
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{
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int invwin;
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int cwp;
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int win;
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int ws;
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/* Keep current window handy */
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cwp = sregs.psr & PSR_CWP;
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/* Calculate the invalid window from the wim. */
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for (invwin = 0; invwin <= PSR_CWP; invwin++)
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if ((sregs.wim >> invwin) & 1)
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break;
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/* Start saving with the window after the invalid window. */
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invwin = (invwin - 1) & PSR_CWP;
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for (win = invwin; ; win = (win - 1) & PSR_CWP)
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{
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uint32 sp;
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int i;
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sp = sregs.r[(win * 16 + 14) & 0x7f];
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for (i = 0; i < 16; i++)
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memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
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&ws);
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if (win == cwp)
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break;
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}
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}
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void
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void
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sim_resume(int step, int siggnal)
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sim_resume(int step, int siggnal)
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{
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{
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simstat = run_sim(&sregs, 1, 0, 0);
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simstat = run_sim(&sregs, 1, 0, 0);
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flush_windows ();
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}
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}
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void
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void
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145
sim/erc32/sis.h
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145
sim/erc32/sis.h
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@ -0,0 +1,145 @@
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/*
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* This file is part of SIS.
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*
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* ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
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* European Space Agency
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 675
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* Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include "end.h"
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#define I_ACC_EXC 1
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/* Maximum events in event queue */
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#define EVENT_MAX 256
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/* Maximum # of floating point queue */
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#define FPUQN 1
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/* Maximum # of breakpoints */
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#define BPT_MAX 256
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struct histype {
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unsigned addr;
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unsigned time;
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};
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/* type definitions */
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typedef short int int16; /* 16-bit signed int */
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typedef unsigned short int uint16; /* 16-bit unsigned int */
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typedef int int32; /* 32-bit signed int */
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typedef unsigned int uint32; /* 32-bit unsigned int */
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typedef float float32; /* 32-bit float */
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typedef double float64; /* 64-bit float */
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struct pstate {
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float64 fd[16]; /* FPU registers */
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#ifdef HOST_LITTLE_ENDIAN_FLOAT
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float32 fs[32];
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float32 *fdp;
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#else
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float32 *fs;
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#endif
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int32 *fsi;
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uint32 fsr;
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int32 fpstate;
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uint32 fpq[FPUQN * 2];
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uint32 fpqn;
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uint32 ftime;
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uint32 flrd;
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uint32 frd;
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uint32 frs1;
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uint32 frs2;
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uint32 fpu_pres; /* FPU present (0 = No, 1 = Yes) */
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uint32 psr; /* IU registers */
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uint32 tbr;
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uint32 wim;
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uint32 g[8];
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uint32 r[128];
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uint32 y;
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uint32 pc, npc;
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uint32 trap; /* Current trap type */
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uint32 annul; /* Instruction annul */
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uint32 data; /* Loaded data */
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uint32 inst; /* Current instruction */
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uint32 asi; /* Current ASI */
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uint32 err_mode; /* IU error mode */
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uint32 breakpoint;
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uint32 bptnum;
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uint32 bphit;
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uint32 bpts[BPT_MAX]; /* Breakpoints */
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uint32 ltime; /* Load interlock time */
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uint32 hold; /* IU hold cycles in current inst */
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uint32 fhold; /* FPU hold cycles in current inst */
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uint32 icnt; /* Instruction cycles in curr inst */
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uint32 histlen; /* Trace history management */
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uint32 histind;
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struct histype *histbuf;
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float32 freq; /* Simulated processor frequency */
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uint32 tottime;
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uint32 ninst;
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uint32 fholdt;
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uint32 holdt;
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uint32 icntt;
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uint32 finst;
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uint32 simstart;
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uint32 starttime;
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uint32 pwdtime; /* Cycles in power-down mode */
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uint32 nstore; /* Number of load instructions */
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uint32 nload; /* Number of store instructions */
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uint32 nannul; /* Number of annuled instructions */
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uint32 nbranch; /* Number of branch instructions */
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uint32 ildreg; /* Destination of last load instruction */
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uint32 ildtime; /* Last time point for load dependency */
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int rett_err; /* IU in jmpl/restore error state (Rev.0) */
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int jmpltime;
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};
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struct evcell {
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void (*cfunc) ();
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int32 arg;
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uint32 time;
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struct evcell *nxt;
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};
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struct estate {
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struct evcell eq;
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struct evcell *freeq;
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uint32 simtime;
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};
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struct irqcell {
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void (*callback) ();
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int32 arg;
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};
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#define OK 0
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#define TIME_OUT 1
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#define BPT_HIT 2
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#define ERROR 3
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#define CTRL_C 4
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Loading…
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Block a user