Add support for the C_SKY series of processors.
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants. V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc. There is support for bare-metal ELF targets and Linux with both glibc and uClibc. This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics. C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers. (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about. bfd * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY. (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise. * Makefile.in: Regenerated. * archures.c (enum bfd_architecture): Add bfd_arch_csky and related bfd_mach defines. (bfd_csky_arch): Declare. (bfd_archures_list): Add C-SKY. * bfd-in.h (elf32_csky_build_stubs): Declare. (elf32_csky_size_stubs): Declare. (elf32_csky_next_input_section: Declare. (elf32_csky_setup_section_lists): Declare. * bfd-in2.h: Regenerated. * config.bfd: Add C-SKY. * configure.ac: Likewise. * configure: Regenerated. * cpu-csky.c: New file. * elf-bfd.h (enum elf_target_id): Add C-SKY. * elf32-csky.c: New file. * libbfd.h: Regenerated. * reloc.c: Add C-SKY relocations. * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare. (_bfd_target_vector): Add C-SKY target vector entries. binutils* readelf.c: Include elf/csky.h. (guess_is_rela): Handle EM_CSKY. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. include * dis-asm.h (csky_symbol_is_valid): Declare. * opcode/csky.h: New file. opcodes * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c. * Makefile.in: Regenerated. * configure.ac: Add C-SKY. * configure: Regenerated. * csky-dis.c: New file. * csky-opc.h: New file. * disassemble.c (ARCH_csky): Define. (disassembler, disassemble_init_for_target): Add case for ARCH_csky. * disassemble.h (print_insn_csky, csky_get_disassembler): Declare. gas * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY. (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise. * Makefile.in: Regenerated. * config/tc-csky.c: New file. * config/tc-csky.h: New file. * config/te-csky_abiv1.h: New file. * config/te-csky_abiv1_linux.h: New file. * config/te-csky_abiv2.h: New file. * config/te-csky_abiv2_linux.h: New file. * configure.tgt: Add C-SKY. * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY. * doc/Makefile.in: Regenerated. * doc/all.texi: Set CSKY feature. * doc/as.texi (Overview): Add C-SKY options. (Machine Dependencies): Likewise. * doc/c-csky.texi: New file. * testsuite/gas/csky/*: New test cases. ld * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations. (ecskyelf.c, ecskyelf_linux.c): New rules. * Makefile.in: Regenerated. * configure.tgt: Add C-SKY. * emulparams/cskyelf.sh: New file. * emulparams/cskyelf_linux.sh: New file. * emultempl/cskyelf.em: New file. * gen-doc.texi: Add C-SKY. * ld.texi: Likewise. (Options specific to C-SKY targets): New section. * testsuite/ld-csky/*: New tests.
This commit is contained in:
parent
7d8a316657
commit
b8891f8d62
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@ -1,3 +1,28 @@
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2018-07-30 Andrew Jenner <andrew@codesourcery.com>
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* Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
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(BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
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* Makefile.in: Regenerated.
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* archures.c (enum bfd_architecture): Add bfd_arch_csky and
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related bfd_mach defines.
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(bfd_csky_arch): Declare.
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(bfd_archures_list): Add C-SKY.
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* bfd-in.h (elf32_csky_build_stubs): Declare.
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(elf32_csky_size_stubs): Declare.
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(elf32_csky_next_input_section: Declare.
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(elf32_csky_setup_section_lists): Declare.
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* bfd-in2.h: Regenerated.
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* config.bfd: Add C-SKY.
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* configure.ac: Likewise.
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* configure: Regenerated.
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* cpu-csky.c: New file.
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* elf-bfd.h (enum elf_target_id): Add C-SKY.
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* elf32-csky.c: New file.
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* libbfd.h: Regenerated.
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* reloc.c: Add C-SKY relocations.
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* targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
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(_bfd_target_vector): Add C-SKY target vector entries.
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2018-07-27 John Darrington <john@darrington.wattle.id.au>
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* elf32-s12z.c (ELF_TARGET_ID): Don't define.
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@ -100,6 +100,7 @@ ALL_MACHINES = \
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cpu-cr16c.lo \
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cpu-cris.lo \
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cpu-crx.lo \
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cpu-csky.lo \
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cpu-d10v.lo \
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cpu-d30v.lo \
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cpu-dlx.lo \
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@ -185,6 +186,7 @@ ALL_MACHINES_CFILES = \
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cpu-cr16c.c \
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cpu-cris.c \
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cpu-crx.c \
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cpu-csky.c \
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cpu-d10v.c \
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cpu-d30v.c \
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cpu-dlx.c \
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@ -304,6 +306,7 @@ BFD32_BACKENDS = \
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elf32-cr16c.lo \
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elf32-cris.lo \
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elf32-crx.lo \
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elf32-csky.lo \
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elf32-d10v.lo \
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elf32-d30v.lo \
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elf32-dlx.lo \
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@ -441,6 +444,7 @@ BFD32_BACKENDS_CFILES = \
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elf32-cr16c.c \
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elf32-cris.c \
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elf32-crx.c \
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elf32-csky.c \
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elf32-d10v.c \
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elf32-d30v.c \
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elf32-dlx.c \
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@ -522,6 +522,7 @@ ALL_MACHINES = \
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cpu-cr16c.lo \
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cpu-cris.lo \
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cpu-crx.lo \
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cpu-csky.lo \
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cpu-d10v.lo \
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cpu-d30v.lo \
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cpu-dlx.lo \
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@ -607,6 +608,7 @@ ALL_MACHINES_CFILES = \
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cpu-cr16c.c \
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cpu-cris.c \
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cpu-crx.c \
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cpu-csky.c \
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cpu-d10v.c \
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cpu-d30v.c \
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cpu-dlx.c \
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@ -727,6 +729,7 @@ BFD32_BACKENDS = \
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elf32-cr16c.lo \
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elf32-cris.lo \
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elf32-crx.lo \
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elf32-csky.lo \
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elf32-d10v.lo \
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elf32-d30v.lo \
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elf32-dlx.lo \
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@ -864,6 +867,7 @@ BFD32_BACKENDS_CFILES = \
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elf32-cr16c.c \
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elf32-cris.c \
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elf32-crx.c \
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elf32-csky.c \
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elf32-d10v.c \
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elf32-d30v.c \
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elf32-dlx.c \
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@ -1323,6 +1327,7 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-cr16c.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-cris.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-crx.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-csky.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-d10v.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-d30v.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-dlx.Plo@am__quote@
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@ -1420,6 +1425,7 @@ distclean-compile:
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-cr16c.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-cris.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-crx.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-csky.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-d10v.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-d30v.Plo@am__quote@
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@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/elf32-dlx.Plo@am__quote@
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@ -529,6 +529,15 @@ DESCRIPTION
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. bfd_arch_nfp, {* Netronome Flow Processor *}
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.#define bfd_mach_nfp3200 0x3200
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.#define bfd_mach_nfp6000 0x6000
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. bfd_arch_csky, {* C-SKY. *}
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.#define bfd_mach_ck_unknown 0
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.#define bfd_mach_ck510 1
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.#define bfd_mach_ck610 2
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.#define bfd_mach_ck801 3
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.#define bfd_mach_ck802 4
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.#define bfd_mach_ck803 5
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.#define bfd_mach_ck807 6
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.#define bfd_mach_ck810 7
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. bfd_arch_last
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. };
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*/
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@ -583,6 +592,7 @@ extern const bfd_arch_info_type bfd_cr16_arch;
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extern const bfd_arch_info_type bfd_cr16c_arch;
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extern const bfd_arch_info_type bfd_cris_arch;
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extern const bfd_arch_info_type bfd_crx_arch;
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extern const bfd_arch_info_type bfd_csky_arch;
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extern const bfd_arch_info_type bfd_d10v_arch;
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extern const bfd_arch_info_type bfd_d30v_arch;
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extern const bfd_arch_info_type bfd_dlx_arch;
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@ -673,6 +683,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
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&bfd_cr16c_arch,
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&bfd_cris_arch,
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&bfd_crx_arch,
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&bfd_csky_arch,
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&bfd_d10v_arch,
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&bfd_d30v_arch,
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&bfd_dlx_arch,
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12
bfd/bfd-in.h
12
bfd/bfd-in.h
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@ -1063,3 +1063,15 @@ extern bfd_boolean v850_elf_set_note
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/* MIPS ABI flags data access. For the disassembler. */
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struct elf_internal_abiflags_v0;
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extern struct elf_internal_abiflags_v0 *bfd_mips_elf_get_abiflags (bfd *);
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/* C-SKY functions. */
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extern bfd_boolean elf32_csky_build_stubs
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(struct bfd_link_info *);
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extern bfd_boolean elf32_csky_size_stubs
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(bfd *, bfd *, struct bfd_link_info *, bfd_signed_vma,
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struct bfd_section *(*) (const char*, struct bfd_section*),
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void (*) (void));
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extern void elf32_csky_next_input_section
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(struct bfd_link_info *, struct bfd_section *);
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extern int elf32_csky_setup_section_lists
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(bfd *, struct bfd_link_info *);
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@ -1070,6 +1070,18 @@ extern bfd_boolean v850_elf_set_note
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/* MIPS ABI flags data access. For the disassembler. */
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struct elf_internal_abiflags_v0;
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extern struct elf_internal_abiflags_v0 *bfd_mips_elf_get_abiflags (bfd *);
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/* C-SKY functions. */
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extern bfd_boolean elf32_csky_build_stubs
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(struct bfd_link_info *);
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extern bfd_boolean elf32_csky_size_stubs
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(bfd *, bfd *, struct bfd_link_info *, bfd_signed_vma,
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struct bfd_section *(*) (const char*, struct bfd_section*),
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void (*) (void));
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extern void elf32_csky_next_input_section
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(struct bfd_link_info *, struct bfd_section *);
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extern int elf32_csky_setup_section_lists
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(bfd *, struct bfd_link_info *);
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/* Extracted from init.c. */
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void bfd_init (void);
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@ -2414,6 +2426,15 @@ enum bfd_architecture
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bfd_arch_nfp, /* Netronome Flow Processor */
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#define bfd_mach_nfp3200 0x3200
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#define bfd_mach_nfp6000 0x6000
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bfd_arch_csky, /* C-SKY. */
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#define bfd_mach_ck_unknown 0
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#define bfd_mach_ck510 1
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#define bfd_mach_ck610 2
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#define bfd_mach_ck801 3
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#define bfd_mach_ck802 4
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#define bfd_mach_ck803 5
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#define bfd_mach_ck807 6
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#define bfd_mach_ck810 7
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bfd_arch_last
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};
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@ -6580,6 +6601,73 @@ assembler and not (currently) written to any object files. */
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BFD_RELOC_WASM32_CODE_POINTER,
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BFD_RELOC_WASM32_INDEX,
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BFD_RELOC_WASM32_PLT_SIG,
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/* C-SKY relocations. */
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BFD_RELOC_CKCORE_NONE,
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BFD_RELOC_CKCORE_ADDR32,
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BFD_RELOC_CKCORE_PCREL_IMM8BY4,
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BFD_RELOC_CKCORE_PCREL_IMM11BY2,
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BFD_RELOC_CKCORE_PCREL_IMM4BY2,
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BFD_RELOC_CKCORE_PCREL32,
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BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2,
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BFD_RELOC_CKCORE_GNU_VTINHERIT,
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BFD_RELOC_CKCORE_GNU_VTENTRY,
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BFD_RELOC_CKCORE_RELATIVE,
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BFD_RELOC_CKCORE_COPY,
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BFD_RELOC_CKCORE_GLOB_DAT,
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BFD_RELOC_CKCORE_JUMP_SLOT,
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BFD_RELOC_CKCORE_GOTOFF,
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BFD_RELOC_CKCORE_GOTPC,
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BFD_RELOC_CKCORE_GOT32,
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BFD_RELOC_CKCORE_PLT32,
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BFD_RELOC_CKCORE_ADDRGOT,
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BFD_RELOC_CKCORE_ADDRPLT,
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BFD_RELOC_CKCORE_PCREL_IMM26BY2,
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BFD_RELOC_CKCORE_PCREL_IMM16BY2,
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BFD_RELOC_CKCORE_PCREL_IMM16BY4,
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BFD_RELOC_CKCORE_PCREL_IMM10BY2,
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BFD_RELOC_CKCORE_PCREL_IMM10BY4,
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BFD_RELOC_CKCORE_ADDR_HI16,
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BFD_RELOC_CKCORE_ADDR_LO16,
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BFD_RELOC_CKCORE_GOTPC_HI16,
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BFD_RELOC_CKCORE_GOTPC_LO16,
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BFD_RELOC_CKCORE_GOTOFF_HI16,
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BFD_RELOC_CKCORE_GOTOFF_LO16,
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BFD_RELOC_CKCORE_GOT12,
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BFD_RELOC_CKCORE_GOT_HI16,
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BFD_RELOC_CKCORE_GOT_LO16,
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BFD_RELOC_CKCORE_PLT12,
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BFD_RELOC_CKCORE_PLT_HI16,
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BFD_RELOC_CKCORE_PLT_LO16,
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BFD_RELOC_CKCORE_ADDRGOT_HI16,
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BFD_RELOC_CKCORE_ADDRGOT_LO16,
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BFD_RELOC_CKCORE_ADDRPLT_HI16,
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BFD_RELOC_CKCORE_ADDRPLT_LO16,
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BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2,
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BFD_RELOC_CKCORE_TOFFSET_LO16,
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BFD_RELOC_CKCORE_DOFFSET_LO16,
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BFD_RELOC_CKCORE_PCREL_IMM18BY2,
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BFD_RELOC_CKCORE_DOFFSET_IMM18,
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BFD_RELOC_CKCORE_DOFFSET_IMM18BY2,
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BFD_RELOC_CKCORE_DOFFSET_IMM18BY4,
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BFD_RELOC_CKCORE_GOTOFF_IMM18,
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BFD_RELOC_CKCORE_GOT_IMM18BY4,
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BFD_RELOC_CKCORE_PLT_IMM18BY4,
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BFD_RELOC_CKCORE_PCREL_IMM7BY4,
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BFD_RELOC_CKCORE_TLS_LE32,
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BFD_RELOC_CKCORE_TLS_IE32,
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BFD_RELOC_CKCORE_TLS_GD32,
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BFD_RELOC_CKCORE_TLS_LDM32,
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BFD_RELOC_CKCORE_TLS_LDO32,
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BFD_RELOC_CKCORE_TLS_DTPMOD32,
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BFD_RELOC_CKCORE_TLS_DTPOFF32,
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BFD_RELOC_CKCORE_TLS_TPOFF32,
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BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4,
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BFD_RELOC_CKCORE_NOJSRI,
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BFD_RELOC_CKCORE_CALLGRAPH,
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BFD_RELOC_CKCORE_IRELATIVE,
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BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4,
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BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4,
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BFD_RELOC_UNUSED };
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typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
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@ -170,6 +170,7 @@ c54x*) targ_archs=bfd_tic54x_arch ;;
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cr16*) targ_archs=bfd_cr16_arch ;;
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crisv32) targ_archs=bfd_cris_arch ;;
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crx*) targ_archs=bfd_crx_arch ;;
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csky*) targ_archs=bfd_csky_arch ;;
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dlx*) targ_archs=bfd_dlx_arch ;;
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fido*) targ_archs=bfd_m68k_arch ;;
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hppa*) targ_archs=bfd_hppa_arch ;;
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@ -461,6 +462,11 @@ case "${targ}" in
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targ_underscore=yes
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;;
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csky-*-elf* | csky-*-linux* )
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targ_defvec=csky_elf32_be_vec
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targ_selvecs="csky_elf32_be_vec csky_elf32_le_vec"
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;;
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d10v-*-*)
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targ_defvec=d10v_elf32_vec
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;;
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@ -14697,6 +14697,8 @@ do
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cris_elf32_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
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cris_elf32_us_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
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crx_elf32_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
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csky_elf32_be_vec) tb="$tb elf32-csky.lo elf32.lo $elf" ;;
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csky_elf32_le_vec) tb="$tb elf32-csky.lo elf32.lo $elf" ;;
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d10v_elf32_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
|
||||
d30v_elf32_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
|
||||
dlx_elf32_be_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
|
||||
|
|
|
@ -465,6 +465,8 @@ do
|
|||
cris_elf32_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
|
||||
cris_elf32_us_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
|
||||
crx_elf32_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
|
||||
csky_elf32_be_vec) tb="$tb elf32-csky.lo elf32.lo $elf" ;;
|
||||
csky_elf32_le_vec) tb="$tb elf32-csky.lo elf32.lo $elf" ;;
|
||||
d10v_elf32_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
|
||||
d30v_elf32_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
|
||||
dlx_elf32_be_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
|
||||
|
|
|
@ -0,0 +1,59 @@
|
|||
/* BFD support for C-SKY processors.
|
||||
Copyright (C) 1994-2018 Free Software Foundation, Inc.
|
||||
Contributed by C-SKY Microsystems and Mentor Graphics.
|
||||
|
||||
This file is part of BFD, the Binary File Descriptor library.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
|
||||
MA 02110-1301, USA. */
|
||||
|
||||
#include "sysdep.h"
|
||||
#include "bfd.h"
|
||||
#include "libbfd.h"
|
||||
|
||||
#define N(NUMBER, PRINT, ISDEFAULT, NEXT) \
|
||||
{ \
|
||||
32, /* 32 bits in a word */ \
|
||||
32, /* 32 bits in an address */ \
|
||||
8, /* 8 bits in a byte */ \
|
||||
bfd_arch_csky, /* Architecture */ \
|
||||
NUMBER, /* Machine number */ \
|
||||
"csky", /* Architecture name */ \
|
||||
PRINT, /* Printable name */ \
|
||||
3, /* Section align power */ \
|
||||
ISDEFAULT, /* Is this the default architecture ? */ \
|
||||
bfd_default_compatible, /* Architecture comparison function */ \
|
||||
bfd_default_scan, /* String to architecture conversion */ \
|
||||
bfd_arch_default_fill, \
|
||||
NEXT /* Next in list */ \
|
||||
}
|
||||
|
||||
static const bfd_arch_info_type arch_info_struct[] =
|
||||
{
|
||||
/* ABI v1 processors. */
|
||||
N (bfd_mach_ck510, "csky:ck510", FALSE, & arch_info_struct[1]),
|
||||
N (bfd_mach_ck610, "csky:ck610", FALSE, & arch_info_struct[2]),
|
||||
|
||||
/* ABI v2 processors. */
|
||||
N (bfd_mach_ck801, "csky:ck801", FALSE, & arch_info_struct[3]),
|
||||
N (bfd_mach_ck802, "csky:ck802", FALSE, & arch_info_struct[4]),
|
||||
N (bfd_mach_ck803, "csky:ck803", FALSE, & arch_info_struct[5]),
|
||||
N (bfd_mach_ck807, "csky:ck807", FALSE, & arch_info_struct[6]),
|
||||
N (bfd_mach_ck810, "csky:ck810", FALSE, & arch_info_struct[7]),
|
||||
N (bfd_mach_ck_unknown, "csky:any", FALSE, NULL)
|
||||
};
|
||||
|
||||
const bfd_arch_info_type bfd_csky_arch =
|
||||
N (0, "csky", TRUE, & arch_info_struct[0]);
|
|
@ -489,6 +489,7 @@ enum elf_target_id
|
|||
AVR_ELF_DATA,
|
||||
BFIN_ELF_DATA,
|
||||
CRIS_ELF_DATA,
|
||||
CSKY_ELF_DATA,
|
||||
FRV_ELF_DATA,
|
||||
HPPA32_ELF_DATA,
|
||||
HPPA64_ELF_DATA,
|
||||
|
|
File diff suppressed because it is too large
Load Diff
65
bfd/libbfd.h
65
bfd/libbfd.h
|
@ -3217,6 +3217,71 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
|
|||
"BFD_RELOC_WASM32_CODE_POINTER",
|
||||
"BFD_RELOC_WASM32_INDEX",
|
||||
"BFD_RELOC_WASM32_PLT_SIG",
|
||||
"BFD_RELOC_CKCORE_NONE",
|
||||
"BFD_RELOC_CKCORE_ADDR32",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM8BY4",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM11BY2",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM4BY2",
|
||||
"BFD_RELOC_CKCORE_PCREL32",
|
||||
"BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2",
|
||||
"BFD_RELOC_CKCORE_GNU_VTINHERIT",
|
||||
"BFD_RELOC_CKCORE_GNU_VTENTRY",
|
||||
"BFD_RELOC_CKCORE_RELATIVE",
|
||||
"BFD_RELOC_CKCORE_COPY",
|
||||
"BFD_RELOC_CKCORE_GLOB_DAT",
|
||||
"BFD_RELOC_CKCORE_JUMP_SLOT",
|
||||
"BFD_RELOC_CKCORE_GOTOFF",
|
||||
"BFD_RELOC_CKCORE_GOTPC",
|
||||
"BFD_RELOC_CKCORE_GOT32",
|
||||
"BFD_RELOC_CKCORE_PLT32",
|
||||
"BFD_RELOC_CKCORE_ADDRGOT",
|
||||
"BFD_RELOC_CKCORE_ADDRPLT",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM26BY2",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM16BY2",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM16BY4",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM10BY2",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM10BY4",
|
||||
"BFD_RELOC_CKCORE_ADDR_HI16",
|
||||
"BFD_RELOC_CKCORE_ADDR_LO16",
|
||||
"BFD_RELOC_CKCORE_GOTPC_HI16",
|
||||
"BFD_RELOC_CKCORE_GOTPC_LO16",
|
||||
"BFD_RELOC_CKCORE_GOTOFF_HI16",
|
||||
"BFD_RELOC_CKCORE_GOTOFF_LO16",
|
||||
"BFD_RELOC_CKCORE_GOT12",
|
||||
"BFD_RELOC_CKCORE_GOT_HI16",
|
||||
"BFD_RELOC_CKCORE_GOT_LO16",
|
||||
"BFD_RELOC_CKCORE_PLT12",
|
||||
"BFD_RELOC_CKCORE_PLT_HI16",
|
||||
"BFD_RELOC_CKCORE_PLT_LO16",
|
||||
"BFD_RELOC_CKCORE_ADDRGOT_HI16",
|
||||
"BFD_RELOC_CKCORE_ADDRGOT_LO16",
|
||||
"BFD_RELOC_CKCORE_ADDRPLT_HI16",
|
||||
"BFD_RELOC_CKCORE_ADDRPLT_LO16",
|
||||
"BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2",
|
||||
"BFD_RELOC_CKCORE_TOFFSET_LO16",
|
||||
"BFD_RELOC_CKCORE_DOFFSET_LO16",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM18BY2",
|
||||
"BFD_RELOC_CKCORE_DOFFSET_IMM18",
|
||||
"BFD_RELOC_CKCORE_DOFFSET_IMM18BY2",
|
||||
"BFD_RELOC_CKCORE_DOFFSET_IMM18BY4",
|
||||
"BFD_RELOC_CKCORE_GOTOFF_IMM18",
|
||||
"BFD_RELOC_CKCORE_GOT_IMM18BY4",
|
||||
"BFD_RELOC_CKCORE_PLT_IMM18BY4",
|
||||
"BFD_RELOC_CKCORE_PCREL_IMM7BY4",
|
||||
"BFD_RELOC_CKCORE_TLS_LE32",
|
||||
"BFD_RELOC_CKCORE_TLS_IE32",
|
||||
"BFD_RELOC_CKCORE_TLS_GD32",
|
||||
"BFD_RELOC_CKCORE_TLS_LDM32",
|
||||
"BFD_RELOC_CKCORE_TLS_LDO32",
|
||||
"BFD_RELOC_CKCORE_TLS_DTPMOD32",
|
||||
"BFD_RELOC_CKCORE_TLS_DTPOFF32",
|
||||
"BFD_RELOC_CKCORE_TLS_TPOFF32",
|
||||
"BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4",
|
||||
"BFD_RELOC_CKCORE_NOJSRI",
|
||||
"BFD_RELOC_CKCORE_CALLGRAPH",
|
||||
"BFD_RELOC_CKCORE_IRELATIVE",
|
||||
"BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4",
|
||||
"BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4",
|
||||
"@@overflow: BFD_RELOC_UNUSED@@",
|
||||
};
|
||||
#endif
|
||||
|
|
133
bfd/reloc.c
133
bfd/reloc.c
|
@ -7988,6 +7988,139 @@ ENUMX
|
|||
ENUMDOC
|
||||
WebAssembly relocations.
|
||||
|
||||
ENUM
|
||||
BFD_RELOC_CKCORE_NONE
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDR32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM8BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM11BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM4BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GNU_VTINHERIT
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GNU_VTENTRY
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_RELATIVE
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_COPY
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GLOB_DAT
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_JUMP_SLOT
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTOFF
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTPC
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOT32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PLT32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDRGOT
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDRPLT
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM26BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM16BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM16BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM10BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM10BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDR_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDR_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTPC_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTPC_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTOFF_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTOFF_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOT12
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOT_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOT_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PLT12
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PLT_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PLT_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDRGOT_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDRGOT_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDRPLT_HI16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_ADDRPLT_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TOFFSET_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_DOFFSET_LO16
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM18BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_DOFFSET_IMM18
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOTOFF_IMM18
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_GOT_IMM18BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PLT_IMM18BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_IMM7BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_LE32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_IE32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_GD32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_LDM32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_LDO32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_DTPMOD32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_DTPOFF32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_TLS_TPOFF32
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_NOJSRI
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_CALLGRAPH
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_IRELATIVE
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4
|
||||
ENUMX
|
||||
BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4
|
||||
ENUMDOC
|
||||
C-SKY relocations.
|
||||
|
||||
ENDSENUM
|
||||
BFD_RELOC_UNUSED
|
||||
CODE_FRAGMENT
|
||||
|
|
|
@ -630,6 +630,8 @@ extern const bfd_target cris_aout_vec;
|
|||
extern const bfd_target cris_elf32_vec;
|
||||
extern const bfd_target cris_elf32_us_vec;
|
||||
extern const bfd_target crx_elf32_vec;
|
||||
extern const bfd_target csky_elf32_be_vec;
|
||||
extern const bfd_target csky_elf32_le_vec;
|
||||
extern const bfd_target d10v_elf32_vec;
|
||||
extern const bfd_target d30v_elf32_vec;
|
||||
extern const bfd_target dlx_elf32_be_vec;
|
||||
|
@ -960,6 +962,9 @@ static const bfd_target * const _bfd_target_vector[] =
|
|||
|
||||
&crx_elf32_vec,
|
||||
|
||||
&csky_elf32_be_vec,
|
||||
&csky_elf32_le_vec,
|
||||
|
||||
&d10v_elf32_vec,
|
||||
&d30v_elf32_vec,
|
||||
|
||||
|
|
|
@ -1,3 +1,11 @@
|
|||
2018-07-30 Andrew Jenner <andrew@codesourcery.com>
|
||||
|
||||
* readelf.c: Include elf/csky.h.
|
||||
(guess_is_rela): Handle EM_CSKY.
|
||||
(dump_relocations): Likewise.
|
||||
(get_machine_name): Likewise.
|
||||
(is_32bit_abs_reloc): Likewise.
|
||||
|
||||
2018-07-25 Nick Clifton <nickc@redhat.com>
|
||||
|
||||
* rdcoff.c (parse_coff_struct_type): Free fields array upon early
|
||||
|
|
|
@ -98,6 +98,7 @@
|
|||
#include "elf/cr16.h"
|
||||
#include "elf/cris.h"
|
||||
#include "elf/crx.h"
|
||||
#include "elf/csky.h"
|
||||
#include "elf/d10v.h"
|
||||
#include "elf/d30v.h"
|
||||
#include "elf/dlx.h"
|
||||
|
@ -797,6 +798,7 @@ guess_is_rela (unsigned int e_machine)
|
|||
case EM_CR16:
|
||||
case EM_CRIS:
|
||||
case EM_CRX:
|
||||
case EM_CSKY:
|
||||
case EM_D30V:
|
||||
case EM_CYGNUS_D30V:
|
||||
case EM_FR30:
|
||||
|
@ -1348,6 +1350,10 @@ dump_relocations (Filedata * filedata,
|
|||
rtype = elf_frv_reloc_type (type);
|
||||
break;
|
||||
|
||||
case EM_CSKY:
|
||||
rtype = elf_csky_reloc_type (type);
|
||||
break;
|
||||
|
||||
case EM_FT32:
|
||||
rtype = elf_ft32_reloc_type (type);
|
||||
break;
|
||||
|
@ -2501,6 +2507,7 @@ get_machine_name (unsigned e_machine)
|
|||
case EM_ADAPTEVA_EPIPHANY: return "Adapteva EPIPHANY";
|
||||
case EM_CYGNUS_FRV: return "Fujitsu FR-V";
|
||||
case EM_S12Z: return "Freescale S12Z";
|
||||
case EM_CSKY: return "C-SKY";
|
||||
|
||||
default:
|
||||
snprintf (buff, sizeof (buff), _("<unknown>: 0x%x"), e_machine);
|
||||
|
@ -12307,6 +12314,8 @@ is_32bit_abs_reloc (Filedata * filedata, unsigned int reloc_type)
|
|||
return reloc_type == 3; /* R_CR16_NUM32. */
|
||||
case EM_CRX:
|
||||
return reloc_type == 15; /* R_CRX_NUM32. */
|
||||
case EM_CSKY:
|
||||
return reloc_type == 1; /* R_CKCORE_ADDR32. */
|
||||
case EM_CYGNUS_FRV:
|
||||
return reloc_type == 1;
|
||||
case EM_CYGNUS_D10V:
|
||||
|
|
|
@ -1,3 +1,24 @@
|
|||
2018-07-30 Andrew Jenner <andrew@codesourcery.com>
|
||||
|
||||
* Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
|
||||
(TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
|
||||
* Makefile.in: Regenerated.
|
||||
* config/tc-csky.c: New file.
|
||||
* config/tc-csky.h: New file.
|
||||
* config/te-csky_abiv1.h: New file.
|
||||
* config/te-csky_abiv1_linux.h: New file.
|
||||
* config/te-csky_abiv2.h: New file.
|
||||
* config/te-csky_abiv2_linux.h: New file.
|
||||
* configure.tgt: Add C-SKY.
|
||||
* doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
|
||||
* doc/Makefile.in: Regenerated.
|
||||
* doc/all.texi: Set CSKY feature.
|
||||
* doc/as.texi (Overview): Add C-SKY options.
|
||||
(Machine Dependencies): Likewise.
|
||||
* doc/c-csky.texi: New file.
|
||||
* testsuite/gas/csky/*: New test cases.
|
||||
* NEWS: Mention the support.
|
||||
|
||||
2018-07-29 John David Anglin <danglin@gcc.gnu.org>
|
||||
|
||||
* config/tc-hppa.c: Include "struc-symbol.h".
|
||||
|
|
|
@ -138,6 +138,7 @@ TARGET_CPU_CFILES = \
|
|||
config/tc-cr16.c \
|
||||
config/tc-cris.c \
|
||||
config/tc-crx.c \
|
||||
config/tc-csky.c \
|
||||
config/tc-d10v.c \
|
||||
config/tc-d30v.c \
|
||||
config/tc-dlx.c \
|
||||
|
@ -212,6 +213,7 @@ TARGET_CPU_HFILES = \
|
|||
config/tc-cr16.h \
|
||||
config/tc-cris.h \
|
||||
config/tc-crx.h \
|
||||
config/tc-csky.h \
|
||||
config/tc-d10v.h \
|
||||
config/tc-d30v.h \
|
||||
config/tc-dlx.h \
|
||||
|
@ -308,6 +310,10 @@ TARG_ENV_HFILES = \
|
|||
config/te-armfbsdeabi.h \
|
||||
config/te-armfbsdvfp.h \
|
||||
config/te-armlinuxeabi.h \
|
||||
config/te-csky_abiv1.h \
|
||||
config/te-csky_abiv1_linux.h \
|
||||
config/te-csky_abiv2.h \
|
||||
config/te-csky_abiv2_linux.h \
|
||||
config/te-freebsd.h \
|
||||
config/te-generic.h \
|
||||
config/te-gnu.h \
|
||||
|
|
|
@ -527,6 +527,7 @@ TARGET_CPU_CFILES = \
|
|||
config/tc-cr16.c \
|
||||
config/tc-cris.c \
|
||||
config/tc-crx.c \
|
||||
config/tc-csky.c \
|
||||
config/tc-d10v.c \
|
||||
config/tc-d30v.c \
|
||||
config/tc-dlx.c \
|
||||
|
@ -601,6 +602,7 @@ TARGET_CPU_HFILES = \
|
|||
config/tc-cr16.h \
|
||||
config/tc-cris.h \
|
||||
config/tc-crx.h \
|
||||
config/tc-csky.h \
|
||||
config/tc-d10v.h \
|
||||
config/tc-d30v.h \
|
||||
config/tc-dlx.h \
|
||||
|
@ -697,6 +699,10 @@ TARG_ENV_HFILES = \
|
|||
config/te-armfbsdeabi.h \
|
||||
config/te-armfbsdvfp.h \
|
||||
config/te-armlinuxeabi.h \
|
||||
config/te-csky_abiv1.h \
|
||||
config/te-csky_abiv1_linux.h \
|
||||
config/te-csky_abiv2.h \
|
||||
config/te-csky_abiv2_linux.h \
|
||||
config/te-freebsd.h \
|
||||
config/te-generic.h \
|
||||
config/te-gnu.h \
|
||||
|
@ -896,6 +902,8 @@ config/tc-cris.$(OBJEXT): config/$(am__dirstamp) \
|
|||
config/$(DEPDIR)/$(am__dirstamp)
|
||||
config/tc-crx.$(OBJEXT): config/$(am__dirstamp) \
|
||||
config/$(DEPDIR)/$(am__dirstamp)
|
||||
config/tc-csky.$(OBJEXT): config/$(am__dirstamp) \
|
||||
config/$(DEPDIR)/$(am__dirstamp)
|
||||
config/tc-d10v.$(OBJEXT): config/$(am__dirstamp) \
|
||||
config/$(DEPDIR)/$(am__dirstamp)
|
||||
config/tc-d30v.$(OBJEXT): config/$(am__dirstamp) \
|
||||
|
@ -1146,6 +1154,7 @@ distclean-compile:
|
|||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-cr16.Po@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-cris.Po@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-crx.Po@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-csky.Po@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-d10v.Po@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-d30v.Po@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@config/$(DEPDIR)/tc-dlx.Po@am__quote@
|
||||
|
|
2
gas/NEWS
2
gas/NEWS
|
@ -1,5 +1,7 @@
|
|||
-*- text -*-
|
||||
|
||||
* Add support for the C-SKY processor series.
|
||||
|
||||
* Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
|
||||
ASE.
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,107 @@
|
|||
/* tc-csky.h -- Header file for tc-csky.c
|
||||
Copyright (C) 1989-2018 Free Software Foundation, Inc.
|
||||
Contributed by C-SKY Microsystems and Mentor Graphics.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the Free
|
||||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
#ifndef TC_CSKY
|
||||
#define TC_CSKY 1
|
||||
|
||||
#define WORKING_DOT_WORD
|
||||
|
||||
#define TARGET_ARCH bfd_arch_csky
|
||||
|
||||
#define LISTING_HEADER "CSKY GAS"
|
||||
|
||||
#ifdef OBJ_ELF
|
||||
#define TARGET_FORMAT elf32_csky_target_format ()
|
||||
#endif
|
||||
|
||||
#define TARGET_BYTES_BIG_ENDIAN 0
|
||||
|
||||
#define MD_PCREL_FROM_SECTION(F,S) md_pcrel_from_section (F, S)
|
||||
|
||||
#define TC_GENERIC_RELAX_TABLE csky_relax_table
|
||||
|
||||
#define md_end md_csky_end
|
||||
#define md_relax_frag csky_relax_frag
|
||||
#define DOUBLESLASH_LINE_COMMENTS
|
||||
#define LOCAL_LABELS_FB 1
|
||||
#define PAD_LITERAL_LENGTH 6
|
||||
#define PAD_FILL_CONTENT 0x1c00
|
||||
|
||||
/* Reloc API. */
|
||||
#define EXTERN_FORCE_RELOC 1
|
||||
#define TC_CONS_FIX_NEW csky_cons_fix_new
|
||||
#define TC_FORCE_RELOCATION(fix) csky_force_relocation (fix)
|
||||
#define tc_fix_adjustable(FIX) csky_fix_adjustable (FIX)
|
||||
#define TC_SEGMENT_INFO_TYPE csky_segment_info_type
|
||||
|
||||
/* Dwarf API. */
|
||||
#define DWARF2_LINE_MIN_INSN_LENGTH 2
|
||||
#define DWARF2_ADDR_SIZE(bfd) 4
|
||||
#define DWARF2_FDE_RELOC_SIZE 4
|
||||
#define TARGET_USE_CFIPOP 1
|
||||
#define tc_cfi_frame_initial_instructions csky_cfi_frame_initial_instructions
|
||||
#define tc_regname_to_dw2regnum tc_csky_regname_to_dw2regnum
|
||||
#define DWARF2_DEFAULT_RETURN_COLUMN 15
|
||||
#define DWARF2_CIE_DATA_ALIGNMENT (-4)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MAP_UNDEFINED = 0,
|
||||
MAP_DATA,
|
||||
MAP_TEXT,
|
||||
} map_state;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
map_state current_state;
|
||||
} csky_segment_info_type;
|
||||
|
||||
struct tls_addend
|
||||
{
|
||||
fragS *frag;
|
||||
offsetT offset;
|
||||
};
|
||||
|
||||
#define TC_FIX_TYPE struct tls_addend
|
||||
#define TC_INIT_FIX_DATA(FIX) \
|
||||
{ (FIX)->tc_fix_data.frag = NULL; (FIX)->tc_fix_data.offset = 0; }
|
||||
|
||||
#include "write.h"
|
||||
extern const relax_typeS csky_relax_table [];
|
||||
|
||||
extern void md_csky_end (void);
|
||||
extern long md_pcrel_from_section (fixS *, segT);
|
||||
extern void csky_cons_fix_new (fragS *,
|
||||
unsigned int off,
|
||||
unsigned int len,
|
||||
expressionS *,
|
||||
bfd_reloc_code_real_type);
|
||||
extern int csky_force_relocation (fixS *);
|
||||
extern bfd_boolean csky_fix_adjustable (fixS *);
|
||||
extern void csky_cfi_frame_initial_instructions (void);
|
||||
extern int tc_csky_regname_to_dw2regnum (char *);
|
||||
extern long csky_relax_frag (segT, fragS *, long);
|
||||
|
||||
#ifdef OBJ_ELF
|
||||
const char * elf32_csky_target_format (void);
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,24 @@
|
|||
/* Environment definitions for C-SKY ABIV2 bare-metal targets.
|
||||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||||
Contributed by C-SKY Microsystems and Mentor Graphics.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation; either version 3,
|
||||
or (at your option) any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
||||
the GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the Free
|
||||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
#include "obj-format.h"
|
||||
|
||||
#define _CSKY_ABI 1
|
|
@ -0,0 +1,24 @@
|
|||
/* Environment definitions for C-SKY ABIV1 Linux targets.
|
||||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||||
Contributed by C-SKY Microsystems and Mentor Graphics.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation; either version 3,
|
||||
or (at your option) any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
||||
the GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the Free
|
||||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
#include "obj-format.h"
|
||||
|
||||
#define _CSKY_ABI 1
|
|
@ -0,0 +1,26 @@
|
|||
/* Environment definitions for C-SKY ABIV2 bare-metal targets.
|
||||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||||
Contributed by C-SKY Microsystems and Mentor Graphics.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation; either version 3,
|
||||
or (at your option) any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
||||
the GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the Free
|
||||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
#define INCLUDE_BRANCH_STUB
|
||||
|
||||
#include "obj-format.h"
|
||||
|
||||
#define _CSKY_ABI 2
|
|
@ -0,0 +1,24 @@
|
|||
/* Environment definitions for C-SKY ABIV2 Linux targets.
|
||||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||||
Contributed by C-SKY Microsystems and Mentor Graphics.
|
||||
|
||||
This file is part of GAS, the GNU Assembler.
|
||||
|
||||
GAS is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as
|
||||
published by the Free Software Foundation; either version 3,
|
||||
or (at your option) any later version.
|
||||
|
||||
GAS is distributed in the hope that it will be useful, but
|
||||
WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
|
||||
the GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with GAS; see the file COPYING. If not, write to the Free
|
||||
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
|
||||
02110-1301, USA. */
|
||||
|
||||
#include "obj-format.h"
|
||||
|
||||
#define _CSKY_ABI 2
|
|
@ -173,6 +173,11 @@ case ${generic_target} in
|
|||
|
||||
crx-*-elf*) fmt=elf ;;
|
||||
|
||||
csky-*-elf*abiv1) fmt=elf em=csky_abiv1 ;;
|
||||
csky-*-elf*) fmt=elf em=csky_abiv2 ;;
|
||||
csky-*-linux*abiv1) fmt=elf em=csky_abiv1_linux ;;
|
||||
csky-*-linux*) fmt=elf em=csky_abiv2_linux ;;
|
||||
|
||||
d10v-*-*) fmt=elf ;;
|
||||
d30v-*-*) fmt=elf ;;
|
||||
dlx-*-*) fmt=elf ;;
|
||||
|
@ -431,7 +436,7 @@ case ${generic_target} in
|
|||
esac
|
||||
|
||||
case ${cpu_type} in
|
||||
aarch64 | alpha | arm | i386 | ia64 | microblaze | mips | ns32k | or1k | or1knd | pdp11 | ppc | riscv | sparc | z80 | z8k)
|
||||
aarch64 | alpha | arm | csky | i386 | ia64 | microblaze | mips | ns32k | or1k | or1knd | pdp11 | ppc | riscv | sparc | z80 | z8k)
|
||||
bfd_gas=yes
|
||||
;;
|
||||
esac
|
||||
|
|
|
@ -54,6 +54,7 @@ CPU_DOCS = \
|
|||
c-bfin.texi \
|
||||
c-cr16.texi \
|
||||
c-cris.texi \
|
||||
c-csky.texi \
|
||||
c-d10v.texi \
|
||||
c-epiphany.texi \
|
||||
c-h8300.texi \
|
||||
|
|
|
@ -409,6 +409,7 @@ CPU_DOCS = \
|
|||
c-bfin.texi \
|
||||
c-cr16.texi \
|
||||
c-cris.texi \
|
||||
c-csky.texi \
|
||||
c-d10v.texi \
|
||||
c-epiphany.texi \
|
||||
c-h8300.texi \
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
@set Blackfin
|
||||
@set CR16
|
||||
@set CRIS
|
||||
@set CSKY
|
||||
@set D10V
|
||||
@set D30V
|
||||
@set EPIPHANY
|
||||
|
|
|
@ -306,6 +306,26 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
|
|||
@c Deprecated -- deliberately not documented.
|
||||
@c [@b{-h}] [@b{-H}]
|
||||
@end ifset
|
||||
@ifset CSKY
|
||||
|
||||
@emph{Target C-SKY options:}
|
||||
[@b{-march=@var{arch}}] [@b{-mcpu=@var{cpu}}]
|
||||
[@b{-EL}] [@b{-mlittle-endian}] [@b{-EB}] [@b{-mbig-endian}]
|
||||
[@b{-fpic}] [@b{-pic}]
|
||||
[@b{-mljump}] [@b{-mno-ljump}]
|
||||
[@b{-force2bsr}] [@b{-mforce2bsr}] [@b{-no-force2bsr}] [@b{-mno-force2bsr}]
|
||||
[@b{-jsri2bsr}] [@b{-mjsri2bsr}] [@b{-no-jsri2bsr }] [@b{-mno-jsri2bsr}]
|
||||
[@b{-mnolrw }] [@b{-mno-lrw}]
|
||||
[@b{-melrw}] [@b{-mno-elrw}]
|
||||
[@b{-mlaf }] [@b{-mliterals-after-func}]
|
||||
[@b{-mno-laf}] [@b{-mno-literals-after-func}]
|
||||
[@b{-mlabr}] [@b{-mliterals-after-br}]
|
||||
[@b{-mno-labr}] [@b{-mnoliterals-after-br}]
|
||||
[@b{-mistack}] [@b{-mno-istack}]
|
||||
[@b{-mhard-float}] [@b{-mmp}] [@b{-mcp}] [@b{-mcache}]
|
||||
[@b{-msecurity}] [@b{-mtrust}]
|
||||
[@b{-mdsp}] [@b{-medsp}] [@b{-mvdsp}]
|
||||
@end ifset
|
||||
@ifset D10V
|
||||
|
||||
@emph{Target D10V options:}
|
||||
|
@ -979,6 +999,25 @@ the Blackfin processor family.
|
|||
See the info pages for documentation of the CRIS-specific options.
|
||||
@end ifset
|
||||
|
||||
@ifset CSKY
|
||||
|
||||
@ifclear man
|
||||
@xref{C-SKY Options}, for the options available when @value{AS} is
|
||||
configured for the C-SKY processor family.
|
||||
@end ifclear
|
||||
|
||||
@ifset man
|
||||
@c man begin OPTIONS
|
||||
The following options are available when @value{AS} is configured for
|
||||
the C-SKY processor family.
|
||||
@c man end
|
||||
@c man begin INCLUDE
|
||||
@include c-csky.texi
|
||||
@c ended inside the included file
|
||||
@end ifset
|
||||
|
||||
@end ifset
|
||||
|
||||
@ifset D10V
|
||||
The following options are available when @value{AS} is configured for
|
||||
a D10V processor.
|
||||
|
@ -7548,6 +7587,9 @@ subject, see the hardware manufacturer's manual.
|
|||
@ifset CRIS
|
||||
* CRIS-Dependent:: CRIS Dependent Features
|
||||
@end ifset
|
||||
@ifset CSKY
|
||||
* C-SKY-Dependent:: C-SKY Dependent Features
|
||||
@end ifset
|
||||
@ifset D10V
|
||||
* D10V-Dependent:: D10V Dependent Features
|
||||
@end ifset
|
||||
|
@ -7731,6 +7773,10 @@ subject, see the hardware manufacturer's manual.
|
|||
@include c-cris.texi
|
||||
@end ifset
|
||||
|
||||
@ifset CSKY
|
||||
@include c-csky.texi
|
||||
@end ifset
|
||||
|
||||
@ifset Renesas-all
|
||||
@ifclear GENERIC
|
||||
@node Machine Dependencies
|
||||
|
|
|
@ -0,0 +1,195 @@
|
|||
@c Copyright (C) 2012-2018 Free Software Foundation, Inc.
|
||||
@c This is part of the GAS manual.
|
||||
@c For copying conditions, see the file as.texinfo.
|
||||
@c man end
|
||||
@ifset GENERIC
|
||||
@page
|
||||
@node C-SKY-Dependent
|
||||
@chapter C-SKY Dependent Features
|
||||
@end ifset
|
||||
@ifclear GENERIC
|
||||
@node Machine Dependencies
|
||||
@chapter C-SKY Dependent Features
|
||||
@end ifclear
|
||||
|
||||
@cindex C-SKY support
|
||||
@menu
|
||||
* C-SKY Options:: Options
|
||||
* C-SKY Syntax:: Syntax
|
||||
@end menu
|
||||
|
||||
@node C-SKY Options
|
||||
@section Options
|
||||
@cindex C-SKY options
|
||||
@cindex options for C-SKY
|
||||
|
||||
@c man begin OPTIONS
|
||||
@table @gcctabopt
|
||||
|
||||
@cindex @code{march} command-line option, C-SKY
|
||||
@item -march=@var{archname}
|
||||
Assemble for architecture @var{archname}. The @option{--help} option
|
||||
lists valid values for @var{archname}.
|
||||
|
||||
@cindex @code{mcpu} command-line option, C-SKY
|
||||
@item -mcpu=@var{cpuname}
|
||||
Assemble for architecture @var{cpuname}. The @option{--help} option
|
||||
lists valid values for @var{cpuname}.
|
||||
|
||||
@cindex @code{EL} command-line option, C-SKY
|
||||
@cindex @code{mlittle-endian} command-line option, C-SKY
|
||||
@item -EL
|
||||
@itemx -mlittle-endian
|
||||
Generate little-endian output.
|
||||
|
||||
@cindex @code{EB} command-line option, C-SKY
|
||||
@cindex @code{mbig-endian} command-line option, C-SKY
|
||||
@item -EB
|
||||
@itemx -mbig-endian
|
||||
Generate big-endian output.
|
||||
|
||||
@cindex @code{fpic} command-line option, C-SKY
|
||||
@cindex @code{pic} command-line option, C-SKY
|
||||
@item -fpic
|
||||
@itemx -pic
|
||||
Generate position-independent code.
|
||||
|
||||
@cindex @code{mljump} command-line option, C-SKY
|
||||
@cindex @code{mno-ljump} command-line option, C-SKY
|
||||
@item -mljump
|
||||
@itemx -mno-ljump
|
||||
Enable/disable transformation of the short branch instructions
|
||||
@code{jbf}, @code{jbt}, and @code{jbr} to @code{jmpi}.
|
||||
This option is for V2 processors only.
|
||||
It is ignored on CK801 and CK802 targets, which do not support the @code{jmpi}
|
||||
instruction, and is enabled by default for other processors.
|
||||
|
||||
@cindex @code{mbranch-stub} command-line option, C-SKY
|
||||
@cindex @code{mno-branch-stub} command-line option, C-SKY
|
||||
@item -mbranch-stub
|
||||
@itemx -mno-branch-stub
|
||||
Pass through @code{R_CKCORE_PCREL_IMM26BY2} relocations for @code{bsr}
|
||||
instructions to the linker.
|
||||
|
||||
This option is only available for bare-metal C-SKY V2 ELF targets,
|
||||
where it is enabled by default. It cannot be used in code that will be
|
||||
dynamically linked against shared libraries.
|
||||
|
||||
@cindex @code{force2bsr} command-line option, C-SKY
|
||||
@cindex @code{mforce2bsr} command-line option, C-SKY
|
||||
@cindex @code{no-force2bsr} command-line option, C-SKY
|
||||
@cindex @code{mno-force2bsr} command-line option, C-SKY
|
||||
@item -force2bsr
|
||||
@itemx -mforce2bsr
|
||||
@itemx -no-force2bsr
|
||||
@itemx -mno-force2bsr
|
||||
Enable/disable transformation of @code{jbsr} instructions to @code{bsr}.
|
||||
This option is always enabled (and @option{-mno-force2bsr} is ignored)
|
||||
for CK801/CK802 targets. It is also always enabled when
|
||||
@option{-mbranch-stub} is in effect.
|
||||
|
||||
@cindex @code{jsri2bsr} command-line option, C-SKY
|
||||
@cindex @code{mjsri2bsr} command-line option, C-SKY
|
||||
@cindex @code{no-jsri2bsr} command-line option, C-SKY
|
||||
@cindex @code{mno-jsri2bsr} command-line option, C-SKY
|
||||
@item -jsri2bsr
|
||||
@itemx -mjsri2bsr
|
||||
@itemx -no-jsri2bsr
|
||||
@itemx -mno-jsri2bsr
|
||||
Enable/disable transformation of @code{jsri} instructions to @code{bsr}.
|
||||
This option is enabled by default.
|
||||
|
||||
@cindex @code{mnolrw} command-line option, C-SKY
|
||||
@cindex @code{mno-lrw} command-line option, C-SKY
|
||||
@item -mnolrw
|
||||
@itemx -mno-lrw
|
||||
Enable/disable transformation of @code{lrw} instructions into a
|
||||
@code{movih}/@code{ori} pair.
|
||||
|
||||
@cindex @code{melrw} command-line option, C-SKY
|
||||
@cindex @code{mno-elrw} command-line option, C-SKY
|
||||
@item -melrw
|
||||
@itemx -mno-elrw
|
||||
Enable/disable extended @code{lrw} instructions.
|
||||
This option is enabled by default for CK800-series processors.
|
||||
|
||||
@cindex @code{mlaf} command-line option, C-SKY
|
||||
@cindex @code{mliterals-after-func} command-line option, C-SKY
|
||||
@cindex @code{mno-laf} command-line option, C-SKY
|
||||
@cindex @code{mno-literals-after-func} command-line option, C-SKY
|
||||
@item -mlaf
|
||||
@itemx -mliterals-after-func
|
||||
@itemx -mno-laf
|
||||
@itemx -mno-literals-after-func
|
||||
Enable/disable placement of literal pools after each function.
|
||||
|
||||
@cindex @code{mlabr} command-line option, C-SKY
|
||||
@cindex @code{mliterals-after-br} command-line option, C-SKY
|
||||
@cindex @code{mno-labr} command-line option, C-SKY
|
||||
@cindex @code{mnoliterals-after-br} command-line option, C-SKY
|
||||
@item -mlabr
|
||||
@itemx -mliterals-after-br
|
||||
@itemx -mno-labr
|
||||
@itemx -mnoliterals-after-br
|
||||
Enable/disable placement of literal pools after unconditional branches.
|
||||
This option is enabled by default.
|
||||
|
||||
@cindex @code{mistack} command-line option, C-SKY
|
||||
@cindex @code{mno-istack} command-line option, C-SKY
|
||||
@item -mistack
|
||||
@itemx -mno-istack
|
||||
Enable/disable interrupt stack instructions. This option is enabled by
|
||||
default on CK801, CK802, and CK802 processors.
|
||||
|
||||
@end table
|
||||
|
||||
The following options explicitly enable certain optional instructions.
|
||||
These features are also enabled implicitly by using @code{-mcpu=} to specify
|
||||
a processor that supports it.
|
||||
|
||||
@table @gcctabopt
|
||||
@cindex @code{mhard-float} command-line option, C-SKY
|
||||
@item -mhard-float
|
||||
Enable hard float instructions.
|
||||
|
||||
@cindex @code{mmp} command-line option, C-SKY
|
||||
@item -mmp
|
||||
Enable multiprocessor instructions.
|
||||
|
||||
@cindex @code{mcp} command-line option, C-SKY
|
||||
@item -mcp
|
||||
Enable coprocessor instructions.
|
||||
|
||||
@cindex @code{mcache} command-line option, C-SKY
|
||||
@item -mcache
|
||||
Enable cache prefetch instruction.
|
||||
|
||||
@cindex @code{msecurity} command-line option, C-SKY
|
||||
@item -msecurity
|
||||
Enable C-SKY security instructions.
|
||||
|
||||
@cindex @code{mtrust} command-line option, C-SKY
|
||||
@item -mtrust
|
||||
Enable C-SKY trust instructions.
|
||||
|
||||
@cindex @code{mdsp} command-line option, C-SKY
|
||||
@item -mdsp
|
||||
Enable DSP instructions.
|
||||
|
||||
@cindex @code{medsp} command-line option, C-SKY
|
||||
@item -medsp
|
||||
Enable enhanced DSP instructions.
|
||||
|
||||
@cindex @code{mvdsp} command-line option, C-SKY
|
||||
@item -mvdsp
|
||||
Enable vector DSP instructions.
|
||||
|
||||
@end table
|
||||
@c man end
|
||||
|
||||
@node C-SKY Syntax
|
||||
@section Syntax
|
||||
|
||||
@code{@value{AS}} implements the standard C-SKY assembler syntax
|
||||
documented in the
|
||||
@cite{C-SKY V2 CPU Applications Binary Interface Standards Manual}.
|
|
@ -0,0 +1,14 @@
|
|||
#name: csky - 801_relax
|
||||
#as: -march=ck801
|
||||
#objdump: -d
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*2:\s*0803\s*bt\s*0x8\s*.*
|
||||
\s*4:\s*e800025c\s*br\s*0x4bc\s*.*
|
||||
#...
|
||||
\s*4bc:\s*0c03\s*bf\s*0x4c2\s*.*
|
||||
\s*4be:\s*e800fda2\s*br\s*0x2\s*.*
|
||||
#...
|
|
@ -0,0 +1,16 @@
|
|||
# Test ck801 jbf/jbt branch relaxation.
|
||||
|
||||
addu a1, a2, a3
|
||||
.L1:
|
||||
jbf .L2
|
||||
addu a3, a2, a1
|
||||
|
||||
.rept 600
|
||||
nop
|
||||
.endr
|
||||
|
||||
|
||||
addu a1, a2, a3
|
||||
.L2:
|
||||
jbt .L1
|
||||
addu a3, a2, a1
|
|
@ -0,0 +1,13 @@
|
|||
# name: csky - 802j
|
||||
#as: -mcpu=ck802j -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*1463\s*ipop
|
||||
\s*[0-9a-f]*:\s*1462\s*ipush
|
||||
\s*[0-9a-f]*:\s*1460\s*nie
|
||||
\s*[0-9a-f]*:\s*1461\s*nir
|
||||
\s*[0-9a-f]*:\s*3ae0\s*jmpix\s*r2,\s*16.*
|
|
@ -0,0 +1,7 @@
|
|||
.text
|
||||
all:
|
||||
ipop
|
||||
ipush
|
||||
nie
|
||||
nir
|
||||
jmpix r2, 16
|
|
@ -0,0 +1,150 @@
|
|||
# name: csky - all
|
||||
#as: -mcpu=ck610e -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*0000\s*bkpt
|
||||
\s*[0-9a-f]*:\s*0001\s*sync
|
||||
\s*[0-9a-f]*:\s*0002\s*rte
|
||||
\s*[0-9a-f]*:\s*0002\s*rte
|
||||
\s*[0-9a-f]*:\s*0003\s*rfi
|
||||
\s*[0-9a-f]*:\s*0004\s*stop
|
||||
\s*[0-9a-f]*:\s*0005\s*wait
|
||||
\s*[0-9a-f]*:\s*0006\s*doze
|
||||
\s*[0-9a-f]*:\s*0007\s*idly4
|
||||
\s*[0-9a-f]*:\s*000b\s*trap\s*3
|
||||
\s*[0-9a-f]*:\s*0021\s*mvc\s*r1
|
||||
\s*[0-9a-f]*:\s*0032\s*mvcv\s*r2
|
||||
\s*[0-9a-f]*:\s*0042\s*ldq\s*r4-r7, \(r2\)
|
||||
\s*[0-9a-f]*:\s*0052\s*stq\s*r4-r7, \(r2\)
|
||||
\s*[0-9a-f]*:\s*0061\s*ldm\s*r1-r15, \(sp\)
|
||||
\s*[0-9a-f]*:\s*0082\s*dect\s*r2, r2, 1
|
||||
\s*[0-9a-f]*:\s*0092\s*decf\s*r2, r2, 1
|
||||
\s*[0-9a-f]*:\s*00a2\s*inct\s*r2, r2, 1
|
||||
\s*[0-9a-f]*:\s*00b2\s*incf\s*r2, r2, 1
|
||||
\s*[0-9a-f]*:\s*00c1\s*jmp\s*r1
|
||||
\s*[0-9a-f]*:\s*00d1\s*jsr\s*r1
|
||||
\s*[0-9a-f]*:\s*00eb\s*ff1\s*r11, r11
|
||||
\s*[0-9a-f]*:\s*00f1\s*brev\s*r1, r1
|
||||
\s*[0-9a-f]*:\s*0102\s*xtrb3\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0112\s*xtrb2\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0122\s*xtrb1\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0132\s*xtrb0\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0132\s*xtrb0\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0132\s*xtrb0\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*1213\s*mov\s*r3, r1
|
||||
\s*[0-9a-f]*:\s*0142\s*zextb\s*r2, r2
|
||||
\s*[0-9a-f]*:\s*0152\s*sextb\s*r2, r2
|
||||
\s*[0-9a-f]*:\s*0162\s*zexth\s*r2, r2
|
||||
\s*[0-9a-f]*:\s*0172\s*sexth\s*r2, r2
|
||||
\s*[0-9a-f]*:\s*0182\s*declt\s*r2, r2, 1
|
||||
\s*[0-9a-f]*:\s*01b1\s*decne\s*r1, r1, 1
|
||||
\s*[0-9a-f]*:\s*01a1\s*decgt\s*r1, r1, 1
|
||||
\s*[0-9a-f]*:\s*01c1\s*clrt\s*r1
|
||||
\s*[0-9a-f]*:\s*01d1\s*clrf\s*r1
|
||||
\s*[0-9a-f]*:\s*01e3\s*abs\s*r3, r3
|
||||
\s*[0-9a-f]*:\s*01fc\s*not\s*r12, r12
|
||||
\s*[0-9a-f]*:\s*0221\s*movt\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0343\s*mult\s*r3, r3, r4
|
||||
\s*[0-9a-f]*:\s*0587\s*subu\s*r7, r7, r8
|
||||
\s*[0-9a-f]*:\s*0587\s*subu\s*r7, r7, r8
|
||||
\s*[0-9a-f]*:\s*06a9\s*addc\s*r9, r9, r10
|
||||
\s*[0-9a-f]*:\s*07cb\s*subc\s*r11, r11, r12
|
||||
\s*[0-9a-f]*:\s*0adc\s*movf\s*r12, r13
|
||||
\s*[0-9a-f]*:\s*0bdc\s*lsr\s*r12, r12, r13
|
||||
\s*[0-9a-f]*:\s*0ced\s*cmphs\s*r13, r14
|
||||
\s*[0-9a-f]*:\s*0ded\s*cmplt\s*r13, r14
|
||||
\s*[0-9a-f]*:\s*0eed\s*tst\s*r13, r14
|
||||
\s*[0-9a-f]*:\s*0fed\s*cmpne\s*r13, r14
|
||||
\s*[0-9a-f]*:\s*11f7\s*psrclr\s*ie, fe, ee
|
||||
\s*[0-9a-f]*:\s*1253\s*mov\s*r3, r5
|
||||
\s*[0-9a-f]*:\s*1332\s*bgenr\s*r2, r3
|
||||
\s*[0-9a-f]*:\s*1643\s*and\s*r3, r3, r4
|
||||
\s*[0-9a-f]*:\s*1543\s*ixw\s*r3, r3, r4
|
||||
\s*[0-9a-f]*:\s*1a43\s*asr\s*r3, r3, r4
|
||||
\s*[0-9a-f]*:\s*1c43\s*addu\s*r3, r3, r4
|
||||
\s*[0-9a-f]*:\s*1d32\s*ixh\s*r2, r2, r3
|
||||
\s*[0-9a-f]*:\s*1f43\s*andn\s*r3, r3, r4
|
||||
\s*[0-9a-f]*:\s*21f3\s*addi\s*r3, r3, 32
|
||||
\s*[0-9a-f]*:\s*23f3\s*cmplti\s*r3, 32
|
||||
\s*[0-9a-f]*:\s*2413\s*subi\s*r3, r3, 2
|
||||
\s*[0-9a-f]*:\s*2823\s*rsubi\s*r3, r3, 2
|
||||
\s*[0-9a-f]*:\s*2a33\s*cmpnei\s*r3, 3
|
||||
\s*[0-9a-f]*:\s*2c83\s*bmaski\s*r3, 8
|
||||
\s*[0-9a-f]*:\s*2c13\s*divu\s*r3, r3, r1
|
||||
\s*[0-9a-f]*:\s*2c22\s*mflos\s*r2
|
||||
\s*[0-9a-f]*:\s*2c32\s*mfhis\s*r2
|
||||
\s*[0-9a-f]*:\s*2c42\s*mtlo\s*r2
|
||||
\s*[0-9a-f]*:\s*2c52\s*mthi\s*r2
|
||||
\s*[0-9a-f]*:\s*2c62\s*mflo\s*r2
|
||||
\s*[0-9a-f]*:\s*2c72\s*mfhi\s*r2
|
||||
\s*[0-9a-f]*:\s*2e33\s*andi\s*r3, r3, 3
|
||||
\s*[0-9a-f]*:\s*3033\s*bclri\s*r3, r3, 3
|
||||
\s*[0-9a-f]*:\s*3293\s*bgeni\s*r3, 9
|
||||
\s*[0-9a-f]*:\s*6403\s*movi\s*r3, 64
|
||||
\s*[0-9a-f]*:\s*3213\s*divs\s*r3, r3, r1
|
||||
\s*[0-9a-f]*:\s*1221\s*mov\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*3213\s*divs\s*r3, r3, r1
|
||||
\s*[0-9a-f]*:\s*3493\s*bseti\s*r3, r3, 9
|
||||
\s*[0-9a-f]*:\s*3693\s*btsti\s*r3, 9
|
||||
\s*[0-9a-f]*:\s*3803\s*xsr\s*r3, r3, 1
|
||||
\s*[0-9a-f]*:\s*3823\s*rotli\s*r3, r3, 2
|
||||
\s*[0-9a-f]*:\s*3a03\s*asrc\s*r3, r3, 1
|
||||
\s*[0-9a-f]*:\s*3a31\s*asri\s*r1, r1, 3
|
||||
\s*[0-9a-f]*:\s*67f7\s*movi\s*r7, 127
|
||||
\s*[0-9a-f]*:\s*8200\s*ld.w\s*r2,\s*\(r0,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*8210\s*ld.w\s*r2,\s*\(r0,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*8220\s*ld.w\s*r2,\s*\(r0,\s*0x8\)
|
||||
\s*[0-9a-f]*:\s*9200\s*st.w\s*r2,\s*\(r0,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*9210\s*st.w\s*r2,\s*\(r0,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*9220\s*st.w\s*r2,\s*\(r0,\s*0x8\)
|
||||
\s*[0-9a-f]*:\s*c210\s*ld.h\s*r2,\s*\(r0,\s*0x2\)
|
||||
\s*[0-9a-f]*:\s*c220\s*ld.h\s*r2,\s*\(r0,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*d210\s*st.h\s*r2,\s*\(r0,\s*0x2\)
|
||||
\s*[0-9a-f]*:\s*d220\s*st.h\s*r2,\s*\(r0,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*a200\s*ld.b\s*r2,\s*\(r0,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*a210\s*ld.b\s*r2,\s*\(r0,\s*0x1\)
|
||||
\s*[0-9a-f]*:\s*b200\s*st.b\s*r2,\s*\(r0,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*b210\s*st.b\s*r2,\s*\(r0,\s*0x1\)
|
||||
\s*[0-9a-f]*:\s*e798\s*bt\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*ef97\s*bf\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*f796\s*br\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*0c00\s*cmphs\s*r0, r0
|
||||
\s*[0-9a-f]*:\s*0f00\s*cmpne\s*r0, r0
|
||||
\s*[0-9a-f]*:\s*2205\s*cmplti\s*r5, 1
|
||||
\s*[0-9a-f]*:\s*2263\s*cmplti\s*r3, 7
|
||||
\s*[0-9a-f]*:\s*2807\s*rsubi\s*r7, r7, 0
|
||||
\s*[0-9a-f]*:\s*2a06\s*cmpnei\s*r6, 0
|
||||
\s*[0-9a-f]*:\s*37f0\s*btsti\s*r0, 31
|
||||
\s*[0-9a-f]*:\s*31f3\s*bclri\s*r3, r3, 31
|
||||
\s*[0-9a-f]*:\s*6404\s*movi\s*r4, 64
|
||||
\s*[0-9a-f]*:\s*3274\s*bgeni\s*r4, 7
|
||||
\s*[0-9a-f]*:\s*3501\s*bseti\s*r1, r1, 16
|
||||
\s*[0-9a-f]*:\s*3644\s*btsti\s*r4, 4
|
||||
\s*[0-9a-f]*:\s*38c6\s*rotli\s*r6, r6, 12
|
||||
\s*[0-9a-f]*:\s*39f2\s*rotli\s*r2, r2, 31
|
||||
\s*[0-9a-f]*:\s*1200\s*mov\s*r0, r0
|
||||
\s*[0-9a-f]*:\s*0007\s*idly4
|
||||
\s*[0-9a-f]*:\s*0644\s*addc\s*r4, r4, r4
|
||||
\s*[0-9a-f]*:\s*0655\s*addc\s*r5, r5, r5
|
||||
\s*[0-9a-f]*:\s*0132\s*xtrb0\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0151\s*sextb\s*r1, r1
|
||||
\s*[0-9a-f]*:\s*0123\s*xtrb1\s*r1, r3
|
||||
\s*[0-9a-f]*:\s*0151\s*sextb\s*r1, r1
|
||||
\s*[0-9a-f]*:\s*0114\s*xtrb2\s*r1, r4
|
||||
\s*[0-9a-f]*:\s*0151\s*sextb\s*r1, r1
|
||||
\s*[0-9a-f]*:\s*0221\s*movt\s*r1, r2
|
||||
\s*[0-9a-f]*:\s*0a31\s*movf\s*r1, r3
|
||||
\s*[0-9a-f]*:\s*0d22\s*cmplt\s*r2, r2
|
||||
\s*[0-9a-f]*:\s*0672\s*addc\s*r2, r2, r7
|
||||
\s*[0-9a-f]*:\s*0683\s*addc\s*r3, r3, r8
|
||||
\s*[0-9a-f]*:\s*0c44\s*cmphs\s*r4, r4
|
||||
\s*[0-9a-f]*:\s*0764\s*subc\s*r4, r4, r6
|
||||
\s*[0-9a-f]*:\s*0775\s*subc\s*r5, r5, r7
|
||||
\s*[0-9a-f]*:\s*1e26\s*or\s*r6, r6, r2
|
||||
\s*[0-9a-f]*:\s*1e37\s*or\s*r7, r7, r3
|
||||
\s*[0-9a-f]*:\s*1715\s*xor\s*r5, r5, r1
|
||||
\s*[0-9a-f]*:\s*1726\s*xor\s*r6, r6, r2
|
|
@ -0,0 +1,132 @@
|
|||
.text
|
||||
all:
|
||||
bkpt
|
||||
sync
|
||||
rte
|
||||
rfe
|
||||
rfi
|
||||
stop
|
||||
wait
|
||||
doze
|
||||
idly4
|
||||
trap 3
|
||||
mvc r1
|
||||
mvcv r2
|
||||
ldq r4-r7, (r2)
|
||||
stq r4-r7, (r2)
|
||||
ldm r1-r15, (r0)
|
||||
dect r2
|
||||
decf r2
|
||||
inct r2
|
||||
incf r2
|
||||
jmp r1
|
||||
jsr r1
|
||||
ff1 r11
|
||||
brev r1
|
||||
xtrb3 r2
|
||||
xtrb2 r2
|
||||
xtrb1 r2
|
||||
xtrb0 r2
|
||||
xtrb0 r1, r2
|
||||
xtrb0 r3, r2
|
||||
zextb r2
|
||||
sextb r2
|
||||
zexth r2
|
||||
sexth r2
|
||||
declt r2
|
||||
decne r1
|
||||
decgt r1
|
||||
clrt r1
|
||||
clrf r1
|
||||
abs r3
|
||||
not r12
|
||||
movt r1, r2
|
||||
mult r3, r4
|
||||
sub r7, r8
|
||||
subu r7, r8
|
||||
addc r9, r10
|
||||
subc r11, r12
|
||||
movf r12, r13
|
||||
lsr r12, r13
|
||||
cmphs r13, r14
|
||||
cmplt r13, r14
|
||||
tst r13, r14
|
||||
cmpne r13, r14
|
||||
psrclr ee, ie, fe
|
||||
mov r3, r5
|
||||
bgenr r2, r3
|
||||
and r3, r4
|
||||
ixw r3, r4
|
||||
asr r3, r4
|
||||
addu r3, r4
|
||||
ixh r2, r3
|
||||
andn r3, r4
|
||||
addi r3, 32
|
||||
cmplti r3, 32
|
||||
subi r3, 2
|
||||
rsubi r3, 2
|
||||
cmpnei r3, 3
|
||||
bmaski r3, 8
|
||||
divu r3, r1
|
||||
mflos r2
|
||||
mfhis r2
|
||||
mtlo r2
|
||||
mthi r2
|
||||
mflo r2
|
||||
mfhi r2
|
||||
andi r3, 3
|
||||
bclri r3, 3
|
||||
bgeni r3, 9
|
||||
bgeni r3, 6
|
||||
divs r3, r1
|
||||
divs r3, r2
|
||||
bseti r3, 9
|
||||
btsti r3, 9
|
||||
xsr r3
|
||||
rotli r3, 2
|
||||
asrc r3
|
||||
asri r1, 3
|
||||
movi r7, 127
|
||||
ld r2, (r0, 0)
|
||||
ldw r2, (r0, 4)
|
||||
ld.w r2, (r0, 8)
|
||||
st r2, (r0, 0)
|
||||
stw r2, (r0, 4)
|
||||
st.w r2, (r0, 8)
|
||||
ldh r2, (r0, 2)
|
||||
ld.h r2, (r0, 4)
|
||||
sth r2, (r0, 2)
|
||||
st.h r2, (r0, 4)
|
||||
ldb r2, (r0, 0)
|
||||
ld.b r2, (r0, 1)
|
||||
stb r2, (r0, 0)
|
||||
st.b r2, (r0, 1)
|
||||
bt all
|
||||
bf all
|
||||
br all
|
||||
setc
|
||||
clrc
|
||||
tstle r5
|
||||
cmplei r3, 6
|
||||
neg r7
|
||||
tstne r6
|
||||
tstlt r0
|
||||
mclri r3, 0x80000000
|
||||
mgeni r4, 0x40
|
||||
mgeni r4, 0x80
|
||||
mseti r1, 0x10000
|
||||
mtsti r4, 16
|
||||
rori r6, 20
|
||||
rotri r2, 1
|
||||
nop
|
||||
idly 4
|
||||
rolc r4, 1
|
||||
rotlc r5, 1
|
||||
sxtrb0 r1, r2
|
||||
sxtrb1 r1, r3
|
||||
sxtrb2 r1, r4
|
||||
movtf r1, r2, r3
|
||||
addc64 r2, r2, r7
|
||||
subc64 r4, r4, r6
|
||||
or64 r6, r6, r2
|
||||
xor64 r5, r5, r1
|
|
@ -0,0 +1,12 @@
|
|||
# name: bsr1 - csky
|
||||
#as: -mcpu=ck610
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*ffff\s*bsr\s*0x0\s*\/\/\s*0\s*\<lable\>
|
||||
\s*[0-9a-f]:\s*f7fe\s*br\s*0x0\s*\/\/\s*0\s*\<lable*\>
|
||||
\s*[0-9a-f]:\s*e7fd\s*bt\s*0x0\s*\/\/\s*0\s*\<lable*\>
|
||||
\s*[0-9a-f]:\s*effc\s*bf\s*0x0\s*\/\/\s*0\s*\<lable*\>
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
lable:
|
||||
bsr lable
|
||||
br lable
|
||||
bt lable
|
||||
bf lable
|
|
@ -0,0 +1,9 @@
|
|||
# name: bsr2 - csky
|
||||
#as: -mcpu=ck610
|
||||
#objdump: -r
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
RELOCATION RECORDS FOR \[\.text\]:
|
||||
#...
|
||||
[0-9a-f]*\s*R_CKCORE_PCREL_IMM11BY2\s*hello
|
|
@ -0,0 +1,3 @@
|
|||
.text
|
||||
lable:
|
||||
bsr hello
|
|
@ -0,0 +1,7 @@
|
|||
#
|
||||
# Some CSKY tests
|
||||
#
|
||||
|
||||
if {[istarget csky*-*-*]} {
|
||||
run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]]
|
||||
}
|
|
@ -0,0 +1,364 @@
|
|||
# name: csky - vdsp
|
||||
#as: -mcpu=ck810v -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*f8623c02\s*vstrq\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623d02\s*vstrq\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623e02\s*vstrq\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623402\s*vldrq\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623502\s*vldrq\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623602\s*vldrq\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623802\s*vstrd\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623902\s*vstrd\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623a02\s*vstrd\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623002\s*vldrd\.8\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623102\s*vldrd\.16\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8623202\s*vldrd\.32\s*fr2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f8022412\s*vldq\.8\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022512\s*vldq\.16\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022612\s*vldq\.32\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022c12\s*vstq\.8\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022d12\s*vstq\.16\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022e12\s*vstq\.32\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022022\s*vldd\.8\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022122\s*vldd\.16\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022222\s*vldd\.32\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022822\s*vstd\.8\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022922\s*vstd\.16\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*f8022a22\s*vstd\.32\s*fr2,\s*\(r2,\s*0x10\)
|
||||
\s*[0-9a-f]*:\s*c43eb020\s*vmulsh\s*r30,\s*r1
|
||||
\s*[0-9a-f]*:\s*c7e0b040\s*vmulsha\s*r0,\s*r31
|
||||
\s*[0-9a-f]*:\s*c58cb420\s*vmulsw\s*r12,\s*r12
|
||||
\s*[0-9a-f]*:\s*c6bcb440\s*vmulswa\s*r28,\s*r21
|
||||
\s*[0-9a-f]*:\s*c481b480\s*vmulsws\s*r1,\s*r4
|
||||
\s*[0-9a-f]*:\s*f9221201\s*vmfvr.u8\s*r1,\s*vr2\[9\]
|
||||
\s*[0-9a-f]*:\s*f8041223\s*vmfvr.u16\s*r3,\s*vr4\[0\]
|
||||
\s*[0-9a-f]*:\s*f8a8125f\s*vmfvr.u32\s*r31,\s*vr8\[5\]
|
||||
\s*[0-9a-f]*:\s*f824128d\s*vmfvr.s8\s*r13,\s*vr4\[1\]
|
||||
\s*[0-9a-f]*:\s*f9af12b7\s*vmfvr.s16\s*r23,\s*vr15\[13\]
|
||||
\s*[0-9a-f]*:\s*f8101305\s*vmtvr.u8\s*vr5\[0\],\s*r16
|
||||
\s*[0-9a-f]*:\s*f8ea1324\s*vmtvr.u16\s*vr4\[7\],\s*r10
|
||||
\s*[0-9a-f]*:\s*f9ea134f\s*vmtvr.u32\s*vr15\[15\],\s*r10
|
||||
\s*[0-9a-f]*:\s*f94a0e81\s*vdup.8\s*fr1,\s*vr10\[10\]
|
||||
\s*[0-9a-f]*:\s*f83a0e8f\s*vdup.16\s*fr15,\s*vr10\[1\]
|
||||
\s*[0-9a-f]*:\s*faaa0e87\s*vdup.32\s*fr7,\s*vr10\[5\]
|
||||
\s*[0-9a-f]*:\s*f8030c02\s*vmov\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8030062\s*vcadd\.eu8\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130062\s*vcadd\.eu16\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8030072\s*vcadd\.es8\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130072\s*vcadd\.es16\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8030c22\s*vmov\.eu8\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130c22\s*vmov\.eu16\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8030c32\s*vmov\.es8\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130c32\s*vmov\.es16\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d02\s*vmov\.u16\.l\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d02\s*vmov\.u32\.l\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d12\s*vmov\.s16\.l\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d12\s*vmov\.s32\.l\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d42\s*vmov\.u16\.sl\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d42\s*vmov\.u32\.sl\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d52\s*vmov\.s16\.sl\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d52\s*vmov\.s32\.sl\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d62\s*vmov\.u16\.h\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d62\s*vmov\.u32\.h\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d72\s*vmov\.s16\.h\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d72\s*vmov\.s32\.h\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d82\s*vmov\.u16\.rh\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d82\s*vmov\.u32\.rh\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130d92\s*vmov\.s16\.rh\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*fa030d92\s*vmov\.s32\.rh\s*vr2,\s*vr3
|
||||
\s*[0-9a-f]*:\s*f8130dc2\s*vstou\.u16\.sl\s*vr2,\s*vr3
|
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|
||||
\s*[0-9a-f]*:\s*f8830432\s*vmul\.es8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930432\s*vmul\.es16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830442\s*vmula\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930442\s*vmula\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830442\s*vmula\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830452\s*vmula\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930452\s*vmula\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830452\s*vmula\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830462\s*vmula\.eu8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930462\s*vmula\.eu16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830462\s*vmula\.eu32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830472\s*vmula\.es8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930472\s*vmula\.es16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830472\s*vmula\.es32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830482\s*vmuls\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930482\s*vmuls\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830482\s*vmuls\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830492\s*vmuls\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930492\s*vmuls\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830492\s*vmuls\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88304a2\s*vmuls\.eu8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89304a2\s*vmuls\.eu16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88304b2\s*vmuls\.es8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89304b2\s*vmuls\.es16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830682\s*vshr\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930682\s*vshr\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830682\s*vshr\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830692\s*vshr\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930692\s*vshr\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830692\s*vshr\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88306c2\s*vshr\.u8\.r\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89306c2\s*vshr\.u16\.r\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa8306c2\s*vshr\.u32\.r\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88306d2\s*vshr\.s8\.r\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89306d2\s*vshr\.s16\.r\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa8306d2\s*vshr\.s32\.r\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830782\s*vshl\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930782\s*vshl\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830782\s*vshl\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830792\s*vshl\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930792\s*vshl\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830792\s*vshl\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88307c2\s*vshl\.u8\.s\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89307c2\s*vshl\.u16\.s\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa8307c2\s*vshl\.u32\.s\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88307d2\s*vshl\.s8\.s\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89307d2\s*vshl\.s16\.s\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa8307d2\s*vshl\.s32\.s\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830802\s*vcmphs\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930802\s*vcmphs\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830802\s*vcmphs\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830812\s*vcmphs\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930812\s*vcmphs\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830812\s*vcmphs\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830822\s*vcmplt\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930822\s*vcmplt\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830822\s*vcmplt\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830832\s*vcmplt\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930832\s*vcmplt\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830832\s*vcmplt\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830842\s*vcmpne\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930842\s*vcmpne\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830842\s*vcmpne\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830852\s*vcmpne\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930852\s*vcmpne\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830852\s*vcmpne\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830902\s*vmax\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930902\s*vmax\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830902\s*vmax\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830912\s*vmax\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930912\s*vmax\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830912\s*vmax\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830922\s*vmin\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930922\s*vmin\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830922\s*vmin\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830932\s*vmin\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930932\s*vmin\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830932\s*vmin\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830982\s*vcmax\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930982\s*vcmax\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830982\s*vcmax\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830992\s*vcmax\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930992\s*vcmax\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830992\s*vcmax\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88309a2\s*vcmin\.u8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89309a2\s*vcmin\.u16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa8309a2\s*vcmin\.u32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f88309b2\s*vcmin\.s8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f89309b2\s*vcmin\.s16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa8309b2\s*vcmin\.s32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830a02\s*vand\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930a02\s*vand\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830a02\s*vand\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830a22\s*vandn\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930a22\s*vandn\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830a22\s*vandn\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830a42\s*vor\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930a42\s*vor\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830a42\s*vor\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830a62\s*vnor\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930a62\s*vnor\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830a62\s*vnor\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830a82\s*vxor\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930a82\s*vxor\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830a82\s*vxor\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830b22\s*vtst\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930b22\s*vtst\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830b22\s*vtst\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830f02\s*vbpermz\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930f02\s*vbpermz\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830f02\s*vbpermz\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830f22\s*vbperm\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930f22\s*vbperm\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830f22\s*vbperm\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830fc2\s*vdch\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930fc2\s*vdch\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830fc2\s*vdch\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830fe2\s*vdcl\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930fe2\s*vdcl\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830fe2\s*vdcl\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830f82\s*vich\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930f82\s*vich\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830f82\s*vich\.32\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8830fa2\s*vicl\.8\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*f8930fa2\s*vicl\.16\s*vr2,\s*vr3,\s*vr4
|
||||
\s*[0-9a-f]*:\s*fa830fa2\s*vicl\.32\s*vr2,\s*vr3,\s*vr4
|
|
@ -0,0 +1,359 @@
|
|||
|
||||
.text
|
||||
vdsp_instructions:
|
||||
vstrq.8 vr2, (r2, r3 << 0)
|
||||
vstrq.16 vr2, (r2, r3 << 0)
|
||||
vstrq.32 vr2, (r2, r3 << 0)
|
||||
vldrq.8 vr2, (r2, r3 << 0)
|
||||
vldrq.16 vr2, (r2, r3 << 0)
|
||||
vldrq.32 vr2, (r2, r3 << 0)
|
||||
vstrd.8 vr2, (r2, r3 << 0)
|
||||
vstrd.16 vr2, (r2, r3 << 0)
|
||||
vstrd.32 vr2, (r2, r3 << 0)
|
||||
vldrd.8 vr2, (r2, r3 << 0)
|
||||
vldrd.16 vr2, (r2, r3 << 0)
|
||||
vldrd.32 vr2, (r2, r3 << 0)
|
||||
vldq.8 vr2, (r2, 16)
|
||||
vldq.16 vr2, (r2, 16)
|
||||
vldq.32 vr2, (r2, 16)
|
||||
vstq.8 vr2, (r2, 16)
|
||||
vstq.16 vr2, (r2, 16)
|
||||
vstq.32 vr2, (r2, 16)
|
||||
vldd.8 vr2, (r2, 16)
|
||||
vldd.16 vr2, (r2, 16)
|
||||
vldd.32 vr2, (r2, 16)
|
||||
vstd.8 vr2, (r2, 16)
|
||||
vstd.16 vr2, (r2, 16)
|
||||
vstd.32 vr2, (r2, 16)
|
||||
vmulsh r30, r1
|
||||
vmulsha r0, r31
|
||||
vmulsw r12, r12
|
||||
vmulswa r28, r21
|
||||
vmulsws r1, r4
|
||||
vmfvr.u8 r1, vr2[9]
|
||||
vmfvr.u16 r3, fr4[0]
|
||||
vmfvr.u32 r31, vr8[5]
|
||||
vmfvr.s8 r13, fr4[1]
|
||||
vmfvr.s16 r23, vr15[13]
|
||||
vmtvr.u8 vr5[0], r16
|
||||
vmtvr.u16 fr4[7], r10
|
||||
vmtvr.u32 vr15 [ 15 ] , r10
|
||||
vdup.8 vr1, vr10[10]
|
||||
vdup.16 vr15, fr10[1]
|
||||
vdup.32 fr7, fr10[5]
|
||||
vmov vr2, vr3
|
||||
vcadd.eu8 vr2, vr3
|
||||
vcadd.eu16 vr2, vr3
|
||||
vcadd.es8 vr2, vr3
|
||||
vcadd.es16 vr2, vr3
|
||||
vmov.eu8 vr2, vr3
|
||||
vmov.eu16 vr2, vr3
|
||||
vmov.es8 vr2, vr3
|
||||
vmov.es16 vr2, vr3
|
||||
vmov.u16.l vr2, vr3
|
||||
vmov.u32.l vr2, vr3
|
||||
vmov.s16.l vr2, vr3
|
||||
vmov.s32.l vr2, vr3
|
||||
vmov.u16.sl vr2, vr3
|
||||
vmov.u32.sl vr2, vr3
|
||||
vmov.s16.sl vr2, vr3
|
||||
vmov.s32.sl vr2, vr3
|
||||
vmov.u16.h vr2, vr3
|
||||
vmov.u32.h vr2, vr3
|
||||
vmov.s16.h vr2, vr3
|
||||
vmov.s32.h vr2, vr3
|
||||
vmov.u16.rh vr2, vr3
|
||||
vmov.u32.rh vr2, vr3
|
||||
vmov.s16.rh vr2, vr3
|
||||
vmov.s32.rh vr2, vr3
|
||||
vstou.u16.sl vr2, vr3
|
||||
vstou.u32.sl vr2, vr3
|
||||
vstou.s16.sl vr2, vr3
|
||||
vstou.s32.sl vr2, vr3
|
||||
vrev.8 vr2, vr3
|
||||
vrev.16 vr2, vr3
|
||||
vrev.32 vr2, vr3
|
||||
vcnt1.8 vr2, vr3
|
||||
vclz.8 vr2, vr3
|
||||
vclz.16 vr2, vr3
|
||||
vclz.32 vr2, vr3
|
||||
vcls.u8 vr2, vr3
|
||||
vcls.u16 vr2, vr3
|
||||
vcls.u32 vr2, vr3
|
||||
vcls.s8 vr2, vr3
|
||||
vcls.s16 vr2, vr3
|
||||
vcls.s32 vr2, vr3
|
||||
vabs.s8 vr2, vr3
|
||||
vabs.s16 vr2, vr3
|
||||
vabs.s32 vr2, vr3
|
||||
vabs.u8.s vr2, vr3
|
||||
vabs.u16.s vr2, vr3
|
||||
vabs.u32.s vr2, vr3
|
||||
vabs.s8.s vr2, vr3
|
||||
vabs.s16.s vr2, vr3
|
||||
vabs.s32.s vr2, vr3
|
||||
vneg.u8 vr2, vr3
|
||||
vneg.u16 vr2, vr3
|
||||
vneg.u32 vr2, vr3
|
||||
vneg.s8 vr2, vr3
|
||||
vneg.s16 vr2, vr3
|
||||
vneg.s32 vr2, vr3
|
||||
vneg.u8.s vr2, vr3
|
||||
vneg.u16.s vr2, vr3
|
||||
vneg.u32.s vr2, vr3
|
||||
vneg.s8.s vr2, vr3
|
||||
vneg.s16.s vr2, vr3
|
||||
vneg.s32.s vr2, vr3
|
||||
vcmphsz.u8 vr2, vr3
|
||||
vcmphsz.u16 vr2, vr3
|
||||
vcmphsz.u32 vr2, vr3
|
||||
vcmphsz.s8 vr2, vr3
|
||||
vcmphsz.s16 vr2, vr3
|
||||
vcmphsz.s32 vr2, vr3
|
||||
vcmpltz.u8 vr2, vr3
|
||||
vcmpltz.u16 vr2, vr3
|
||||
vcmpltz.u32 vr2, vr3
|
||||
vcmpltz.s8 vr2, vr3
|
||||
vcmpltz.s16 vr2, vr3
|
||||
vcmpltz.s32 vr2, vr3
|
||||
vcmpnez.u8 vr2, vr3
|
||||
vcmpnez.u16 vr2, vr3
|
||||
vcmpnez.u32 vr2, vr3
|
||||
vcmpnez.s8 vr2, vr3
|
||||
vcmpnez.s8 vr2, vr3
|
||||
vcmpnez.s16 vr2, vr3
|
||||
vcmpnez.s32 vr2, vr3
|
||||
vtrch.8 vr2, vr3, vr4
|
||||
vtrch.16 vr2, vr3, vr4
|
||||
vtrch.32 vr2, vr3, vr4
|
||||
vtrcl.8 vr2, vr3, vr4
|
||||
vtrcl.16 vr2, vr3, vr4
|
||||
vtrcl.32 vr2, vr3, vr4
|
||||
vadd.u8 vr2, vr3, vr4
|
||||
vadd.u16 vr2, vr3, vr4
|
||||
vadd.u32 vr2, vr3, vr4
|
||||
vadd.s8 vr2, vr3, vr4
|
||||
vadd.s16 vr2, vr3, vr4
|
||||
vadd.s32 vr2, vr3, vr4
|
||||
vadd.eu8 vr2, vr3, vr4
|
||||
vadd.eu16 vr2, vr3, vr4
|
||||
vadd.es8 vr2, vr3, vr4
|
||||
vadd.es16 vr2, vr3, vr4
|
||||
vcadd.u8 vr2, vr3, vr4
|
||||
vcadd.u16 vr2, vr3, vr4
|
||||
vcadd.u32 vr2, vr3, vr4
|
||||
vcadd.s8 vr2, vr3, vr4
|
||||
vcadd.s16 vr2, vr3, vr4
|
||||
vcadd.s32 vr2, vr3, vr4
|
||||
vadd.xu16.sl vr2, vr3, vr4
|
||||
vadd.xu32.sl vr2, vr3, vr4
|
||||
vadd.xs16.sl vr2, vr3, vr4
|
||||
vadd.xs32.sl vr2, vr3, vr4
|
||||
vadd.xu16 vr2, vr3, vr4
|
||||
vadd.xu32 vr2, vr3, vr4
|
||||
vadd.xs16 vr2, vr3, vr4
|
||||
vadd.xs32 vr2, vr3, vr4
|
||||
vaddh.u8 vr2, vr3, vr4
|
||||
vaddh.u16 vr2, vr3, vr4
|
||||
vaddh.u32 vr2, vr3, vr4
|
||||
vaddh.s8 vr2, vr3, vr4
|
||||
vaddh.s16 vr2, vr3, vr4
|
||||
vaddh.s32 vr2, vr3, vr4
|
||||
vaddh.u8.r vr2, vr3, vr4
|
||||
vaddh.u16.r vr2, vr3, vr4
|
||||
vaddh.u32.r vr2, vr3, vr4
|
||||
vaddh.s8.r vr2, vr3, vr4
|
||||
vaddh.s16.r vr2, vr3, vr4
|
||||
vaddh.s32.r vr2, vr3, vr4
|
||||
vadd.u8.s vr2, vr3, vr4
|
||||
vadd.u16.s vr2, vr3, vr4
|
||||
vadd.u32.s vr2, vr3, vr4
|
||||
vadd.s8.s vr2, vr3, vr4
|
||||
vadd.s16.s vr2, vr3, vr4
|
||||
vadd.s32.s vr2, vr3, vr4
|
||||
vsub.u8 vr2, vr3, vr4
|
||||
vsub.u16 vr2, vr3, vr4
|
||||
vsub.u32 vr2, vr3, vr4
|
||||
vsub.s8 vr2, vr3, vr4
|
||||
vsub.s16 vr2, vr3, vr4
|
||||
vsub.s32 vr2, vr3, vr4
|
||||
vsub.eu8 vr2, vr3, vr4
|
||||
vsub.eu16 vr2, vr3, vr4
|
||||
vsub.es8 vr2, vr3, vr4
|
||||
vsub.es16 vr2, vr3, vr4
|
||||
vsabs.u8 vr2, vr3, vr4
|
||||
vsabs.u16 vr2, vr3, vr4
|
||||
vsabs.u32 vr2, vr3, vr4
|
||||
vsabs.s8 vr2, vr3, vr4
|
||||
vsabs.s16 vr2, vr3, vr4
|
||||
vsabs.s32 vr2, vr3, vr4
|
||||
vsabs.eu8 vr2, vr3, vr4
|
||||
vsabs.eu16 vr2, vr3, vr4
|
||||
vsabs.es8 vr2, vr3, vr4
|
||||
vsabs.es16 vr2, vr3, vr4
|
||||
vsabsa.u8 vr2, vr3, vr4
|
||||
vsabsa.u16 vr2, vr3, vr4
|
||||
vsabsa.u32 vr2, vr3, vr4
|
||||
vsabsa.s8 vr2, vr3, vr4
|
||||
vsabsa.s16 vr2, vr3, vr4
|
||||
vsabsa.s32 vr2, vr3, vr4
|
||||
vsabsa.eu8 vr2, vr3, vr4
|
||||
vsabsa.eu16 vr2, vr3, vr4
|
||||
vsabsa.es8 vr2, vr3, vr4
|
||||
vsabsa.es16 vr2, vr3, vr4
|
||||
vsub.xu16 vr2, vr3, vr4
|
||||
vsub.xu32 vr2, vr3, vr4
|
||||
vsub.xs16 vr2, vr3, vr4
|
||||
vsub.xs32 vr2, vr3, vr4
|
||||
vsubh.u8 vr2, vr3, vr4
|
||||
vsubh.u16 vr2, vr3, vr4
|
||||
vsubh.u32 vr2, vr3, vr4
|
||||
vsubh.s8 vr2, vr3, vr4
|
||||
vsubh.s16 vr2, vr3, vr4
|
||||
vsubh.s32 vr2, vr3, vr4
|
||||
vsubh.u8.r vr2, vr3, vr4
|
||||
vsubh.u16.r vr2, vr3, vr4
|
||||
vsubh.u32.r vr2, vr3, vr4
|
||||
vsubh.s8.r vr2, vr3, vr4
|
||||
vsubh.s16.r vr2, vr3, vr4
|
||||
vsubh.s32.r vr2, vr3, vr4
|
||||
vsub.u8.s vr2, vr3, vr4
|
||||
vsub.u16.s vr2, vr3, vr4
|
||||
vsub.u32.s vr2, vr3, vr4
|
||||
vsub.s8.s vr2, vr3, vr4
|
||||
vsub.s16.s vr2, vr3, vr4
|
||||
vsub.s32.s vr2, vr3, vr4
|
||||
vmul.u8 vr2, vr3, vr4
|
||||
vmul.u16 vr2, vr3, vr4
|
||||
vmul.u32 vr2, vr3, vr4
|
||||
vmul.s8 vr2, vr3, vr4
|
||||
vmul.s16 vr2, vr3, vr4
|
||||
vmul.s32 vr2, vr3, vr4
|
||||
vmul.eu8 vr2, vr3, vr4
|
||||
vmul.eu16 vr2, vr3, vr4
|
||||
vmul.es8 vr2, vr3, vr4
|
||||
vmul.es16 vr2, vr3, vr4
|
||||
vmula.u8 vr2, vr3, vr4
|
||||
vmula.u16 vr2, vr3, vr4
|
||||
vmula.u32 vr2, vr3, vr4
|
||||
vmula.s8 vr2, vr3, vr4
|
||||
vmula.s16 vr2, vr3, vr4
|
||||
vmula.s32 vr2, vr3, vr4
|
||||
vmula.eu8 vr2, vr3, vr4
|
||||
vmula.eu16 vr2, vr3, vr4
|
||||
vmula.eu32 vr2, vr3, vr4
|
||||
vmula.es8 vr2, vr3, vr4
|
||||
vmula.es16 vr2, vr3, vr4
|
||||
vmula.es32 vr2, vr3, vr4
|
||||
vmuls.u8 vr2, vr3, vr4
|
||||
vmuls.u16 vr2, vr3, vr4
|
||||
vmuls.u32 vr2, vr3, vr4
|
||||
vmuls.s8 vr2, vr3, vr4
|
||||
vmuls.s16 vr2, vr3, vr4
|
||||
vmuls.s32 vr2, vr3, vr4
|
||||
vmuls.eu8 vr2, vr3, vr4
|
||||
vmuls.eu16 vr2, vr3, vr4
|
||||
vmuls.es8 vr2, vr3, vr4
|
||||
vmuls.es16 vr2, vr3, vr4
|
||||
vshr.u8 vr2, vr3, vr4
|
||||
vshr.u16 vr2, vr3, vr4
|
||||
vshr.u32 vr2, vr3, vr4
|
||||
vshr.s8 vr2, vr3, vr4
|
||||
vshr.s16 vr2, vr3, vr4
|
||||
vshr.s32 vr2, vr3, vr4
|
||||
vshr.u8.r vr2, vr3, vr4
|
||||
vshr.u16.r vr2, vr3, vr4
|
||||
vshr.u32.r vr2, vr3, vr4
|
||||
vshr.s8.r vr2, vr3, vr4
|
||||
vshr.s16.r vr2, vr3, vr4
|
||||
vshr.s32.r vr2, vr3, vr4
|
||||
vshl.u8 vr2, vr3, vr4
|
||||
vshl.u16 vr2, vr3, vr4
|
||||
vshl.u32 vr2, vr3, vr4
|
||||
vshl.s8 vr2, vr3, vr4
|
||||
vshl.s16 vr2, vr3, vr4
|
||||
vshl.s32 vr2, vr3, vr4
|
||||
vshl.u8.s vr2, vr3, vr4
|
||||
vshl.u16.s vr2, vr3, vr4
|
||||
vshl.u32.s vr2, vr3, vr4
|
||||
vshl.s8.s vr2, vr3, vr4
|
||||
vshl.s16.s vr2, vr3, vr4
|
||||
vshl.s32.s vr2, vr3, vr4
|
||||
vcmphs.u8 vr2, vr3, vr4
|
||||
vcmphs.u16 vr2, vr3, vr4
|
||||
vcmphs.u32 vr2, vr3, vr4
|
||||
vcmphs.s8 vr2, vr3, vr4
|
||||
vcmphs.s16 vr2, vr3, vr4
|
||||
vcmphs.s32 vr2, vr3, vr4
|
||||
vcmplt.u8 vr2, vr3, vr4
|
||||
vcmplt.u16 vr2, vr3, vr4
|
||||
vcmplt.u32 vr2, vr3, vr4
|
||||
vcmplt.s8 vr2, vr3, vr4
|
||||
vcmplt.s16 vr2, vr3, vr4
|
||||
vcmplt.s32 vr2, vr3, vr4
|
||||
vcmpne.u8 vr2, vr3, vr4
|
||||
vcmpne.u16 vr2, vr3, vr4
|
||||
vcmpne.u32 vr2, vr3, vr4
|
||||
vcmpne.s8 vr2, vr3, vr4
|
||||
vcmpne.s16 vr2, vr3, vr4
|
||||
vcmpne.s32 vr2, vr3, vr4
|
||||
vmax.u8 vr2, vr3, vr4
|
||||
vmax.u16 vr2, vr3, vr4
|
||||
vmax.u32 vr2, vr3, vr4
|
||||
vmax.s8 vr2, vr3, vr4
|
||||
vmax.s16 vr2, vr3, vr4
|
||||
vmax.s32 vr2, vr3, vr4
|
||||
vmin.u8 vr2, vr3, vr4
|
||||
vmin.u16 vr2, vr3, vr4
|
||||
vmin.u32 vr2, vr3, vr4
|
||||
vmin.s8 vr2, vr3, vr4
|
||||
vmin.s16 vr2, vr3, vr4
|
||||
vmin.s32 vr2, vr3, vr4
|
||||
vcmax.u8 vr2, vr3, vr4
|
||||
vcmax.u16 vr2, vr3, vr4
|
||||
vcmax.u32 vr2, vr3, vr4
|
||||
vcmax.s8 vr2, vr3, vr4
|
||||
vcmax.s16 vr2, vr3, vr4
|
||||
vcmax.s32 vr2, vr3, vr4
|
||||
vcmin.u8 vr2, vr3, vr4
|
||||
vcmin.u16 vr2, vr3, vr4
|
||||
vcmin.u32 vr2, vr3, vr4
|
||||
vcmin.s8 vr2, vr3, vr4
|
||||
vcmin.s16 vr2, vr3, vr4
|
||||
vcmin.s32 vr2, vr3, vr4
|
||||
vand.8 vr2, vr3, vr4
|
||||
vand.16 vr2, vr3, vr4
|
||||
vand.32 vr2, vr3, vr4
|
||||
vandn.8 vr2, vr3, vr4
|
||||
vandn.16 vr2, vr3, vr4
|
||||
vandn.32 vr2, vr3, vr4
|
||||
vor.8 vr2, vr3, vr4
|
||||
vor.16 vr2, vr3, vr4
|
||||
vor.32 vr2, vr3, vr4
|
||||
vnor.8 vr2, vr3, vr4
|
||||
vnor.16 vr2, vr3, vr4
|
||||
vnor.32 vr2, vr3, vr4
|
||||
vxor.8 vr2, vr3, vr4
|
||||
vxor.16 vr2, vr3, vr4
|
||||
vxor.32 vr2, vr3, vr4
|
||||
vtst.8 vr2, vr3, vr4
|
||||
vtst.16 vr2, vr3, vr4
|
||||
vtst.32 vr2, vr3, vr4
|
||||
vbpermz.8 vr2, vr3, vr4
|
||||
vbpermz.16 vr2, vr3, vr4
|
||||
vbpermz.32 vr2, vr3, vr4
|
||||
vbperm.8 vr2, vr3, vr4
|
||||
vbperm.16 vr2, vr3, vr4
|
||||
vbperm.32 vr2, vr3, vr4
|
||||
vdch.8 vr2, vr3, vr4
|
||||
vdch.16 vr2, vr3, vr4
|
||||
vdch.32 vr2, vr3, vr4
|
||||
vdcl.8 vr2, vr3, vr4
|
||||
vdcl.16 vr2, vr3, vr4
|
||||
vdcl.32 vr2, vr3, vr4
|
||||
vich.8 vr2, vr3, vr4
|
||||
vich.16 vr2, vr3, vr4
|
||||
vich.32 vr2, vr3, vr4
|
||||
vicl.8 vr2, vr3, vr4
|
||||
vicl.16 vr2, vr3, vr4
|
||||
vicl.32 vr2, vr3, vr4
|
|
@ -0,0 +1,325 @@
|
|||
# name: csky - all
|
||||
#as: -mcpu=ck810 -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*0000\s*bkpt
|
||||
\s*[0-9a-f]*:\s*3316\s*movi\s*r3,\s*22
|
||||
\s*[0-9a-f]*:\s*ea100016\s*movi\s*r16,\s*22
|
||||
\s*[0-9a-f]*:\s*ea03012c\s*movi\s*r3,\s*300
|
||||
\s*[0-9a-f]*:\s*c4104834\s*lsli\s*r20,\s*r16,\s*0
|
||||
\s*[0-9a-f]*:\s*c6824848\s*lsri\s*r8,\s*r2,\s*20
|
||||
\s*[0-9a-f]*:\s*5227\s*asri\s*r1,\s*r2,\s*7
|
||||
\s*[0-9a-f]*:\s*6049\s*addc\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*c4310051\s*addc\s*r17,\s*r17,\s*r1
|
||||
\s*[0-9a-f]*:\s*c4620041\s*addc\s*r1,\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*6049\s*addc\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*c6210041\s*addc\s*r1,\s*r1,\s*r17
|
||||
\s*[0-9a-f]*:\s*c7d20052\s*addc\s*r18,\s*r18,\s*r30
|
||||
\s*[0-9a-f]*:\s*604b\s*subc\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*c4310111\s*subc\s*r17,\s*r17,\s*r1
|
||||
\s*[0-9a-f]*:\s*c4620101\s*subc\s*r1,\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*c4220101\s*subc\s*r1,\s*r2,\s*r1
|
||||
\s*[0-9a-f]*:\s*c6210101\s*subc\s*r1,\s*r1,\s*r17
|
||||
\s*[0-9a-f]*:\s*c7d20112\s*subc\s*r18,\s*r18,\s*r30
|
||||
\s*[0-9a-f]*:\s*650c\s*cmphs\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*650d\s*cmplt\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*650e\s*cmpne\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*64c3\s*mvcv\s*r3
|
||||
\s*[0-9a-f]*:\s*c4000610\s*mvcv\s*r16
|
||||
\s*[0-9a-f]*:\s*6848\s*and\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*6849\s*andn\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*690e\s*tst\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*c4902080\s*tst\s*r16,\s*r4
|
||||
\s*[0-9a-f]*:\s*680f\s*tstnbz\s*r3
|
||||
\s*[0-9a-f]*:\s*c4102100\s*tstnbz\s*r16
|
||||
\s*[0-9a-f]*:\s*c6f22432\s*or\s*r18,\s*r18,\s*r23
|
||||
\s*[0-9a-f]*:\s*6c49\s*xor\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*6c4a\s*nor\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*6c8f\s*mov\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*7808\s*jmp\s*r2
|
||||
\s*[0-9a-f]*:\s*e8d00000\s*jmp\s*r16
|
||||
\s*[0-9a-f]*:\s*7bc9\s*jsr\s*r2
|
||||
\s*[0-9a-f]*:\s*e8f00000\s*jsr\s*r16
|
||||
\s*[0-9a-f]*:\s*783c\s*rts
|
||||
\s*[0-9a-f]*:\s*e8cf0000\s*rts
|
||||
\s*[0-9a-f]*:\s*6c03\s*mov\s*r0, \s*r0
|
||||
\s*[0-9a-f]*:\s*c4364036\s*lsl\s*r22,\s*r22,\s*r1
|
||||
\s*[0-9a-f]*:\s*c4224041\s*lsr\s*r1,\s*r2,\s*r1
|
||||
\s*[0-9a-f]*:\s*704a\s*asr\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*c6014101\s*rotl\s*r1,\s*r1,\s*r16
|
||||
\s*[0-9a-f]*:\s*748c\s*zextb\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*748d\s*zexth\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*748e\s*sextb\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*748f\s*sexth\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*788e\s*revb\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*788f\s*revh\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*c4036090\s*revb\s*r16,\s*r3
|
||||
\s*[0-9a-f]*:\s*c4106102\s*revh\s*r2,\s*r16
|
||||
\s*[0-9a-f]*:\s*c6218421\s*mult\s*r1,\s*r1,\s*r17
|
||||
\s*[0-9a-f]*:\s*7d1c\s*mult\s*r4,\s*r7
|
||||
\s*[0-9a-f]*:\s*c6479027\s*mulsh\s*r7,\s*r7,\s*r18
|
||||
\s*[0-9a-f]*:\s*7ca1\s*mulsh\s*r2,\s*r8
|
||||
\s*[0-9a-f]*:\s*c43e943e\s*mulsw\s*r30,\s*r30,\s*r1
|
||||
\s*[0-9a-f]*:\s*c4419421\s*mulsw\s*r1,\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*8344\s*ld.b\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*8b42\s*ld.h\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*9841\s*ld.w\s*r2,\s*\(sp,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*a344\s*st.b\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*ab42\s*st.h\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*b841\s*st.w\s*r2,\s*\(sp,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*d9030004\s*ld.b\s*r8,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*d8481002\s*ld.h\s*r2,\s*\(r8,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*9841\s*ld.w\s*r2,\s*\(sp,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*dc480004\s*st.b\s*r2,\s*\(r8,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*dc481002\s*st.h\s*r2,\s*\(r8,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*dd0e2001\s*st.w\s*r8,\s*\(sp,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*d8434003\s*ld.bs\s*r2,\s*\(r3,\s*0x3\)
|
||||
\s*[0-9a-f]*:\s*d8433001\s*ld.d\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*dc433001\s*st.d\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*dc437001\s*stex.w\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*d8437001\s*ldex.w\s*r2,\s*\(r3,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*140c\s*addi\s*sp,\s*sp,\s*48
|
||||
\s*[0-9a-f]*:\s*1b01\s*addi\s*r3,\s*sp,\s*4
|
||||
\s*[0-9a-f]*:\s*2113\s*addi\s*r1,\s*20
|
||||
\s*[0-9a-f]*:\s*2113\s*addi\s*r1,\s*20
|
||||
\s*[0-9a-f]*:\s*e6b50013\s*addi\s*r21,\s*r21,\s*20
|
||||
\s*[0-9a-f]*:\s*e42101ff\s*addi\s*r1,\s*r1,\s*512
|
||||
\s*[0-9a-f]*:\s*5c42\s*addi\s*r2,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e5040000\s*addi\s*r8,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e4240008\s*addi\s*r1,\s*r4,\s*9
|
||||
\s*[0-9a-f]*:\s*cc3c0008\s*addi\s*r1,\s*r28,\s*9
|
||||
\s*[0-9a-f]*:\s*e46e0000\s*addi\s*r3,\s*sp,\s*1
|
||||
\s*[0-9a-f]*:\s*e46e03ff\s*addi\s*r3,\s*sp,\s*1024
|
||||
\s*[0-9a-f]*:\s*e5ce0032\s*addi\s*sp,\s*sp,\s*51
|
||||
\s*[0-9a-f]*:\s*e5ce01ff\s*addi\s*sp,\s*sp,\s*512
|
||||
\s*[0-9a-f]*:\s*2113\s*addi\s*r1,\s*20
|
||||
\s*[0-9a-f]*:\s*5c42\s*addi\s*r2,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e4440000\s*addi\s*r2,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e46e03ff\s*addi\s*r3,\s*sp,\s*1024
|
||||
\s*[0-9a-f]*:\s*e5ce0032\s*addi\s*sp,\s*sp,\s*51
|
||||
\s*[0-9a-f]*:\s*142c\s*subi\s*sp,\s*sp,\s*48
|
||||
\s*[0-9a-f]*:\s*2913\s*subi\s*r1,\s*20
|
||||
\s*[0-9a-f]*:\s*2913\s*subi\s*r1,\s*20
|
||||
\s*[0-9a-f]*:\s*e6b51013\s*subi\s*r21,\s*r21,\s*20
|
||||
\s*[0-9a-f]*:\s*e42111ff\s*subi\s*r1,\s*r1,\s*512
|
||||
\s*[0-9a-f]*:\s*5c43\s*subi\s*r2,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e5041000\s*subi\s*r8,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e4241008\s*subi\s*r1,\s*r4,\s*9
|
||||
\s*[0-9a-f]*:\s*e43c1008\s*subi\s*r1,\s*r28,\s*9
|
||||
\s*[0-9a-f]*:\s*e5ce1032\s*subi\s*sp,\s*sp,\s*51
|
||||
\s*[0-9a-f]*:\s*e5ce11ff\s*subi\s*sp,\s*sp,\s*512
|
||||
\s*[0-9a-f]*:\s*2913\s*subi\s*r1,\s*20
|
||||
\s*[0-9a-f]*:\s*5c43\s*subi\s*r2,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e4441000\s*subi\s*r2,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*e5ce1032\s*subi\s*sp,\s*sp,\s*51
|
||||
\s*[0-9a-f]*:\s*60c2\s*subu\s*r3,\s*r0
|
||||
\s*[0-9a-f]*:\s*6202\s*subu\s*r8,\s*r0
|
||||
\s*[0-9a-f]*:\s*c4030089\s*subu\s*r9,\s*r3,\s*r0
|
||||
\s*[0-9a-f]*:\s*60c2\s*subu\s*r3,\s*r0
|
||||
\s*[0-9a-f]*:\s*6242\s*subu\s*r9,\s*r0
|
||||
\s*[0-9a-f]*:\s*c417008d\s*subu\s*r13,\s*r23,\s*r0
|
||||
\s*[0-9a-f]*:\s*60c0\s*addu\s*r3,\s*r0
|
||||
\s*[0-9a-f]*:\s*6200\s*addu\s*r8,\s*r0
|
||||
\s*[0-9a-f]*:\s*c4030029\s*addu\s*r9,\s*r3,\s*r0
|
||||
\s*[0-9a-f]*:\s*60c0\s*addu\s*r3,\s*r0
|
||||
\s*[0-9a-f]*:\s*6240\s*addu\s*r9,\s*r0
|
||||
\s*[0-9a-f]*:\s*c417002d\s*addu\s*r13,\s*r23,\s*r0
|
||||
\s*[0-9a-f]*:\s*3921\s*cmplti\s*r1,\s*2
|
||||
\s*[0-9a-f]*:\s*eb320003\s*cmplti\s*r18,\s*4
|
||||
\s*[0-9a-f]*:\s*670c\s*cmphs\s*r3,\s*r12
|
||||
\s*[0-9a-f]*:\s*c6c30420\s*cmphs\s*r3,\s*r22
|
||||
\s*[0-9a-f]*:\s*6489\s*cmplt\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*c7220440\s*cmplt\s*r2,\s*r25
|
||||
\s*[0-9a-f]*:\s*3d20\s*cmplti\s*r5,\s*1
|
||||
\s*[0-9a-f]*:\s*eb390000\s*cmplti\s*r25,\s*1
|
||||
\s*[0-9a-f]*:\s*3a40\s*cmpnei\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*eb580000\s*cmpnei\s*r24,\s*0
|
||||
\s*[0-9a-f]*:\s*c7e42880\s*btsti\s*r4,\s*31
|
||||
\s*[0-9a-f]*:\s*c7f82880\s*btsti\s*r24,\s*31
|
||||
\s*[0-9a-f]*:\s*6400\s*cmphs\s*r0,\s*r0
|
||||
\s*[0-9a-f]*:\s*6402\s*cmpne\s*r0,\s*r0
|
||||
\s*[0-9a-f]*:\s*6089\s*addc\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*c6100050\s*addc\s*r16,\s*r16,\s*r16
|
||||
\s*[0-9a-f]*:\s*c0a01820\s*sce\s*5
|
||||
\s*[0-9a-f]*:\s*c0002820\s*trap\s*2
|
||||
\s*[0-9a-f]*:\s*c4402c20\s*clrf\s*r2
|
||||
\s*[0-9a-f]*:\s*c7402c40\s*clrt\s*r26
|
||||
\s*[0-9a-f]*:\s*c0004020\s*rte
|
||||
\s*[0-9a-f]*:\s*c0004420\s*rfi
|
||||
\s*[0-9a-f]*:\s*c0004820\s*stop
|
||||
\s*[0-9a-f]*:\s*c0004c20\s*wait
|
||||
\s*[0-9a-f]*:\s*c0005020\s*doze
|
||||
\s*[0-9a-f]*:\s*c0005420\s*we
|
||||
\s*[0-9a-f]*:\s*c0005820\s*se
|
||||
\s*[0-9a-f]*:\s*c4000517\s*mvc\s*r23
|
||||
\s*[0-9a-f]*:\s*c4009823\s*mfhis\s*r3
|
||||
\s*[0-9a-f]*:\s*c4009891\s*mflos\s*r17
|
||||
\s*[0-9a-f]*:\s*c4009a00\s*mvtc
|
||||
\s*[0-9a-f]*:\s*c4009c32\s*mfhi\s*r18
|
||||
\s*[0-9a-f]*:\s*c4139c40\s*mthi\s*r19
|
||||
\s*[0-9a-f]*:\s*c4009c83\s*mflo\s*r3
|
||||
\s*[0-9a-f]*:\s*c4089d00\s*mtlo\s*r8
|
||||
\s*[0-9a-f]*:\s*c0000420\s*sync\s*0
|
||||
\s*[0-9a-f]*:\s*c0200420\s*sync\s*1
|
||||
\s*[0-9a-f]*:\s*c2800420\s*sync\s*20
|
||||
\s*[0-9a-f]*:\s*c0601c20\s*idly\s*4
|
||||
\s*[0-9a-f]*:\s*c0601c20\s*idly\s*4
|
||||
\s*[0-9a-f]*:\s*c0601c20\s*idly\s*4
|
||||
\s*[0-9a-f]*:\s*c0801c20\s*idly\s*5
|
||||
\s*[0-9a-f]*:\s*c3e01c20\s*idly\s*32
|
||||
\s*[0-9a-f]*:\s*fc2044d2\s*cprc\s*\<1,\s*1234\>
|
||||
\s*[0-9a-f]*:\s*fc2084d2\s*cpop\s*\<1,\s*1234\>
|
||||
\s*[0-9a-f]*:\s*fc3414d2\s*cpwgr\s*r20,\s*\<1,\s*1234\>
|
||||
\s*[0-9a-f]*:\s*fc3434d2\s*cpwcr\s*r20,\s*\<1,\s*1234\>
|
||||
\s*[0-9a-f]*:\s*fc3404d2\s*cprgr\s*r20,\s*\<1,\s*1234\>
|
||||
\s*[0-9a-f]*:\s*fc3424d2\s*cprcr\s*r20,\s*\<1,\s*1234\>
|
||||
\s*[0-9a-f]*:\s*320c\s*movi\s*r2,\s*12
|
||||
\s*[0-9a-f]*:\s*ea220010\s*movih\s*r2,\s*16
|
||||
\s*[0-9a-f]*:\s*ea021000\s*movi\s*r2,\s*4096
|
||||
\s*[0-9a-f]*:\s*ea220001\s*movih\s*r2,\s*1
|
||||
\s*[0-9a-f]*:\s*1491\s*pop\s*r4, r15
|
||||
\s*[0-9a-f]*:\s*1498\s*pop\s*r4-r11, r15
|
||||
\s*[0-9a-f]*:\s*ebc00100\s*pop\s*r28
|
||||
\s*[0-9a-f]*:\s*ebc00020\s*pop\s*r16
|
||||
\s*[0-9a-f]*:\s*14d1\s*push\s*r4, r15
|
||||
\s*[0-9a-f]*:\s*14d8\s*push\s*r4-r11, r15
|
||||
\s*[0-9a-f]*:\s*ebe00100\s*push\s*r28
|
||||
\s*[0-9a-f]*:\s*ebe00020\s*push\s*r16
|
||||
\s*[0-9a-f]*:\s*c4625c42\s*ins\s*r3,\s*r2,\s*4,\s*2
|
||||
\s*[0-9a-f]*:\s*c4425483\s*zext\s*r3,\s*r2,\s*4,\s*2
|
||||
\s*[0-9a-f]*:\s*c4425883\s*sext\s*r3,\s*r2,\s*4,\s*2
|
||||
\s*[0-9a-f]*:\s*e4622002\s*andi\s*r3,\s*r2,\s*2
|
||||
\s*[0-9a-f]*:\s*e4623002\s*andni\s*r3,\s*r2,\s* 2
|
||||
\s*[0-9a-f]*:\s*e462400c\s*xori\s*r3,\s*r2,\s* 12
|
||||
\s*[0-9a-f]*:\s*d0621c22\s*ldm\s*r3-r5,\s*\(r2\)
|
||||
\s*[0-9a-f]*:\s*d4621c22\s*stm\s*r3-r5,\s*\(r2\)
|
||||
\s*[0-9a-f]*:\s*c4410083\s*subu\s*r3,\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*d4220023\s*str\.b\s*r3,\s*\(r2,\s*r1\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*d4220423\s*str\.h\s*r3,\s*\(r2,\s*r1\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*d4220823\s*str\.w\s*r3,\s*\(r2,\s*r1\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*d0220043\s*ldr\.b\s*r3,\s*\(r2,\s*r1\s*<<\s*1\)
|
||||
\s*[0-9a-f]*:\s*d0220443\s*ldr\.h\s*r3,\s*\(r2,\s*r1\s*<<\s*1\)
|
||||
\s*[0-9a-f]*:\s*d0220843\s*ldr\.w\s*r3,\s*\(r2,\s*r1\s*<<\s*1\)
|
||||
\s*[0-9a-f]*:\s*d0621022\s*ldr\.bs\s*r2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*d0621042\s*ldr\.bs\s*r2,\s*\(r2,\s*r3\s*<<\s*1\)
|
||||
\s*[0-9a-f]*:\s*d0621082\s*ldr\.bs\s*r2,\s*\(r2,\s*r3\s*<<\s*2\)
|
||||
\s*[0-9a-f]*:\s*d0621102\s*ldr\.bs\s*r2,\s*\(r2,\s*r3\s*<<\s*3\)
|
||||
\s*[0-9a-f]*:\s*d0621422\s*ldr\.hs\s*r2,\s*\(r2,\s*r3\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*d0621442\s*ldr\.hs\s*r2,\s*\(r2,\s*r3\s*<<\s*1\)
|
||||
\s*[0-9a-f]*:\s*d0621482\s*ldr\.hs\s*r2,\s*\(r2,\s*r3\s*<<\s*2\)
|
||||
\s*[0-9a-f]*:\s*d0621502\s*ldr\.hs\s*r2,\s*\(r2,\s*r3\s*<<\s*3\)
|
||||
\s*[0-9a-f]*:\s*c4424d03\s*xsr\s*r3,\s*r2,\s*3
|
||||
\s*[0-9a-f]*:\s*c4424c83\s*asrc\s*r3,\s*r2,\s*3
|
||||
\s*[0-9a-f]*:\s*c4424c43\s*lsrc\s*r3,\s*r2,\s*3
|
||||
\s*[0-9a-f]*:\s*c4424c23\s*lslc\s*r3,\s*r2,\s*3
|
||||
\s*[0-9a-f]*:\s*c4824903\s*rotli\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4014901\s*rotli\s*r1,\s*r1,\s*0
|
||||
\s*[0-9a-f]*:\s*c7e14901\s*rotli\s*r1,\s*r1,\s*31
|
||||
\s*[0-9a-f]*:\s*c7304901\s*rotli\s*r1,\s*r16,\s*25
|
||||
\s*[0-9a-f]*:\s*c7e14901\s*rotli\s*r1,\s*r1,\s*31
|
||||
\s*[0-9a-f]*:\s*c4014901\s*rotli\s*r1,\s*r1,\s*0
|
||||
\s*[0-9a-f]*:\s*c4f04901\s*rotli\s*r1,\s*r16,\s*7
|
||||
\s*[0-9a-f]*:\s*c4821083\s*decne\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4821043\s*declt\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4821023\s*decgt\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4620d04\s*dect\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4620c84\s*decf\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4620c24\s*incf\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*c4620c44\s*inct\s*r3,\s*r2,\s*4
|
||||
\s*[0-9a-f]*:\s*d0831c23\s*ldm\s*r4-r7,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d4831c23\s*stm\s*r4-r7,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*c1007020\s*psrclr\s*ee
|
||||
\s*[0-9a-f]*:\s*c0607020\s*psrclr\s*fe,\s*af
|
||||
\s*[0-9a-f]*:\s*c1607420\s*psrset\s*ee,\s*fe,\s*af
|
||||
\s*[0-9a-f]*:\s*c1e07420\s*psrset\s*ee,\s*ie,\s*fe,\s*af
|
||||
\s*[0-9a-f]*:\s*c4140211\s*abs\s*r17,\s*r20
|
||||
\s*[0-9a-f]*:\s*c4155043\s*bgenr\s*r3,\s*r21
|
||||
\s*[0-9a-f]*:\s*c4016217\s*brev\s*r23,\s*r1
|
||||
\s*[0-9a-f]*:\s*c4037025\s*xtrb0\s*r5,\s*r3
|
||||
\s*[0-9a-f]*:\s*c4097043\s*xtrb1\s*r3,\s*r9
|
||||
\s*[0-9a-f]*:\s*c4147090\s*xtrb2\s*r16,\s*r20
|
||||
\s*[0-9a-f]*:\s*c418710b\s*xtrb3\s*r11,\s*r24
|
||||
\s*[0-9a-f]*:\s*c4157c22\s*ff0\s*r2,\s*r21
|
||||
\s*[0-9a-f]*:\s*c4017c52\s*ff1\s*r18,\s*r1
|
||||
\s*[0-9a-f]*:\s*c0026423\s*mtcr\s*r2,\s*cr<3,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0026424\s*mtcr\s*r2,\s*cr<4,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0026421\s*mtcr\s*r2,\s*cr<1,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0006022\s*mfcr\s*r2,\s*cr<0,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0006022\s*mfcr\s*r2,\s*cr<0,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0006022\s*mfcr\s*r2,\s*cr<0,\s*0>
|
||||
\s*[0-9a-f]*:\s*6c8a\s*nor\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*c6102490\s*nor\s*r16,\s*r16,\s*r16
|
||||
\s*[0-9a-f]*:\s*c6102482\s*nor\s*r2,\s*r16,\s*r16
|
||||
\s*[0-9a-f]*:\s*6c8a\s*nor\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*c4830822\s*ixh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*c4830842\s*ixw\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*c4830882\s*ixd\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*c4838042\s*divs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*c4838022\s*divu\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*c4220c20\s*incf\s*r1,\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*c6e20c40\s*inct\s*r23,\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ea0800ff\s*movi\s*r8,\s*255
|
||||
\s*[0-9a-f]*:\s*c7e05021\s*bmaski\s*r1,\s*32
|
||||
\s*[0-9a-f]*:\s*310f\s*movi\s*r1,\s*15
|
||||
\s*[0-9a-f]*:\s*c6005021\s*bmaski\s*r1,\s*17
|
||||
\s*[0-9a-f]*:\s*ea15ffff\s*movi\s*r21,\s*65535
|
||||
\s*[0-9a-f]*:\s*ea0dffff\s*movi\s*r13,\s*65535
|
||||
\s*[0-9a-f]*:\s*c7c05021\s*bmaski\s*r1,\s*31
|
||||
\s*[0-9a-f]*:\s*c7e05021\s*bmaski\s*r1,\s*32
|
||||
\s*[0-9a-f]*:\s*d8026002\s*pldr\s*\(r2,\s*0x8\)
|
||||
\s*[0-9a-f]*:\s*dc026002\s*pldw\s*\(r2,\s*0x8\)
|
||||
\s*[0-9a-f]*:\s*6c46\s*nor\s*r1,\s*r1
|
||||
\s*[0-9a-f]*:\s*2100\s*addi\s*r1,\s*1
|
||||
\s*[0-9a-f]*:\s*6c8a\s*nor\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*2217\s*addi\s*r2,\s*24
|
||||
\s*[0-9a-f]*:\s*c4034c83\s*asrc\s*r3,\s*r3,\s*1
|
||||
\s*[0-9a-f]*:\s*c4840c21\s*incf\s*r4,\s*r4,\s*1
|
||||
\s*[0-9a-f]*:\s*c5ad0c41\s*inct\s*r13,\s*r13,\s*1
|
||||
\s*[0-9a-f]*:\s*c6100c81\s*decf\s*r16,\s*r16,\s*1
|
||||
\s*[0-9a-f]*:\s*c4311031\s*decgt\s*r17,\s*r17,\s*1
|
||||
\s*[0-9a-f]*:\s*c4331053\s*declt\s*r19,\s*r19,\s*1
|
||||
\s*[0-9a-f]*:\s*c4341094\s*decne\s*r20,\s*r20,\s*1
|
||||
\s*[0-9a-f]*:\s*c7ff0d01\s*dect\s*r31,\s*r31,\s*1
|
||||
\s*[0-9a-f]*:\s*c40b4c2b\s*lslc\s*r11,\s*r11,\s*1
|
||||
\s*[0-9a-f]*:\s*c4194c59\s*lsrc\s*r25,\s*r25,\s*1
|
||||
\s*[0-9a-f]*:\s*c40c4d0c\s*xsr\s*r12,\s*r12,\s*1
|
||||
\s*[0-9a-f]*:\s*c4778057\s*divs\s*r23,\s*r23,\s*r3
|
||||
\s*[0-9a-f]*:\s*c7c18021\s*divu\s*r1,\s*r1,\s*r30
|
||||
\s*[0-9a-f]*:\s*c40d020d\s*abs\s*r13,\s*r13
|
||||
\s*[0-9a-f]*:\s*c40c620c\s*brev\s*r12,\s*r12
|
||||
\s*[0-9a-f]*:\s*c4087c48\s*ff1\s*r8,\s*r8
|
||||
\s*[0-9a-f]*:\s*6c46\s*nor\s*r1,\s*r1
|
||||
\s*[0-9a-f]*:\s*c6312491\s*nor\s*r17,\s*r17,\s*r17
|
||||
\s*[0-9a-f]*:\s*7488\s*zextb\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*c41355f3\s*zexth\s*r19,\s*r19
|
||||
\s*[0-9a-f]*:\s*c41d58fd\s*sextb\s*r29,\s*r29
|
||||
\s*[0-9a-f]*:\s*76ef\s*sexth\s*r11,\s*r11
|
||||
\s*[0-9a-f]*:\s*c6210821\s*ixh\s*r1,\s*r1,\s*r17
|
||||
\s*[0-9a-f]*:\s*c4370857\s*ixw\s*r23,\s*r23,\s*r1
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*c4630083\s*subu\s*r3,\s*r3,\s*r3
|
||||
\s*[0-9a-f]*:\s*c63f0091\s*subu\s*r17,\s*r31,\s*r17
|
||||
\s*[0-9a-f]*:\s*492c\s*lsri\s*r1,\s*r1,\s*12
|
||||
\s*[0-9a-f]*:\s*c4554835\s*lsli\s*r21,\s*r21,\s*2
|
||||
\s*[0-9a-f]*:\s*c4419421\s*mulsw\s*r1,\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*e463207b\s*andi\s*r3,\s*r3,\s*123
|
||||
\s*[0-9a-f]*:\s*c5684908\s*rotli\s*r8,\s*r8,\s*11
|
||||
\s*[0-9a-f]*:\s*e860fdf8\s*bt\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e840fdf6\s*bf\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e860fdf4\s*bt\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e840fdf2\s*bf\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e800fdf0\s*br\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e800fdee\s*br\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e3fffdec\s*bsr\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*cc500000\s*srs\.b\s*r2,\s*\[0x0\].*
|
||||
\s*[0-9a-f]*:\s*cc400000\s*lrs\.b\s*r2,\s*\[0x0\].*
|
||||
\s*[0-9a-f]*:\s*cc540000\s*srs\.h\s*r2,\s*\[0x0\].*
|
||||
\s*[0-9a-f]*:\s*cc440000\s*lrs\.h\s*r2,\s*\[0x0\].*
|
||||
\s*[0-9a-f]*:\s*cc580000\s*srs\.w\s*r2,\s*\[0x0\].*
|
||||
\s*[0-9a-f]*:\s*cc480000\s*lrs\.w\s*r2,\s*\[0x0\].*
|
||||
\s*[0-9a-f]*:\s*ec430002\s*ori\s*r2,\s*r3,\s*2
|
||||
\s*[0-9a-f]*:\s*ec43000a\s*ori\s*r2,\s*r3,\s*10
|
|
@ -0,0 +1,316 @@
|
|||
.text
|
||||
all:
|
||||
bkpt
|
||||
movi r3, 22
|
||||
movi r16, 22
|
||||
movi r3, 300
|
||||
lsli r20, r16, 0
|
||||
lsri r8, r2, 20
|
||||
asri r1, r2, 7
|
||||
addc r1, r2
|
||||
addc r17, r1
|
||||
addc r1, r2, r3
|
||||
addc r1, r2, r1
|
||||
addc r1, r17
|
||||
addc r18, r18, r30
|
||||
subc r1, r2
|
||||
subc r17, r1
|
||||
subc r1, r2, r3
|
||||
subc r1, r2, r1
|
||||
subc r1, r17
|
||||
subc r18, r18, r30
|
||||
cmphs r3, r4
|
||||
cmplt r3, r4
|
||||
cmpne r3, r4
|
||||
mvcv r3
|
||||
mvcv r16
|
||||
and r1, r2
|
||||
andn r1, r2
|
||||
tst r3, r4
|
||||
tst r16, r4
|
||||
tstnbz r3
|
||||
tstnbz r16
|
||||
or r18, r23
|
||||
xor r1, r1, r2
|
||||
nor r1, r2, r1
|
||||
mov r2, r3
|
||||
jmp r2
|
||||
jmp r16
|
||||
jsr r2
|
||||
jsr r16
|
||||
rts
|
||||
rts32
|
||||
nop
|
||||
lsl r22, r1
|
||||
lsr r1, r2, r1
|
||||
asr r1, r1, r2
|
||||
rotl r1, r1, r16
|
||||
zextb r2, r3
|
||||
zexth r2, r3
|
||||
sextb r2, r3
|
||||
sexth r2, r3
|
||||
revb r2, r3
|
||||
revh r2, r3
|
||||
revb r16, r3
|
||||
revh r2, r16
|
||||
mult r1, r1, r17
|
||||
mul r4, r7
|
||||
mulsh r7, r18
|
||||
muls.h r2, r8
|
||||
mulsw r30, r30, r1
|
||||
mulsw r1, r2
|
||||
ld.b r2, (r3, 4)
|
||||
ld.h r2, (r3, 4)
|
||||
ld.w r2, (r14, 4)
|
||||
st.b r2, (r3, 4)
|
||||
st.h r2, (r3, 4)
|
||||
st.w r2, (r14, 4)
|
||||
ld.b r8, (r3, 4)
|
||||
ld.h r2, (r8, 4)
|
||||
ld.w r2, (r14, 4)
|
||||
st.b r2, (r8, 4)
|
||||
st.h r2, (r8, 4)
|
||||
st.w r8, (r14, 4)
|
||||
ld.bs r2, (r3, 3)
|
||||
ld.d r2, (r3, 4)
|
||||
st.d r2, (r3, 4)
|
||||
stex.w r2, (r3, 4)
|
||||
ldex.w r2, (r3, 4)
|
||||
addi sp, sp, 0x30
|
||||
addi r3, sp, 0x4
|
||||
addi r1, 20
|
||||
addi r1, r1, 20
|
||||
addi r21, 20
|
||||
addi r1, 0x200
|
||||
addi r2, r4, 1
|
||||
addi r8, r4, 1
|
||||
addi r1, r4, 9
|
||||
addi r1, r28, 9
|
||||
addi r3, sp, 0x1
|
||||
addi r3, sp, 0x400
|
||||
addi sp, sp, 0x33
|
||||
addi sp, sp, 0x200
|
||||
addi16 r1, 20
|
||||
addi16 r2, r4, 1
|
||||
addi32 r2, r4, 1
|
||||
addi32 r3, sp, 0x400
|
||||
addi32 sp, sp, 0x33
|
||||
subi sp, sp, 0x30
|
||||
subi r1, 20
|
||||
subi r1, r1, 20
|
||||
subi r21, 20
|
||||
subi r1, 0x200
|
||||
subi r2, r4, 1
|
||||
subi r8, r4, 1
|
||||
subi r1, r4, 9
|
||||
subi r1, r28, 9
|
||||
subi sp, sp, 0x33
|
||||
subi sp, sp, 0x200
|
||||
subi16 r1, 20
|
||||
subi16 r2, r4, 1
|
||||
subi32 r2, r4, 1
|
||||
subi32 sp, sp, 0x33
|
||||
sub r3, r0
|
||||
sub r8, r0
|
||||
sub r9, r3, r0
|
||||
sub r3, r3, r0
|
||||
sub r9, r9, r0
|
||||
sub r13, r23, r0
|
||||
add r3, r0
|
||||
add r8, r0
|
||||
add r9, r3, r0
|
||||
add r3, r3, r0
|
||||
add r9, r9, r0
|
||||
add r13, r23, r0
|
||||
cmplei r1, 1
|
||||
cmplei r18, 3
|
||||
cmpls r12, r3
|
||||
cmpls r22, r3
|
||||
cmpgt r2, r2
|
||||
cmpgt r25, r2
|
||||
tstle r5
|
||||
tstle r25
|
||||
tstne r2
|
||||
tstne r24
|
||||
tstlt r4
|
||||
tstlt r24
|
||||
setc
|
||||
clrc
|
||||
rotlc r2, 1
|
||||
rotlc r16, 1
|
||||
sce 5
|
||||
trap 2
|
||||
clrf r2
|
||||
clrt r26
|
||||
rte
|
||||
rfi
|
||||
stop
|
||||
wait
|
||||
doze
|
||||
we
|
||||
se
|
||||
mvc r23
|
||||
mfhis r3
|
||||
mflos r17
|
||||
mvtc
|
||||
mfhi r18
|
||||
mthi r19
|
||||
mflo r3
|
||||
mtlo r8
|
||||
sync 0
|
||||
sync 1
|
||||
sync 20
|
||||
idly 0
|
||||
idly 2
|
||||
idly 4
|
||||
idly 5
|
||||
idly 32
|
||||
cprc <1, 1234>
|
||||
cpop <1, 1234>
|
||||
cpwgr r20, <1, 1234>
|
||||
cpwcr r20, <1, 1234>
|
||||
cprgr r20, <1, 1234>
|
||||
cprcr r20, <1, 1234>
|
||||
movi r2, 12
|
||||
movih r2, 16
|
||||
bgeni r2, 12
|
||||
bgeni r2, 16
|
||||
pop r4, r15
|
||||
pop r15, r4-r11
|
||||
pop r28
|
||||
pop r16
|
||||
push r4, r15
|
||||
push r15, r4-r11
|
||||
push r28
|
||||
push r16
|
||||
ins r3, r2, 4, 2
|
||||
zext r3, r2, 4, 2
|
||||
sext r3, r2, 4, 2
|
||||
andi r3, r2, 2
|
||||
andni r3, r2, 2
|
||||
xori r3, r2, 12
|
||||
ldm r3-r5, (r2)
|
||||
stm r3-r5, (r2)
|
||||
rsub r3, r2, r1
|
||||
str.b r3, (r2, r1 << 0)
|
||||
str.h r3, (r2, r1 << 0)
|
||||
str.w r3, (r2, r1 << 0)
|
||||
ldr.b r3, (r2, r1 << 1)
|
||||
ldr.h r3, (r2, r1 << 1)
|
||||
ldr.w r3, (r2, r1 << 1)
|
||||
ldr.bs r2, (r2, r3 << 0)
|
||||
ldr.bs r2, (r2, r3 << 1)
|
||||
ldr.bs r2, (r2, r3 << 2)
|
||||
ldr.bs r2, (r2, r3 << 3)
|
||||
ldr.hs r2, (r2, r3 << 0)
|
||||
ldr.hs r2, (r2, r3 << 1)
|
||||
ldr.hs r2, (r2, r3 << 2)
|
||||
ldr.hs r2, (r2, r3 << 3)
|
||||
xsr r3, r2, 3
|
||||
asrc r3, r2, 3
|
||||
lsrc r3, r2, 3
|
||||
lslc r3, r2, 3
|
||||
rotli r3, r2, 4
|
||||
rotri r1, 32
|
||||
rotri r1, 1
|
||||
rotri r1, r16, 7
|
||||
rotli r1, 31
|
||||
rotli r1, 0
|
||||
rotli r1, r16, 7
|
||||
decne r3, r2, 4
|
||||
declt r3, r2, 4
|
||||
decgt r3, r2, 4
|
||||
dect r3, r2, 4
|
||||
decf r3, r2, 4
|
||||
incf r3, r2, 4
|
||||
inct r3, r2, 4
|
||||
ldq r4-r7, (r3)
|
||||
stq r4-r7, (r3)
|
||||
psrclr ee
|
||||
psrclr af, fe
|
||||
psrset ee, fe, af
|
||||
psrset ie, ee, fe, af
|
||||
abs r17, r20
|
||||
bgenr r3, r21
|
||||
brev r23, r1
|
||||
xtrb0 r5, r3
|
||||
xtrb1 r3, r9
|
||||
xtrb2 r16, r20
|
||||
xtrb3 r11, r24
|
||||
ff0 r2, r21
|
||||
ff1 r18, r1
|
||||
mtcr r2, cr<3, 0>
|
||||
mtcr r2, cr4
|
||||
mtcr r2, vbr
|
||||
mfcr r2, cr<0, 0>
|
||||
mfcr r2, cr0
|
||||
mfcr r2, psr
|
||||
not r2
|
||||
not r16
|
||||
not r2, r16
|
||||
not r2, r2
|
||||
ixh r2, r3, r4
|
||||
ixw r2, r3, r4
|
||||
ixd r2, r3, r4
|
||||
divs r2, r3, r4
|
||||
divu r2, r3, r4
|
||||
movf r1, r2
|
||||
movt r23, r2
|
||||
bmaski r8, 8
|
||||
bmaski r1, 0
|
||||
bmaski r1, 4
|
||||
bmaski r1, 17
|
||||
bmaski r21, 16
|
||||
bmaski r13, 16
|
||||
bmaski r1, 31
|
||||
bmaski r1, 32
|
||||
pldr (r2, 0x8)
|
||||
pldw (r2, 0x8)
|
||||
neg r1
|
||||
rsubi r2, 23
|
||||
asrc r3
|
||||
incf r4
|
||||
inct r13
|
||||
decf r16
|
||||
decgt r17
|
||||
declt r19
|
||||
decne r20
|
||||
dect r31
|
||||
lslc r11
|
||||
lsrc r25
|
||||
xsr r12
|
||||
divs r23, r3
|
||||
divu r1, r30
|
||||
abs r13
|
||||
brev r12
|
||||
ff1 r8
|
||||
not r1
|
||||
not r17
|
||||
zextb r2
|
||||
zexth r19
|
||||
sextb r29
|
||||
sexth r11
|
||||
ixh r1, r17
|
||||
ixw r23, r1
|
||||
rsub r3, r3
|
||||
rsub r17, r31
|
||||
lsri r1, 12
|
||||
lsli r21, 2
|
||||
mulsw r1, r2
|
||||
andi r3, 123
|
||||
rori r8, 21
|
||||
bt all
|
||||
bf all
|
||||
jbt all
|
||||
jbf all
|
||||
br all
|
||||
jbr all
|
||||
bsr all
|
||||
srs.b r2, [all]
|
||||
lrs.b r2, [all]
|
||||
srs.h r2, [all]
|
||||
lrs.h r2, [all]
|
||||
srs.w r2, [all]
|
||||
lrs.w r2, [all]
|
||||
ori r2, r3, 2
|
||||
ori r2, r3, 10
|
|
@ -0,0 +1,18 @@
|
|||
# name: csky - all
|
||||
#as: -mcpu=ck810e -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*c4818820\s*mulu\s*r1,\s*r4
|
||||
\s*[0-9a-f]*:\s*c6ec8840\s*mulua\s*r12,\s*r23
|
||||
\s*[0-9a-f]*:\s*c46f8880\s*mulus\s*r15,\s*r3
|
||||
\s*[0-9a-f]*:\s*c4418c20\s*muls\s*r1,\s*r2
|
||||
\s*[0-9a-f]*:\s*c4428c40\s*mulsa\s*r2,\s*r2
|
||||
\s*[0-9a-f]*:\s*c4638c80\s*mulss\s*r3,\s*r3
|
||||
\s*[0-9a-f]*:\s*c6689040\s*mulsha\s*r8,\s*r19
|
||||
\s*[0-9a-f]*:\s*c4319080\s*mulshs\s*r17,\s*r1
|
||||
\s*[0-9a-f]*:\s*c6ec9440\s*mulswa\s*r12,\s*r23
|
||||
\s*[0-9a-f]*:\s*c4a39480\s*mulsws\s*r3,\s*r5
|
|
@ -0,0 +1,11 @@
|
|||
.text
|
||||
mulu r1, r4
|
||||
mulua r12, r23
|
||||
mulus r15, r3
|
||||
muls r1, r2
|
||||
mulsa r2, r2
|
||||
mulss r3, r3
|
||||
mulsha r8, r19
|
||||
mulshs r17, r1
|
||||
mulswa r12, r23
|
||||
mulsws r3, r5
|
|
@ -0,0 +1,10 @@
|
|||
# name: cskyv2 - elrw
|
||||
#as: -mcpu=ck801 -melrw
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*024e\s*lrw\s*r2,\s*0x1234.*
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*c0004020\s*rte
|
||||
\s*[0-9a-f]*:\s*00001234\s*\.long\s*0x00001234
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
lrw r2, 0x1234
|
||||
.rept 351
|
||||
nop
|
||||
.endr
|
||||
rte
|
|
@ -0,0 +1,59 @@
|
|||
# name: csky - all
|
||||
#as: -mcpu=ck810f -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*f4000100\s*fcmpzhss\s*fr0
|
||||
\s*[0-9a-f]*:\s*f4010120\s*fcmpzlss\s*fr1
|
||||
\s*[0-9a-f]*:\s*f4050140\s*fcmpznes\s*fr5
|
||||
\s*[0-9a-f]*:\s*f4080160\s*fcmpzuos\s*fr8
|
||||
\s*[0-9a-f]*:\s*f40a0900\s*fcmpzhsd\s*fr10
|
||||
\s*[0-9a-f]*:\s*f40d0920\s*fcmpzlsd\s*fr13
|
||||
\s*[0-9a-f]*:\s*f40e0940\s*fcmpzned\s*fr14
|
||||
\s*[0-9a-f]*:\s*f40f0960\s*fcmpzuod\s*fr15
|
||||
\s*[0-9a-f]*:\s*f409008c\s*fmovs\s*fr12,\s*fr9
|
||||
\s*[0-9a-f]*:\s*f40000c1\s*fabss\s*fr1,\s*fr0
|
||||
\s*[0-9a-f]*:\s*f40100e2\s*fnegs\s*fr2,\s*fr1
|
||||
\s*[0-9a-f]*:\s*f4470180\s*fcmphss\s*fr7,\s*fr2
|
||||
\s*[0-9a-f]*:\s*f46601a0\s*fcmplts\s*fr6,\s*fr3
|
||||
\s*[0-9a-f]*:\s*f48201c0\s*fcmpnes\s*fr2,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4ac01e0\s*fcmpuos\s*fr12,\s*fr5
|
||||
\s*[0-9a-f]*:\s*f406032b\s*frecips\s*fr11,\s*fr6
|
||||
\s*[0-9a-f]*:\s*f407034a\s*fsqrts\s*fr10,\s*fr7
|
||||
\s*[0-9a-f]*:\s*f4080889\s*fmovd\s*fr9,\s*fr8
|
||||
\s*[0-9a-f]*:\s*f40908cd\s*fabsd\s*fr13,\s*fr9
|
||||
\s*[0-9a-f]*:\s*f40a08ee\s*fnegd\s*fr14,\s*fr10
|
||||
\s*[0-9a-f]*:\s*f56f0980\s*fcmphsd\s*fr15,\s*fr11
|
||||
\s*[0-9a-f]*:\s*f58009a0\s*fcmpltd\s*fr0,\s*fr12
|
||||
\s*[0-9a-f]*:\s*f5a309c0\s*fcmpned\s*fr3,\s*fr13
|
||||
\s*[0-9a-f]*:\s*f5c409e0\s*fcmpuod\s*fr4,\s*fr14
|
||||
\s*[0-9a-f]*:\s*f40f0b25\s*frecipd\s*fr5,\s*fr15
|
||||
\s*[0-9a-f]*:\s*f4080b48\s*fsqrtd\s*fr8,\s*fr8
|
||||
\s*[0-9a-f]*:\s*f4031081\s*fmovm\s*fr1,\s*fr3
|
||||
\s*[0-9a-f]*:\s*f40d10c3\s*fabsm\s*fr3,\s*fr13
|
||||
\s*[0-9a-f]*:\s*f40210ef\s*fnegm\s*fr15,\s*fr2
|
||||
\s*[0-9a-f]*:\s*f402180f\s*fstosi.rn\s*fr15,\s*fr2
|
||||
\s*[0-9a-f]*:\s*f402182e\s*fstosi.rz\s*fr14,\s*fr2
|
||||
\s*[0-9a-f]*:\s*f40f184d\s*fstosi.rpi\s*fr13,\s*fr15
|
||||
\s*[0-9a-f]*:\s*f40e186c\s*fstosi.rni\s*fr12,\s*fr14
|
||||
\s*[0-9a-f]*:\s*f40d188b\s*fstoui.rn\s*fr11,\s*fr13
|
||||
\s*[0-9a-f]*:\s*f40c18aa\s*fstoui.rz\s*fr10,\s*fr12
|
||||
\s*[0-9a-f]*:\s*f40b18c9\s*fstoui.rpi\s*fr9,\s*fr11
|
||||
\s*[0-9a-f]*:\s*f40a18e8\s*fstoui.rni\s*fr8,\s*fr10
|
||||
\s*[0-9a-f]*:\s*f4091907\s*fdtosi.rn\s*fr7,\s*fr9
|
||||
\s*[0-9a-f]*:\s*f4081926\s*fdtosi.rz\s*fr6,\s*fr8
|
||||
\s*[0-9a-f]*:\s*f4071945\s*fdtosi.rpi\s*fr5,\s*fr7
|
||||
\s*[0-9a-f]*:\s*f4061964\s*fdtosi.rni\s*fr4,\s*fr6
|
||||
\s*[0-9a-f]*:\s*f4051983\s*fdtoui.rn\s*fr3,\s*fr5
|
||||
\s*[0-9a-f]*:\s*f40419a2\s*fdtoui.rz\s*fr2,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f40319c1\s*fdtoui.rpi\s*fr1,\s*fr3
|
||||
\s*[0-9a-f]*:\s*f40219e0\s*fdtoui.rni\s*fr0,\s*fr2
|
||||
\s*[0-9a-f]*:\s*f4011a0e\s*fsitos\s*fr14,\s*fr1
|
||||
\s*[0-9a-f]*:\s*f4001a2c\s*fuitos\s*fr12,\s*fr0
|
||||
\s*[0-9a-f]*:\s*f4021a8d\s*fsitod\s*fr13,\s*fr2
|
||||
\s*[0-9a-f]*:\s*f4041aab\s*fuitod\s*fr11,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4081ac2\s*fdtos\s*fr2,\s*fr8
|
||||
\s*[0-9a-f]*:\s*f40b1ae5\s*fstod\s*fr5,\s*fr11
|
|
@ -0,0 +1,52 @@
|
|||
.text
|
||||
fcmpzhss vr0
|
||||
fcmpzlss vr1
|
||||
fcmpznes vr5
|
||||
fcmpzuos vr8
|
||||
fcmpzhsd vr10
|
||||
fcmpzlsd vr13
|
||||
fcmpzned vr14
|
||||
fcmpzuod vr15
|
||||
fmovs vr12, fr9
|
||||
fabss vr1, fr0
|
||||
fnegs vr2, fr1
|
||||
fcmphss vr7, fr2
|
||||
fcmplts vr6, fr3
|
||||
fcmpnes vr2, fr4
|
||||
fcmpuos vr12, fr5
|
||||
frecips vr11, fr6
|
||||
fsqrts vr10, fr7
|
||||
fmovd vr9, fr8
|
||||
fabsd vr13, fr9
|
||||
fnegd vr14, fr10
|
||||
fcmphsd vr15, fr11
|
||||
fcmpltd vr0, fr12
|
||||
fcmpned vr3, fr13
|
||||
fcmpuod vr4, fr14
|
||||
frecipd vr5, fr15
|
||||
fsqrtd vr8, fr8
|
||||
fmovm vr1, fr3
|
||||
fabsm vr3, fr13
|
||||
fnegm vr15, fr2
|
||||
fstosi.rn vr15, vr2
|
||||
fstosi.rz vr14, vr2
|
||||
fstosi.rpi vr13, vr15
|
||||
fstosi.rni vr12, vr14
|
||||
fstoui.rn vr11, fr13
|
||||
fstoui.rz vr10, fr12
|
||||
fstoui.rpi vr9, fr11
|
||||
fstoui.rni fr8, vr10
|
||||
fdtosi.rn fr7, vr9
|
||||
fdtosi.rz fr6, vr8
|
||||
fdtosi.rpi fr5, vr7
|
||||
fdtosi.rni fr4, vr6
|
||||
fdtoui.rn fr3, fr5
|
||||
fdtoui.rz fr2, fr4
|
||||
fdtoui.rpi fr1, fr3
|
||||
fdtoui.rni fr0, fr2
|
||||
fsitos vr14, vr1
|
||||
fuitos fr12, vr0
|
||||
fsitod fr13, fr2
|
||||
fuitod fr11, fr4
|
||||
fdtos vr2, vr8
|
||||
fstod fr5, vr11
|
|
@ -0,0 +1,19 @@
|
|||
# name: cskyv2 - lrw
|
||||
#as: -mcpu=ck810 -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
#...
|
||||
00000000 <LRW>:
|
||||
\s*[0-9a-f]*:\s*ea020100\s*movi\s*r2,\s*256
|
||||
\s*[0-9a-f]*:\s*ea021000\s*movi\s*r2,\s*4096
|
||||
\s*[0-9a-f]*:\s*ea220001\s*movih\s*r2,\s*1
|
||||
\s*[0-9a-f]*:\s*1042\s*lrw\s*r2,\s*0x12341234.*
|
||||
\s*[0-9a-f]*:\s*1043\s*lrw\s*r2,\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*1041\s*lrw\s*r2,\s*0x12341234.*
|
||||
#...
|
||||
00000012 <L1>:
|
||||
\s*[0-9a-f]*:\s*6c8f\s*mov\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*12341234\s*\.long\s*0x12341234
|
||||
\s*[0-9a-f]*:\s*00000000\s*\.long\s*0x00000000
|
||||
#...
|
|
@ -0,0 +1,11 @@
|
|||
.text
|
||||
LRW:
|
||||
lrw r2, 0x100
|
||||
lrw16 r2, 0x1000
|
||||
lrw32 r2, 0x10000
|
||||
lrw r2, 0x12341234
|
||||
lrw r2, L1
|
||||
lrw r2, [L1]
|
||||
|
||||
L1:
|
||||
mov r2, r3
|
|
@ -0,0 +1,23 @@
|
|||
# name: cskyv2 - nolrw
|
||||
#as: -mcpu=ck810 -mnolrw -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
#...
|
||||
00000000 <LRW>:
|
||||
\s*[0-9a-f]*:\s*ea220000\s*movih\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ec420100\s*ori\s*r2,\s*r2,\s*256
|
||||
\s*[0-9a-f]*:\s*ea220000\s*movih\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ec421000\s*ori\s*r2,\s*r2,\s*4096
|
||||
\s*[0-9a-f]*:\s*ea220001\s*movih\s*r2,\s*1
|
||||
\s*[0-9a-f]*:\s*ec420000\s*ori\s*r2,\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ea221234\s*movih\s*r2,\s*4660
|
||||
\s*[0-9a-f]*:\s*ec421234\s*ori\s*r2,\s*r2,\s*4660
|
||||
\s*[0-9a-f]*:\s*ea220000\s*movih\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ec420000\s*ori\s*r2,\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ea220000\s*movih\s*r2,\s*0
|
||||
\s*[0-9a-f]*:\s*ec420000\s*ori\s*r2,\s*r2,\s*0
|
||||
#...
|
||||
00000030 <L1>:
|
||||
\s*[0-9a-f]*:\s*6c8f\s*mov\s*r2,\s*r3
|
||||
#...
|
|
@ -0,0 +1,11 @@
|
|||
.text
|
||||
LRW:
|
||||
lrw r2, 0x100
|
||||
lrw16 r2, 0x1000
|
||||
lrw32 r2, 0x10000
|
||||
lrw r2, 0x12341234
|
||||
lrw r2, L1
|
||||
lrw r2, [L1]
|
||||
|
||||
L1:
|
||||
mov r2, r3
|
|
@ -0,0 +1,12 @@
|
|||
# name: csky - nolrw
|
||||
#as: -mcpu=ck810 -mnolrw -W
|
||||
#readelf: -r --wide
|
||||
|
||||
|
||||
Relocation section '.rela.text\' at offset .* contains 4 entries:
|
||||
#...
|
||||
00000020.*R_CKCORE_ADDR_HI16\s*00000030\s*L1\s*\+\s*0
|
||||
00000024.*R_CKCORE_ADDR_LO16\s*00000030\s*L1\s*\+\s*0
|
||||
00000028.*R_CKCORE_ADDR_HI16\s*00000030\s*L1\s*\+\s*0
|
||||
0000002c.*R_CKCORE_ADDR_LO16\s*00000030\s*L1\s*\+\s*0
|
||||
#pass
|
|
@ -0,0 +1,11 @@
|
|||
.text
|
||||
LRW:
|
||||
lrw r2, 0x100
|
||||
lrw16 r2, 0x1000
|
||||
lrw32 r2, 0x10000
|
||||
lrw r2, 0x12341234
|
||||
lrw r2, L1
|
||||
lrw r2, [L1]
|
||||
|
||||
L1:
|
||||
mov r2, r3
|
|
@ -0,0 +1,217 @@
|
|||
#name: csky - enhancedsp
|
||||
#as: -mcpu=ck803er1
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*d0038002\s*ldbi.b\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d0038402\s*ldbi.h\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d0038802\s*ldbi.w\s*r2,\s*\(r3\)
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*e9c20ffa\s*bloop\s*r2,\s*0x0,\s*0xc.*
|
||||
\s*[0-9a-f]*:\s*d0038c02\s*pldbi.d\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d0039002\s*ldbi.hs\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d0039402\s*ldbi.bs\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d4038002\s*stbi.b\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d4038402\s*stbi.h\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d4038802\s*stbi.w\s*r2,\s*\(r3\)
|
||||
\s*[0-9a-f]*:\s*d083a002\s*ldbir.b\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d083a402\s*ldbir.h\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d083a802\s*ldbir.w\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d083ac02\s*pldbir.d\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d083b402\s*ldbir.hs\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d083b002\s*ldbir.bs\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d483a002\s*stbir.b\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d483a402\s*stbir.h\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*d483a802\s*stbir.w\s*r2,\s*\(r3\),\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c042\s*padd\.8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c002\s*padd\.16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c142\s*padd\.u8\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c1c2\s*padd\.s8\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c102\s*padd\.u16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c182\s*padd\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c122\s*add\.u32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c1a2\s*add\.s32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c442\s*psub\.8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c402\s*psub\.16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c542\s*psub\.u8\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c5c2\s*psub\.s8\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c502\s*psub\.u16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c582\s*psub\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c522\s*sub\.u32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c5a2\s*sub\.s32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c242\s*paddh\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c2c2\s*paddh\.s8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c202\s*paddh\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c282\s*paddh\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c222\s*addh\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c2a2\s*addh\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c642\s*psubh\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c6c2\s*psubh\.s8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c602\s*psubh\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c682\s*psubh\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c622\s*subh\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c6a2\s*subh\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c862\s*pasx\.16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cc62\s*psax\.16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c9e2\s*pasx\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c962\s*pasx\.u16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cd62\s*psax\.u16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cde2\s*psax\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ca62\s*pasxh\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cae2\s*pasxh\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ce62\s*psaxh\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cee2\s*psaxh\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c842\s*pcmpne\.8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c802\s*pcmpne\.16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c942\s*pcmphs\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c982\s*pcmphs\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c902\s*pcmphs\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883c9c2\s*pcmphs\.s8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ca42\s*pcmplt\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ca02\s*pcmplt\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ca82\s*pcmplt\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ca02\s*pcmplt\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cc42\s*pmax\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883ccc2\s*pmax\.s8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cc02\s*pmax\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cc82\s*pmax\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cc22\s*max\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cca2\s*max\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cd42\s*pmin\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cdc2\s*pmin\.s8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cd02\s*pmin\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cd82\s*pmin\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cd22\s*min\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883cda2\s*min\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8229083\s*sel\s*r3,\s*r2,\s*r1,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883e042\s*psabsa\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883e142\s*psabsaa\.u8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883e262\s*divul\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883e2e2\s*divsl\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883e4c2\s*mulaca\.s8\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f9e3d1a2\s*asri\.s32\.r\s*r2,\s*r3,\s*16
|
||||
\s*[0-9a-f]*:\s*f8c3d1e2\s*asr\.s32\.r\s*r2,\s*r3,\s*r6
|
||||
\s*[0-9a-f]*:\s*f9e3d322\s*lsri\.u32\.r\s*r2,\s*r3,\s*16
|
||||
\s*[0-9a-f]*:\s*f8c3d362\s*lsr\.u32\.r\s*r2,\s*r3,\s*r6
|
||||
\s*[0-9a-f]*:\s*f9e3d522\s*lsli\.u32\.s\s*r2,\s*r3,\s*16
|
||||
\s*[0-9a-f]*:\s*f9e3d5a2\s*lsli\.s32\.s\s*r2,\s*r3,\s*16
|
||||
\s*[0-9a-f]*:\s*f8c3d562\s*lsl\.u32\.s\s*r2,\s*r3,\s*r6
|
||||
\s*[0-9a-f]*:\s*f8c3d5e2\s*lsl\.s32\.s\s*r2,\s*r3,\s*r6
|
||||
\s*[0-9a-f]*:\s*f8e3d082\s*pasri\.s16\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*f8c3d0c2\s*pasr\.s16\s*r2,\s*r3,\s*r6
|
||||
\s*[0-9a-f]*:\s*f8e3d182\s*pasri\.s16\.r\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*f8c3d1c2\s*pasr\.s16\.r\s*r2,\s*r3,\s*r6
|
||||
\s*[0-9a-f]*:\s*f8e3d202\s*plsri\.u16\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*f883d242\s*plsr\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8e3d302\s*plsri\.u16\.r\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*f883d342\s*plsr\.u16\.r\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8e3d402\s*plsli\.u16\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*fa03d442\s*plsl\.u16\s*r2,\s*r3,\s*r16
|
||||
\s*[0-9a-f]*:\s*f8e3d502\s*plsli\.u16\.s\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*f8e3d582\s*plsli\.s16\.s\s*r2,\s*r3,\s*8
|
||||
\s*[0-9a-f]*:\s*f883d542\s*plsl\.u16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883d5c2\s*plsl\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8a3a482\s*pkg\s*r2,\s*r3,\s*4,\s*r5,\s*3
|
||||
\s*[0-9a-f]*:\s*f8839882\s*dexti\s*r2,\s*r3,\s*r4,\s*4
|
||||
\s*[0-9a-f]*:\s*f8839ca2\s*dext\s*r2,\s*r3,\s*r4,\s*r5
|
||||
\s*[0-9a-f]*:\s*f883d842\s*pkgll\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883d862\s*pkghh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f803d902\s*pext\.u8\.e\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803d982\s*pext\.s8\.e\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803d922\s*pextx\.u8\.e\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803d9a2\s*pextx\.s8\.e\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f883da02\s*narl\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883da22\s*narh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883da42\s*narlx\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883da62\s*narhx\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*fa03db02\s*clipi\.u32\s*r2,\s*r3,\s*16
|
||||
\s*[0-9a-f]*:\s*f9e3db82\s*clipi\.s32\s*r2,\s*r3,\s*16
|
||||
\s*[0-9a-f]*:\s*f883db22\s*clip\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883dba2\s*clip\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f863dbc2\s*pclipi\.s16\s*r2,\s*r3,\s*4
|
||||
\s*[0-9a-f]*:\s*f883db42\s*pclipi\.u16\s*r2,\s*r3,\s*4
|
||||
\s*[0-9a-f]*:\s*f883dbe2\s*pclip\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f883db62\s*pclip\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f803dc82\s*pabs\.s8\.s\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803dca2\s*pabs\.s16\.s\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803dcc2\s*abs\.s32\.s\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803dd82\s*pneg\.s8\.s\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803dda2\s*pneg\.s16\.s\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803ddc2\s*neg\.s32\.s\s*r2,\s*r3
|
||||
\s*[0-9a-f]*:\s*f803de62\s*dup\.8\s*r2,\s*r3,\s*3
|
||||
\s*[0-9a-f]*:\s*f803df02\s*dup\.16\s*r2,\s*r3,\s*0
|
||||
\s*[0-9a-f]*:\s*f8838002\s*mul\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838202\s*mul\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838082\s*mula\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838282\s*mula\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88380c2\s*muls\.u32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88382c2\s*muls\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838182\s*mula\.u32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838382\s*mula\.s32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88381c2\s*muls\.u32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88383c2\s*muls\.s32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838402\s*mul\.s32\.h\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838602\s*mul\.s32\.rh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838502\s*rmul\.s32\.h\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838702\s*rmul\.s32\.rh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838582\s*mula\.s32\.hs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88385c2\s*muls\.s32\.hs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838782\s*mula\.s32\.rhs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88387c2\s*muls\.s32\.rhs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838802\s*mulxl\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838a02\s*mulxl\.s32\.r\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838c02\s*mulxh\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838e02\s*mulxh\.s32\.r\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838902\s*rmulxl\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838b02\s*rmulxl\.s32\.r\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838d02\s*rmulxh\.s32\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838f02\s*rmulxh\.s32\.r\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838982\s*mulaxl\.s32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838b82\s*mulaxl\.s32\.rs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838d82\s*mulaxh\.s32\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838f82\s*mulaxh\.s32\.rs\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838022\s*mulll\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838262\s*mulhh\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838222\s*mulhl\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838122\s*rmulll\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838362\s*rmulhh\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838322\s*rmulhl\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88381a2\s*mulall\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88383e2\s*mulahh\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88383a2\s*mulahl\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88380a2\s*mulall\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88382e2\s*mulahh\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88380e2\s*mulahl\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88384a2\s*pmul\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88384e2\s*pmulx\.u16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838422\s*pmul\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838462\s*pmulx\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838522\s*prmul\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838562\s*prmulx\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88385a2\s*prmul\.s16\.h\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88387a2\s*prmul\.s16\.rh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88385e2\s*prmulx\.s16\.h\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88387e2\s*prmulx\.s16\.rh\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838922\s*mulca\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838962\s*mulcax\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838a22\s*mulcs\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838a62\s*mulcsr\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838c22\s*mulcsx\.s16\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88389a2\s*mulaca\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88389e2\s*mulacax\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838ba2\s*mulacs\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838be2\s*mulacsr\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838da2\s*mulacsx\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838de2\s*mulsca\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838fa2\s*mulscax\.s16\.s\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88388a2\s*mulaca\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f88388e2\s*mulacax\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838aa2\s*mulacs\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838ae2\s*mulacsr\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838ca2\s*mulacsx\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838ce2\s*mulsca\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838ce2\s*mulsca\.s16\.e\s*r2,\s*r3,\s*r4
|
||||
\s*[0-9a-f]*:\s*f8838442\s*mula\.32\.l\s*r2,\s*r3,\s*r4
|
|
@ -0,0 +1,219 @@
|
|||
|
||||
.text
|
||||
hello:
|
||||
.loop_start:
|
||||
ldbi.b r2, (r3)
|
||||
ldbi.h r2, (r3)
|
||||
ldbi.w r2, (r3)
|
||||
.loop_end:
|
||||
bloop r2, .loop_start, .loop_end
|
||||
pldbi.d r2, (r3)
|
||||
ldbi.hs r2, (r3)
|
||||
ldbi.bs r2, (r3)
|
||||
stbi.b r2, (r3)
|
||||
stbi.h r2, (r3)
|
||||
stbi.w r2, (r3)
|
||||
ldbir.b r2, (r3), r4
|
||||
ldbir.h r2, (r3), r4
|
||||
ldbir.w r2, (r3), r4
|
||||
pldbir.d r2, (r3), r4
|
||||
ldbir.hs r2, (r3), r4
|
||||
ldbir.bs r2, (r3), r4
|
||||
stbir.b r2, (r3), r4
|
||||
stbir.h r2, (r3), r4
|
||||
stbir.w r2, (r3), r4
|
||||
|
||||
padd.8 r2, r3, r4
|
||||
padd.16 r2, r3, r4
|
||||
padd.u8.s r2, r3, r4
|
||||
padd.s8.s r2, r3, r4
|
||||
padd.u16.s r2, r3, r4
|
||||
padd.s16.s r2, r3, r4
|
||||
add.u32.s r2, r3, r4
|
||||
add.s32.s r2, r3, r4
|
||||
psub.8 r2, r3, r4
|
||||
psub.16 r2, r3, r4
|
||||
psub.u8.s r2, r3, r4
|
||||
psub.s8.s r2, r3, r4
|
||||
psub.u16.s r2, r3, r4
|
||||
psub.s16.s r2, r3, r4
|
||||
sub.u32.s r2, r3, r4
|
||||
sub.s32.s r2, r3, r4
|
||||
paddh.u8 r2, r3, r4
|
||||
paddh.s8 r2, r3, r4
|
||||
paddh.u16 r2, r3, r4
|
||||
paddh.s16 r2, r3, r4
|
||||
addh.u32 r2, r3, r4
|
||||
addh.s32 r2, r3, r4
|
||||
psubh.u8 r2, r3, r4
|
||||
psubh.s8 r2, r3, r4
|
||||
psubh.u16 r2, r3, r4
|
||||
psubh.s16 r2, r3, r4
|
||||
subh.u32 r2, r3, r4
|
||||
subh.s32 r2, r3, r4
|
||||
|
||||
pasx.16 r2, r3, r4
|
||||
psax.16 r2, r3, r4
|
||||
pasx.s16.s r2, r3, r4
|
||||
pasx.u16.s r2, r3, r4
|
||||
psax.u16.s r2, r3, r4
|
||||
psax.s16.s r2, r3, r4
|
||||
pasxh.u16 r2, r3, r4
|
||||
pasxh.s16 r2, r3, r4
|
||||
psaxh.u16 r2, r3, r4
|
||||
psaxh.s16 r2, r3, r4
|
||||
pcmpne.8 r2, r3, r4
|
||||
pcmpne.16 r2, r3, r4
|
||||
pcmphs.u8 r2, r3, r4
|
||||
pcmphs.s16 r2, r3, r4
|
||||
pcmphs.u16 r2, r3, r4
|
||||
pcmphs.s8 r2, r3, r4
|
||||
pcmplt.u8 r2, r3, r4
|
||||
pcmplt.u16 r2, r3, r4
|
||||
pcmplt.s16 r2, r3, r4
|
||||
pcmplt.u16 r2, r3, r4
|
||||
pmax.u8 r2, r3, r4
|
||||
pmax.s8 r2, r3, r4
|
||||
pmax.u16 r2, r3, r4
|
||||
pmax.s16 r2, r3, r4
|
||||
max.u32 r2, r3, r4
|
||||
max.s32 r2, r3, r4
|
||||
pmin.u8 r2, r3, r4
|
||||
pmin.s8 r2, r3, r4
|
||||
pmin.u16 r2, r3, r4
|
||||
pmin.s16 r2, r3, r4
|
||||
min.u32 r2, r3, r4
|
||||
min.s32 r2, r3, r4
|
||||
sel r3, r2, r1, r4
|
||||
|
||||
psabsa.u8 r2, r3, r4
|
||||
psabsaa.u8 r2, r3, r4
|
||||
divul r2, r3, r4
|
||||
divsl r2, r3, r4
|
||||
mulaca.s8 r2, r3, r4
|
||||
|
||||
asri.s32.r r2, r3, 16
|
||||
asr.s32.r r2, r3, r6
|
||||
lsri.u32.r r2, r3, 16
|
||||
lsr.u32.r r2, r3, r6
|
||||
lsli.u32.s r2, r3, 16
|
||||
lsli.s32.s r2, r3, 16
|
||||
lsl.u32.s r2, r3, r6
|
||||
lsl.s32.s r2, r3, r6
|
||||
pasri.s16 r2, r3, 8
|
||||
pasr.s16 r2, r3, r6
|
||||
pasri.s16.r r2, r3, 8
|
||||
pasr.s16.r r2, r3, r6
|
||||
plsri.u16 r2, r3, 8
|
||||
plsr.u16 r2, r3, r4
|
||||
plsri.u16.r r2, r3, 8
|
||||
plsr.u16.r r2, r3, r4
|
||||
plsli.u16 r2, r3, 8
|
||||
plsl.u16 r2, r3, r16
|
||||
plsli.u16.s r2, r3, 8
|
||||
plsli.s16.s r2, r3, 8
|
||||
plsl.u16.s r2, r3, r4
|
||||
plsl.s16.s r2, r3, r4
|
||||
|
||||
pkg r2, r3, 4, r5, 3
|
||||
dexti r2, r3, r4, 4
|
||||
dext r2, r3, r4, r5
|
||||
pkgll r2, r3, r4
|
||||
pkghh r2, r3, r4
|
||||
pext.u8.e r2, r3
|
||||
pext.s8.e r2, r3
|
||||
pextx.u8.e r2, r3
|
||||
pextx.s8.e r2, r3
|
||||
narl r2, r3, r4
|
||||
narh r2, r3, r4
|
||||
narlx r2, r3, r4
|
||||
narhx r2, r3, r4
|
||||
clipi.u32 r2, r3, 16
|
||||
clipi.s32 r2, r3, 16
|
||||
clip.u32 r2, r3, r4
|
||||
clip.s32 r2, r3, r4
|
||||
pclipi.s16 r2, r3, 4
|
||||
pclipi.u16 r2, r3, 4
|
||||
pclip.s16 r2, r3, r4
|
||||
pclip.u16 r2, r3, r4
|
||||
pabs.s8.s r2, r3
|
||||
pabs.s16.s r2, r3
|
||||
abs.s32.s r2, r3
|
||||
pneg.s8.s r2, r3
|
||||
pneg.s16.s r2, r3
|
||||
neg.s32.s r2, r3
|
||||
dup.8 r2, r3, 3
|
||||
dup.16 r2, r3, 0
|
||||
|
||||
mul.u32 r2, r3, r4
|
||||
mul.s32 r2, r3, r4
|
||||
mula.u32 r2, r3, r4
|
||||
mula.s32 r2, r3, r4
|
||||
muls.u32 r2, r3, r4
|
||||
muls.s32 r2, r3, r4
|
||||
mula.u32.s r2, r3, r4
|
||||
mula.s32.s r2, r3, r4
|
||||
muls.u32.s r2, r3, r4
|
||||
muls.s32.s r2, r3, r4
|
||||
mul.s32.h r2, r3, r4
|
||||
mul.s32.rh r2, r3, r4
|
||||
rmul.s32.h r2, r3, r4
|
||||
rmul.s32.rh r2, r3, r4
|
||||
mula.s32.hs r2, r3, r4
|
||||
muls.s32.hs r2, r3, r4
|
||||
mula.s32.rhs r2, r3, r4
|
||||
muls.s32.rhs r2, r3, r4
|
||||
mulxl.s32 r2, r3, r4
|
||||
mulxl.s32.r r2, r3, r4
|
||||
mulxh.s32 r2, r3, r4
|
||||
mulxh.s32.r r2, r3, r4
|
||||
rmulxl.s32 r2, r3, r4
|
||||
rmulxl.s32.r r2, r3, r4
|
||||
rmulxh.s32 r2, r3, r4
|
||||
rmulxh.s32.r r2, r3, r4
|
||||
mulaxl.s32.s r2, r3, r4
|
||||
mulaxl.s32.rs r2, r3, r4
|
||||
mulaxh.s32.s r2, r3, r4
|
||||
mulaxh.s32.rs r2, r3, r4
|
||||
mulll.s16 r2, r3, r4
|
||||
mulhh.s16 r2, r3, r4
|
||||
mulhl.s16 r2, r3, r4
|
||||
rmulll.s16 r2, r3, r4
|
||||
rmulhh.s16 r2, r3, r4
|
||||
rmulhl.s16 r2, r3, r4
|
||||
mulall.s16.s r2, r3, r4
|
||||
mulahh.s16.s r2, r3, r4
|
||||
mulahl.s16.s r2, r3, r4
|
||||
mulall.s16.e r2, r3, r4
|
||||
mulahh.s16.e r2, r3, r4
|
||||
mulahl.s16.e r2, r3, r4
|
||||
pmul.u16 r2, r3, r4
|
||||
pmulx.u16 r2, r3, r4
|
||||
pmul.s16 r2, r3, r4
|
||||
pmulx.s16 r2, r3, r4
|
||||
prmul.s16 r2, r3, r4
|
||||
prmulx.s16 r2, r3, r4
|
||||
prmul.s16.h r2, r3, r4
|
||||
prmul.s16.rh r2, r3, r4
|
||||
prmulx.s16.h r2, r3, r4
|
||||
prmulx.s16.rh r2, r3, r4
|
||||
mulca.s16.s r2, r3, r4
|
||||
mulcax.s16.s r2, r3, r4
|
||||
mulcs.s16 r2, r3, r4
|
||||
mulcsr.s16 r2, r3, r4
|
||||
mulcsx.s16 r2, r3, r4
|
||||
mulaca.s16.s r2, r3, r4
|
||||
mulacax.s16.s r2, r3, r4
|
||||
mulacs.s16.s r2, r3, r4
|
||||
mulacsr.s16.s r2, r3, r4
|
||||
mulacsx.s16.s r2, r3, r4
|
||||
mulsca.s16.s r2, r3, r4
|
||||
mulscax.s16.s r2, r3, r4
|
||||
mulaca.s16.e r2, r3, r4
|
||||
mulacax.s16.e r2, r3, r4
|
||||
mulacs.s16.e r2, r3, r4
|
||||
mulacsr.s16.e r2, r3, r4
|
||||
mulacsx.s16.e r2, r3, r4
|
||||
mulsca.s16.e r2, r3, r4
|
||||
mulsca.s16.e r2, r3, r4
|
||||
mula.32.l r2, r3, r4
|
|
@ -0,0 +1,12 @@
|
|||
# name: csky - java
|
||||
#as: -mcpu=ck802j
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*14ac\s*bpop\.h\s*r3
|
||||
\s*[0-9a-f]:\s*14ae\s*bpop\.w\s*r3
|
||||
\s*[0-9a-f]:\s*14ec\s*bpush\.h\s*r3
|
||||
\s*[0-9a-f]:\s*14ee\s*bpush\.w\s*r3
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
hello:
|
||||
bpop.h r3
|
||||
bpop.w r3
|
||||
bpush.h r3
|
||||
bpush.w r3
|
|
@ -0,0 +1,14 @@
|
|||
# name: jbsr - csky
|
||||
#as: -mcpu=ck610
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*ffff\s*bsr\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*f7ff\s*br\s*0x2.*
|
||||
\s*[0-9a-f]*:\s*f7ff\s*br\s*0x4.*
|
||||
\s*[0-9a-f]*:\s*1200\s*\.short\s*0x1200.*
|
||||
\s*[0-9a-f]*:\s*00000000\s*\.long\s*0x00000000.*
|
||||
#...
|
|
@ -0,0 +1,3 @@
|
|||
.text
|
||||
hello:
|
||||
jbsr hello
|
|
@ -0,0 +1,16 @@
|
|||
# name: jbt - csky
|
||||
#as: -mcpu=ck610
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*e7ff\s*bt\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e804\s*bf\s*0xc.*
|
||||
\s*[0-9a-f]*:\s*7001\s*jmpi\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]*:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]*:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]*:\s*1200\s*mov\s*r0,\s*r0
|
||||
#...
|
|
@ -0,0 +1,10 @@
|
|||
.text
|
||||
hello:
|
||||
jbt hello
|
||||
jbt label
|
||||
.rept 33*1024
|
||||
nop
|
||||
.endr
|
||||
|
||||
label:
|
||||
nop
|
|
@ -0,0 +1,23 @@
|
|||
# name: jbt - csky
|
||||
#as: -mcpu=ck610 -fpic
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*e7ff\s*bt\s*0x0.*
|
||||
\s*[0-9a-f]*:\s*e80b\s*bf\s*0x1a.*
|
||||
\s*[0-9a-f]*:\s*2470\s*subi\s*r0,\s*r0,\s*8
|
||||
\s*[0-9a-f]*:\s*9f00\s*st.w\s*r15,\s*\(r0,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*f800\s*bsr\s*0xa.*
|
||||
\s*[0-9a-f]*:\s*7102\s*lrw\s*r1,\s*0x10810.*
|
||||
\s*[0-9a-f]*:\s*1cf1\s*addu\s*r1,\s*r1,\s*r15
|
||||
\s*[0-9a-f]*:\s*8f00\s*ld.w\s*r15,\s*\(r0,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*2070\s*addi\s*r0,\s*r0,\s*8
|
||||
\s*[0-9a-f]*:\s*00c1\s*jmp\s*r1
|
||||
\s*[0-9a-f]*:\s*0810\s*cprgr\s*r0,\s*cpr1
|
||||
\s*[0-9a-f]*:\s*0001\s*sync
|
||||
\s*[0-9a-f]*:\s*0000\s*bkpt
|
||||
\s*[0-9a-f]*:\s*1200\s*mov\s*r0,\s*r0
|
||||
#...
|
|
@ -0,0 +1,10 @@
|
|||
.text
|
||||
hello:
|
||||
jbt hello
|
||||
jbt label
|
||||
.rept 33*1024
|
||||
nop
|
||||
.endr
|
||||
|
||||
label:
|
||||
nop
|
|
@ -0,0 +1,16 @@
|
|||
# name: jmpi1 - csky
|
||||
#as: -mcpu=ck610
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]:\s*70[0-9a-f]*\s*jmpi\s*0x0\s*\/\/\s*from\s*address\s*pool\s*at\s*0x[0-9a-f]*
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]:\s*f7ff\s*br\s*0x[0-9a-f]*\s*\/\/\s*[0-9a-f]*\s*\<LABEL\+0x[0-9a-f]*\>
|
||||
\s*[0-9a-f]:\s*f7ff\s*br\s*0x[0-9a-f]*\s*\/\/\s*[0-9a-f]*\s*\<LABEL\+0x[0-9a-f]*\>
|
||||
\s*[0-9a-f]:\s*1200\s*\.short\s*0x1200
|
||||
\s*[0-9a-f]:\s*00000000\s*\.long\s*0x00000000
|
||||
#...
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jmpi LABEL
|
||||
bkpt
|
|
@ -0,0 +1,14 @@
|
|||
# name: jmpi2 - csky
|
||||
#as: -mcpu=ck610
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]:\s*70[0-9a-f]*\s*jmpi\s*0x0\s*\/\/\s*from\s*address\s*pool\s*at\s*0x[0-9a-f]*
|
||||
\s*[0-9a-f]:\s*f7ff\s*br\s*0x[0-9a-f]*\s*\/\/\s*[0-9a-f]*\s*\<LABEL\+0x[0-9a-f]*\>
|
||||
\s*[0-9a-f]:\s*f7ff\s*br\s*0x[0-9a-f]*\s*\/\/\s*[0-9a-f]*\s*\<LABEL\+0x[0-9a-f]*\>
|
||||
\s*[0-9a-f]:\s*00000000\s*\.long\s*0x00000000
|
||||
#...
|
|
@ -0,0 +1,5 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jmpi LABEL2
|
|
@ -0,0 +1,9 @@
|
|||
# name: jmpi2 - csky
|
||||
#as: -mcpu=ck610
|
||||
#readelf: -r --wide
|
||||
|
||||
|
||||
Relocation section '.rela.text\' at offset .* contains 1 entry:
|
||||
#...
|
||||
.*R_CKCORE_ADDR32[ \t]+00000000[ \t]+\.text \+[ \t]+[0-9a-f]+
|
||||
#pass
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jmpi LABEL
|
||||
bkpt
|
|
@ -0,0 +1,13 @@
|
|||
# name: jmpiv2_1 - csky
|
||||
#as: -mcpu=ck810
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]:\s*eac00002\s*jmpi\s*0x0\s*\/\/\s*from\s*address\s*pool\s*at\s*0x[0-9a-f]*
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt\s*
|
||||
\s*[0-9a-f]:\s*00000000\s*\.long\s*0x00000000
|
||||
#...
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jmpi LABEL
|
||||
bkpt
|
|
@ -0,0 +1,9 @@
|
|||
# name: jmpiv2_2 - csky
|
||||
#as: -mcpu=ck810
|
||||
#readelf: -r --wide
|
||||
|
||||
|
||||
Relocation section '.rela.text\' at offset .* contains 1 entry:
|
||||
#...
|
||||
.*R_CKCORE_ADDR32[ \t]+00000000[ \t]+\.text \+[ \t]+[0-9a-f]+
|
||||
#pass
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jmpi LABEL
|
||||
bkpt
|
|
@ -0,0 +1,13 @@
|
|||
# name: jsriv2_1 - csky
|
||||
#as: -mcpu=ck807
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt
|
||||
\s*[0-9a-f]:\s*eae00002\s*jsri\s*0x0\s*\/\/\s*from\s*address\s*pool\s*at\s*0x[0-9a-f]*
|
||||
\s*[0-9a-f]:\s*0000\s*.short\s*0x0000
|
||||
\s*[0-9a-f]:\s*00000000\s*.long\s*0x00000000
|
||||
#...
|
|
@ -0,0 +1,5 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jsri LABEL
|
|
@ -0,0 +1,14 @@
|
|||
# name: jsriv2_2 - csky
|
||||
#as: -mcpu=ck810
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]:\s*0000\s*bkpt
|
||||
\s*[0-9a-f]:\s*e3ffffff\s*bsr\s*0x0\s*\/\/\s*0\s*<LABEL>
|
||||
\s*[0-9a-f]:\s*c4004820\s*lsli\s*r0,\s*\s*r0,\s*0
|
||||
\s*[0-9a-f]:\s*0000\s*.short\s*0x0000
|
||||
\s*[0-9a-f]:\s*00000000\s*.long\s*0x00000000
|
||||
#...
|
|
@ -0,0 +1,5 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jsri LABEL
|
|
@ -0,0 +1,9 @@
|
|||
# name: jsriv2_3 - csky
|
||||
#as: -mcpu=ck807
|
||||
#readelf: -r --wide
|
||||
|
||||
|
||||
Relocation section '.rela.text\' at offset .* contains 1 entry:
|
||||
#...
|
||||
00000008.*R_CKCORE_ADDR32[ \t]+00000000[ \t]+\.text \+[ \t]+[0-9a-f]+
|
||||
#pass
|
|
@ -0,0 +1,5 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jsri LABEL
|
|
@ -0,0 +1,9 @@
|
|||
# name: jsriv2_4 - csky
|
||||
#as: -mcpu=ck810
|
||||
#readelf: -r --wide
|
||||
|
||||
|
||||
Relocation section '.rela.text\' at offset .* contains 1 entry:
|
||||
#...
|
||||
0000000c.*R_CKCORE_ADDR32[ \t]+00000000[ \t]+\.text \+[ \t]+[0-9a-f]+
|
||||
#pass
|
|
@ -0,0 +1,5 @@
|
|||
.text
|
||||
|
||||
LABEL:
|
||||
bkpt
|
||||
jsri LABEL
|
|
@ -0,0 +1,17 @@
|
|||
# name: trust - csky
|
||||
#as: -mcpu=ck810t
|
||||
#objdump: -d
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*c0003c20\s*wsc
|
||||
\s*[0-9a-f]*:\s*c0006024\s*mfcr\s*r4,\s*cr<0,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0156024\s*mfcr\s*r4,\s*cr<21,\s*0>
|
||||
\s*[0-9a-f]*:\s*c004642b\s*mtcr\s*r4,\s*cr<11,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0046428\s*mtcr\s*r4,\s*cr<8,\s*0>
|
||||
\s*[0-9a-f]*:\s*c0096024\s*mfcr\s*r4,\s*cr<9,\s*0>
|
||||
\s*[0-9a-f]*:\s*c2007420\s*psrset\s*sie
|
||||
\s*[0-9a-f]*:\s*c2007020\s*psrclr\s*sie
|
||||
#...
|
|
@ -0,0 +1,9 @@
|
|||
TRUST:
|
||||
wsc
|
||||
mfcr r4, psr
|
||||
mfcr r4, rid
|
||||
mtcr r4, gcr
|
||||
mtcr r4, sedcr
|
||||
mfcr r4, sepcr
|
||||
psrset sie
|
||||
psrclr sie
|
|
@ -0,0 +1,222 @@
|
|||
# name: csky - v1-float
|
||||
#as: -mcpu=ck610ef -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe06002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe06402.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffec1002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffec9002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffed9002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffee1002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffed1002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffee9002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffef1002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffef9002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe04403.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe04c03.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe05403.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe05c03.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe38c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe48c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe58c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe68c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe78c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe88c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe98c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffea8c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffeb8c02.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe04002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe04802.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe05002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe05802.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe31002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe41002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe51002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe61002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe71002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe81002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe91002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffea1002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffeb1002.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*744a\s*lrw\s*r4,\s*0xffe00840.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7449\s*lrw\s*r4,\s*0xffe00c40.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7449\s*lrw\s*r4,\s*0xffe01040.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7448\s*lrw\s*r4,\s*0xffe01440.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7448\s*lrw\s*r4,\s*0xffe01841.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7447\s*lrw\s*r4,\s*0xffe01c41.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7447\s*lrw\s*r4,\s*0xffe02041.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7446\s*lrw\s*r4,\s*0xffe02441.*
|
||||
\s*[0-9a-f]*:\s*3204\s*cpwir\s*r4
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7346\s*lrw\s*r3,\s*0xffe00400.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7345\s*lrw\s*r3,\s*0xffe00480.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7345\s*lrw\s*r3,\s*0xffe00500.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7344\s*lrw\s*r3,\s*0xffe00580.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7344\s*lrw\s*r3,\s*0xffe00600.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7343\s*lrw\s*r3,\s*0xffe00680.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7343\s*lrw\s*r3,\s*0xffe00700.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
\s*[0-9a-f]*:\s*7342\s*lrw\s*r3,\s*0xffe00780.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*000d\s*cprc
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*7242\s*lrw\s*r2,\s*0xffe02801.*
|
||||
\s*[0-9a-f]*:\s*3202\s*cpwir\s*r2
|
||||
\s*[0-9a-f]*:\s*7242\s*lrw\s*r2,\s*0xffe02c02.*
|
||||
\s*[0-9a-f]*:\s*3202\s*cpwir\s*r2
|
||||
\s*[0-9a-f]*:\s*7242\s*lrw\s*r2,\s*0xffe03402.*
|
||||
\s*[0-9a-f]*:\s*3202\s*cpwir\s*r2
|
||||
\s*[0-9a-f]*:\s*7242\s*lrw\s*r2,\s*0xffe03002.*
|
||||
\s*[0-9a-f]*:\s*3202\s*cpwir\s*r2
|
||||
\s*[0-9a-f]*:\s*7242\s*lrw\s*r2,\s*0xffe03c02.*
|
||||
\s*[0-9a-f]*:\s*3202\s*cpwir\s*r2
|
||||
\s*[0-9a-f]*:\s*7242\s*lrw\s*r2,\s*0xffe03802.*
|
||||
\s*[0-9a-f]*:\s*3202\s*cpwir\s*r2
|
||||
\s*[0-9a-f]*:\s*7342\s*lrw\s*r3,\s*0xffe10002.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*7342\s*lrw\s*r3,\s*0xffe08002.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*7342\s*lrw\s*r3,\s*0xffe20002.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
\s*[0-9a-f]*:\s*7342\s*lrw\s*r3,\s*0xffe18002.*
|
||||
\s*[0-9a-f]*:\s*3203\s*cpwir\s*r3
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*2642\s*cpwgr\s*r2,\s*cpr4
|
||||
\s*[0-9a-f]*:\s*0842\s*cprgr\s*r2,\s*cpr4
|
||||
\s*[0-9a-f]*:\s*2642\s*cpwgr\s*r2,\s*cpr4
|
||||
\s*[0-9a-f]*:\s*2653\s*cpwgr\s*r3,\s*cpr5
|
||||
\s*[0-9a-f]*:\s*0842\s*cprgr\s*r2,\s*cpr4
|
||||
\s*[0-9a-f]*:\s*0853\s*cprgr\s*r3,\s*cpr5
|
||||
\s*[0-9a-f]*:\s*f7ff\s*br\s*0x124.*
|
||||
\s*[0-9a-f]*:\s*f7ff\s*br\s*0x126.*
|
||||
\s*[0-9a-f]*:\s*ffe06002\s*\.long\s*0xffe06002
|
||||
\s*[0-9a-f]*:\s*ffe06402\s*\.long\s*0xffe06402
|
||||
\s*[0-9a-f]*:\s*ffec1002\s*\.long\s*0xffec1002
|
||||
\s*[0-9a-f]*:\s*ffec9002\s*\.long\s*0xffec9002
|
||||
\s*[0-9a-f]*:\s*ffed9002\s*\.long\s*0xffed9002
|
||||
\s*[0-9a-f]*:\s*ffee1002\s*\.long\s*0xffee1002
|
||||
\s*[0-9a-f]*:\s*ffed1002\s*\.long\s*0xffed1002
|
||||
\s*[0-9a-f]*:\s*ffee9002\s*\.long\s*0xffee9002
|
||||
\s*[0-9a-f]*:\s*ffef1002\s*\.long\s*0xffef1002
|
||||
\s*[0-9a-f]*:\s*ffef9002\s*\.long\s*0xffef9002
|
||||
\s*[0-9a-f]*:\s*ffe04403\s*\.long\s*0xffe04403
|
||||
\s*[0-9a-f]*:\s*ffe04c03\s*\.long\s*0xffe04c03
|
||||
\s*[0-9a-f]*:\s*ffe05403\s*\.long\s*0xffe05403
|
||||
\s*[0-9a-f]*:\s*ffe05c03\s*\.long\s*0xffe05c03
|
||||
\s*[0-9a-f]*:\s*ffe38c02\s*\.long\s*0xffe38c02
|
||||
\s*[0-9a-f]*:\s*ffe48c02\s*\.long\s*0xffe48c02
|
||||
\s*[0-9a-f]*:\s*ffe58c02\s*\.long\s*0xffe58c02
|
||||
\s*[0-9a-f]*:\s*ffe68c02\s*\.long\s*0xffe68c02
|
||||
\s*[0-9a-f]*:\s*ffe78c02\s*\.long\s*0xffe78c02
|
||||
\s*[0-9a-f]*:\s*ffe88c02\s*\.long\s*0xffe88c02
|
||||
\s*[0-9a-f]*:\s*ffe98c02\s*\.long\s*0xffe98c02
|
||||
\s*[0-9a-f]*:\s*ffea8c02\s*\.long\s*0xffea8c02
|
||||
\s*[0-9a-f]*:\s*ffeb8c02\s*\.long\s*0xffeb8c02
|
||||
\s*[0-9a-f]*:\s*ffe04002\s*\.long\s*0xffe04002
|
||||
\s*[0-9a-f]*:\s*ffe04802\s*\.long\s*0xffe04802
|
||||
\s*[0-9a-f]*:\s*ffe05002\s*\.long\s*0xffe05002
|
||||
\s*[0-9a-f]*:\s*ffe05802\s*\.long\s*0xffe05802
|
||||
\s*[0-9a-f]*:\s*ffe31002\s*\.long\s*0xffe31002
|
||||
\s*[0-9a-f]*:\s*ffe41002\s*\.long\s*0xffe41002
|
||||
\s*[0-9a-f]*:\s*ffe51002\s*\.long\s*0xffe51002
|
||||
\s*[0-9a-f]*:\s*ffe61002\s*\.long\s*0xffe61002
|
||||
\s*[0-9a-f]*:\s*ffe71002\s*\.long\s*0xffe71002
|
||||
\s*[0-9a-f]*:\s*ffe81002\s*\.long\s*0xffe81002
|
||||
\s*[0-9a-f]*:\s*ffe91002\s*\.long\s*0xffe91002
|
||||
\s*[0-9a-f]*:\s*ffea1002\s*\.long\s*0xffea1002
|
||||
\s*[0-9a-f]*:\s*ffeb1002\s*\.long\s*0xffeb1002
|
||||
\s*[0-9a-f]*:\s*ffe00840\s*\.long\s*0xffe00840
|
||||
\s*[0-9a-f]*:\s*ffe00c40\s*\.long\s*0xffe00c40
|
||||
\s*[0-9a-f]*:\s*ffe01040\s*\.long\s*0xffe01040
|
||||
\s*[0-9a-f]*:\s*ffe01440\s*\.long\s*0xffe01440
|
||||
\s*[0-9a-f]*:\s*ffe01841\s*\.long\s*0xffe01841
|
||||
\s*[0-9a-f]*:\s*ffe01c41\s*\.long\s*0xffe01c41
|
||||
\s*[0-9a-f]*:\s*ffe02041\s*\.long\s*0xffe02041
|
||||
\s*[0-9a-f]*:\s*ffe02441\s*\.long\s*0xffe02441
|
||||
\s*[0-9a-f]*:\s*ffe00400\s*\.long\s*0xffe00400
|
||||
\s*[0-9a-f]*:\s*ffe00480\s*\.long\s*0xffe00480
|
||||
\s*[0-9a-f]*:\s*ffe00500\s*\.long\s*0xffe00500
|
||||
\s*[0-9a-f]*:\s*ffe00580\s*\.long\s*0xffe00580
|
||||
\s*[0-9a-f]*:\s*ffe00600\s*\.long\s*0xffe00600
|
||||
\s*[0-9a-f]*:\s*ffe00680\s*\.long\s*0xffe00680
|
||||
\s*[0-9a-f]*:\s*ffe00700\s*\.long\s*0xffe00700
|
||||
\s*[0-9a-f]*:\s*ffe00780\s*\.long\s*0xffe00780
|
||||
\s*[0-9a-f]*:\s*ffe02801\s*\.long\s*0xffe02801
|
||||
\s*[0-9a-f]*:\s*ffe02c02\s*\.long\s*0xffe02c02
|
||||
\s*[0-9a-f]*:\s*ffe03402\s*\.long\s*0xffe03402
|
||||
\s*[0-9a-f]*:\s*ffe03002\s*\.long\s*0xffe03002
|
||||
\s*[0-9a-f]*:\s*ffe03c02\s*\.long\s*0xffe03c02
|
||||
\s*[0-9a-f]*:\s*ffe03802\s*\.long\s*0xffe03802
|
||||
\s*[0-9a-f]*:\s*ffe10002\s*\.long\s*0xffe10002
|
||||
\s*[0-9a-f]*:\s*ffe08002\s*\.long\s*0xffe08002
|
||||
\s*[0-9a-f]*:\s*ffe20002\s*\.long\s*0xffe20002
|
||||
\s*[0-9a-f]*:\s*ffe18002\s*\.long\s*0xffe18002
|
|
@ -0,0 +1,78 @@
|
|||
.text
|
||||
|
||||
L0:
|
||||
fabsm fr0, fr2, r4
|
||||
fnegm fr0, fr2, r4
|
||||
faddm fr0, fr2, fr4, r4
|
||||
fsubm fr0, fr2, fr4, r4
|
||||
fmacm fr0, fr2, fr4, r4
|
||||
fmscm fr0, fr2, fr4, r4
|
||||
fmulm fr0, fr2, fr4, r4
|
||||
fnmacm fr0, fr2, fr4, r4
|
||||
fnmscm fr0, fr2, fr4, r4
|
||||
fnmulm fr0, fr2, fr4, r4
|
||||
|
||||
L1:
|
||||
fabss fr0, fr3, r4
|
||||
fnegs fr0, fr3, r4
|
||||
fsqrts fr0, fr3, r4
|
||||
frecips fr0, fr3, r4
|
||||
fadds fr0, fr2, fr3, r4
|
||||
fsubs fr0, fr2, fr3, r4
|
||||
fmacs fr0, fr2, fr3, r4
|
||||
fmscs fr0, fr2, fr3, r4
|
||||
fmuls fr0, fr2, fr3, r4
|
||||
fdivs fr0, fr2, fr3, r4
|
||||
fnmacs fr0, fr2, fr3, r4
|
||||
fnmscs fr0, fr2, fr3, r4
|
||||
fnmuls fr0, fr2, fr3, r4
|
||||
|
||||
fabsd fr0, fr2, r4
|
||||
fnegd fr0, fr2, r4
|
||||
fsqrtd fr0, fr2, r4
|
||||
frecipd fr0, fr2, r4
|
||||
faddd fr0, fr2, fr4, r4
|
||||
fsubd fr0, fr2, fr4, r4
|
||||
fmacd fr0, fr2, fr4, r4
|
||||
fmscd fr0, fr2, fr4, r4
|
||||
fmuld fr0, fr2, fr4, r4
|
||||
fdivd fr0, fr2, fr4, r4
|
||||
fnmacd fr0, fr2, fr4, r4
|
||||
fnmscd fr0, fr2, fr4, r4
|
||||
fnmuld fr0, fr2, fr4, r4
|
||||
|
||||
L2:
|
||||
fcmphsd fr0, fr2, r4
|
||||
fcmpltd fr0, fr2, r4
|
||||
fcmpned fr0, fr2, r4
|
||||
fcmpuod fr0, fr2, r4
|
||||
fcmphss fr1, fr2, r4
|
||||
fcmplts fr1, fr2, r4
|
||||
fcmpnes fr1, fr2, r4
|
||||
fcmpuos fr1, fr2, r4
|
||||
fcmpzhsd fr0, r3
|
||||
fcmpzltd fr0, r3
|
||||
fcmpzned fr0, r3
|
||||
fcmpzuod fr0, r3
|
||||
fcmpzhss fr0, r3
|
||||
fcmpzlts fr0, r3
|
||||
fcmpznes fr0, r3
|
||||
fcmpzuos fr0, r3
|
||||
|
||||
L3:
|
||||
fstod fr0, fr1, r2
|
||||
fdtos fr0, fr2, r2
|
||||
fsitos fr0, fr2, r2
|
||||
fsitod fr0, fr2, r2
|
||||
fuitos fr0, fr2, r2
|
||||
fuitod fr0, fr2, r2
|
||||
fstosi fr0, fr2, RM_NEAREST, r3
|
||||
fdtosi fr0, fr2, RM_NEAREST, r3
|
||||
fstoui fr0, fr2, RM_NEAREST, r3
|
||||
fdtoui fr0, fr2, RM_NEAREST, r3
|
||||
|
||||
L4:
|
||||
fmts r2, fr4
|
||||
fmfs r2, fr4
|
||||
fmtd r2, fr4
|
||||
fmfd r2, fr4
|
|
@ -0,0 +1,54 @@
|
|||
# name: csky - v2-float
|
||||
#as: -mcpu=ck810ef -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*f4243403\s*fstms\s*fr3-fr4,\s*\(r4\)
|
||||
\s*[0-9a-f]*:\s*f4243003\s*fldms\s*fr3-fr4,\s*\(r4\)
|
||||
\s*[0-9a-f]*:\s*f4243603\s*fstmm\s*fr3-fr4,\s*\(r4\)
|
||||
\s*[0-9a-f]*:\s*f4243203\s*fldmm\s*fr3-fr4,\s*\(r4\)
|
||||
\s*[0-9a-f]*:\s*f4243503\s*fstmd\s*fr3-fr4,\s*\(r4\)
|
||||
\s*[0-9a-f]*:\s*f4243103\s*fldmd\s*fr3-fr4,\s*\(r4\)
|
||||
\s*[0-9a-f]*:\s*f4022600\s*fstm\s*fr0,\s*\(r2,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*f4022200\s*fldm\s*fr0,\s*\(r2,\s*0x0\)
|
||||
\s*[0-9a-f]*:\s*f4022610\s*fstm\s*fr0,\s*\(r2,\s*0x8\)
|
||||
\s*[0-9a-f]*:\s*f4022210\s*fldm\s*fr0,\s*\(r2,\s*0x8\)
|
||||
\s*[0-9a-f]*:\s*f4022510\s*fstd\s*fr0,\s*\(r2,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*f4022110\s*fldd\s*fr0,\s*\(r2,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*f4022410\s*fsts\s*fr0,\s*\(r2,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*f4022010\s*flds\s*fr0,\s*\(r2,\s*0x4\)
|
||||
\s*[0-9a-f]*:\s*f4822e02\s*fstrm\s*fr2,\s*\(r2,\s*r4\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f4822e42\s*fstrm\s*fr2,\s*\(r2,\s*r4\s*<<\s*2\)
|
||||
\s*[0-9a-f]*:\s*f4822d02\s*fstrd\s*fr2,\s*\(r2,\s*r4\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f4822d42\s*fstrd\s*fr2,\s*\(r2,\s*r4\s*<<\s*2\)
|
||||
\s*[0-9a-f]*:\s*f4822c02\s*fstrs\s*fr2,\s*\(r2,\s*r4\s*<<\s*0\)
|
||||
\s*[0-9a-f]*:\s*f4822c42\s*fstrs\s*fr2,\s*\(r2,\s*r4\s*<<\s*2\)
|
||||
\s*[0-9a-f]*:\s*f4831222\s*fnmulm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f48312e2\s*fnmscm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f48312c2\s*fnmacm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f48312a2\s*fmscm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4831282\s*fmacm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4831202\s*fmulm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4831022\s*fsubm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4831002\s*faddm\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830a22\s*fnmuld\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830ae2\s*fnmscd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830ac2\s*fnmacd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830aa2\s*fmscd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830a82\s*fmacd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830b02\s*fdivd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830a02\s*fmuld\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830822\s*fsubd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830802\s*faddd\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830222\s*fnmuls\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f48302e2\s*fnmscs\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f48302c2\s*fnmacs\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f48302a2\s*fmscs\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830282\s*fmacs\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830302\s*fdivs\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830202\s*fmuls\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830022\s*fsubs\s*fr2,\s*fr3,\s*fr4
|
||||
\s*[0-9a-f]*:\s*f4830002\s*fadds\s*fr2,\s*fr3,\s*fr4
|
|
@ -0,0 +1,48 @@
|
|||
.text
|
||||
L1:
|
||||
fstms vr3-vr4, (r4)
|
||||
fldms vr3-vr4, (r4)
|
||||
fstmm vr3-vr4, (r4)
|
||||
fldmm vr3-vr4, (r4)
|
||||
fstmd vr3-vr4, (r4)
|
||||
fldmd vr3-vr4, (r4)
|
||||
fstm vr0, (r2, 0)
|
||||
fldm vr0, (r2, 0)
|
||||
fstm vr0, (r2, 8)
|
||||
fldm vr0, (r2, 8)
|
||||
fstd vr0, (r2, 4)
|
||||
fldd vr0, (r2, 4)
|
||||
fsts vr0, (r2, 4)
|
||||
flds vr0, (r2, 4)
|
||||
fstrm vr2, (r2, r4 << 0)
|
||||
fstrm vr2, (r2, r4 << 2)
|
||||
fstrd vr2, (r2, r4 << 0)
|
||||
fstrd vr2, (r2, r4 << 2)
|
||||
fstrs vr2, (r2, r4 << 0)
|
||||
fstrs vr2, (r2, r4 << 2)
|
||||
fnmulm vr2, vr3, vr4
|
||||
fnmscm vr2, vr3, vr4
|
||||
fnmacm vr2, vr3, vr4
|
||||
fmscm vr2, vr3, vr4
|
||||
fmacm vr2, vr3, vr4
|
||||
fmulm vr2, vr3, vr4
|
||||
fsubm vr2, vr3, vr4
|
||||
faddm vr2, vr3, vr4
|
||||
fnmuld vr2, vr3, vr4
|
||||
fnmscd vr2, vr3, vr4
|
||||
fnmacd vr2, vr3, vr4
|
||||
fmscd vr2, vr3, vr4
|
||||
fmacd vr2, vr3, vr4
|
||||
fdivd vr2, vr3, vr4
|
||||
fmuld vr2, vr3, vr4
|
||||
fsubd vr2, vr3, vr4
|
||||
faddd vr2, vr3, vr4
|
||||
fnmuls vr2, vr3, vr4
|
||||
fnmscs vr2, vr3, vr4
|
||||
fnmacs vr2, vr3, vr4
|
||||
fmscs vr2, vr3, vr4
|
||||
fmacs vr2, vr3, vr4
|
||||
fdivs vr2, vr3, vr4
|
||||
fmuls vr2, vr3, vr4
|
||||
fsubs vr2, vr3, vr4
|
||||
fadds vr2, vr3, vr4
|
|
@ -0,0 +1,20 @@
|
|||
# name: csky - v2-float-part2
|
||||
#as: -mcpu=ck807f -W
|
||||
#objdump: -D
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*f4003882\s*flrws\s*fr2,\s*3\.140000
|
||||
\s*[0-9a-f]*:\s*f50b1c02\s*fmovis\s*fr2,\s*1\.500000
|
||||
\s*[0-9a-f]*:\s*f51b1c02\s*fmovis\s*fr2,\s*-1\.500000
|
||||
\s*[0-9a-f]*:\s*f48a1c02\s*fmovis\s*fr2,\s*2\.500000
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*f4003952\s*flrwd\s*fr2,\s*3\.140000
|
||||
\s*[0-9a-f]*:\s*f48a1e02\s*fmovid\s*fr2,\s*2\.500000
|
||||
\s*[0-9a-f]*:\s*f49a1e02\s*fmovid\s*fr2,\s*-2\.500000
|
||||
\s*[0-9a-f]*:\s*f51b1e02\s*fmovid\s*fr2,\s*-1\.500000
|
||||
\s*[0-9a-f]*:\s*4048f5c3\s*\.long\s*0x4048f5c3
|
||||
\s*[0-9a-f]*:\s*51eb851f\s*\.long\s*0x51eb851f
|
||||
\s*[0-9a-f]*:\s*40091eb8\s*\.long\s*0x40091eb8
|
|
@ -0,0 +1,10 @@
|
|||
only_in_803_807:
|
||||
flrws fr2, 3.14
|
||||
fmovis fr2, 1.5
|
||||
fmovis fr2, -1.5
|
||||
fmovis fr2, 2.5
|
||||
only_in_807:
|
||||
flrwd fr2, 3.14
|
||||
fmovid fr2, 2.5
|
||||
fmovid fr2, -2.5
|
||||
fmovid fr2, -1.5
|
|
@ -0,0 +1,10 @@
|
|||
# name: csky - v2 TLS GD
|
||||
#as: -mcpu=ck810 -W
|
||||
#objdump: -Dr
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*R_CKCORE_TLS_GD32\s*xxx.*
|
||||
\s*[0-9a-f]*:\s*R_CKCORE_PLT32\s*__tls_get_addr
|
|
@ -0,0 +1,7 @@
|
|||
.LTLS0:
|
||||
lrw a0, xxx@TLSGD32
|
||||
grs a2, .LTLS0
|
||||
addu a0, a0, a2
|
||||
lrw a3, __tls_get_addr@PLT
|
||||
ldr.w a3, (gb, a3 << 0)
|
||||
jsr a3
|
|
@ -0,0 +1,9 @@
|
|||
# name: csky - v2 TLS IE
|
||||
#as: -mcpu=ck810 -W
|
||||
#objdump: -Dr
|
||||
|
||||
.*: +file format .*csky.*
|
||||
|
||||
Disassembly of section \.text:
|
||||
#...
|
||||
\s*[0-9a-f]*:\s*R_CKCORE_TLS_IE32\s*xxx.*
|
|
@ -0,0 +1,7 @@
|
|||
.LTLS0:
|
||||
lrw a3, xxx@GOTTPOFF
|
||||
grs a2, .LTLS0
|
||||
addu a3, a3, a2
|
||||
ld.w a3, (a3, 0)
|
||||
mov a2, tls
|
||||
str.w a0, (a2, a3 << 0)
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue