Prevent writes to R15 via LDR or LDM from changing the ARM/Thumb state in pre-v5 architectures.
PR sim/8388 * armemu.c (WriteR15Load): New function. Determines if the state can be changed upon a write to R15. (LoadMult): Use WriteR15Load. * armemu.h (WRITEDESTB): Use WriteR15Load.
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@ -1,3 +1,11 @@
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2014-03-14 David McQuillan <dmcq@tao-group.com>
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PR sim/8388
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* armemu.c (WriteR15Load): New function. Determines if the state
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can be changed upon a write to R15.
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(LoadMult): Use WriteR15Load.
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* armemu.h (WRITEDESTB): Use WriteR15Load.
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2014-03-10 Mike Frysinger <vapier@gentoo.org>
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* wrapper.c (sim_do_command): Add const to cmd.
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@ -1,7 +1,7 @@
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/* armemu.c -- Main instruction emulation: ARM7 Instruction Emulator.
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Copyright (C) 1994 Advanced RISC Machines Ltd.
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Modifications to add arch. v4 support by <jsmith@cygnus.com>.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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@ -25,6 +25,7 @@ static ARMword GetDPSRegRHS (ARMul_State *, ARMword);
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static void WriteR15 (ARMul_State *, ARMword);
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static void WriteSR15 (ARMul_State *, ARMword);
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static void WriteR15Branch (ARMul_State *, ARMword);
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static void WriteR15Load (ARMul_State *, ARMword);
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static ARMword GetLSRegRHS (ARMul_State *, ARMword);
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static ARMword GetLS7RHS (ARMul_State *, ARMword);
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static unsigned LoadWord (ARMul_State *, ARMword, ARMword);
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@ -4212,6 +4213,17 @@ WriteR15Branch (ARMul_State * state, ARMword src)
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#endif
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}
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/* Before ARM_v5 LDR and LDM of pc did not change mode. */
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static void
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WriteR15Load (ARMul_State * state, ARMword src)
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{
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if (state->is_v5)
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WriteR15Branch (state, src);
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else
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WriteR15 (state, src);
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}
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/* This routine evaluates most Load and Store register RHS's. It is
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intended to be called from the macro LSRegRHS, which filters the
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common case of an unshifted register with in line code. */
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@ -4724,7 +4736,7 @@ LoadMult (ARMul_State * state, ARMword instr, ARMword address, ARMword WBBase)
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if (BIT (15) && !state->Aborted)
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/* PC is in the reg list. */
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WriteR15Branch (state, PC);
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WriteR15Load (state, PC);
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/* To write back the final register. */
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ARMul_Icycles (state, 1, 0L);
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@ -402,7 +402,7 @@ extern ARMword isize;
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do \
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{ \
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if (DESTReg == 15) \
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WriteR15Branch (state, d); \
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WriteR15Load (state, d); \
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else \
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DEST = d; \
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} \
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