gas: blackfin: catch invalid register combinations with SEARCH/BITMUX

The destination registers for SEARCH cannot be the same.  Same rule
for the source registers for BITMUX.

Signed-off-by: Mike Frsyinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2011-03-24 04:20:10 +00:00
parent b16a1f4c4f
commit ba48c47be5
5 changed files with 22 additions and 0 deletions

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@ -1,3 +1,9 @@
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (SEARCH): Return yyerror when dest reg $2 is
the same as dest reg $4.
(BITMUX): Return yyerror when dest reg $3 is the same as dest reg $5.
2011-03-23 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u,

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@ -868,6 +868,9 @@ asm_1:
}
| LPAREN REG COMMA REG RPAREN ASSIGN SEARCH REG LPAREN searchmod RPAREN
{
if (REG_SAME ($2, $4))
return yyerror ("Illegal dest register combination");
if (IS_DREG ($2) && IS_DREG ($4) && IS_DREG ($8))
{
notethat ("dsp32alu: (dregs , dregs ) = SEARCH dregs (searchmod)\n");
@ -2388,6 +2391,9 @@ asm_1:
| BITMUX LPAREN REG COMMA REG COMMA REG_A RPAREN asr_asl
{
if (REG_SAME ($3, $5))
return yyerror ("Illegal source register combination");
if (IS_DREG ($3) && IS_DREG ($5) && !IS_A1 ($7))
{
notethat ("dsp32shift: BITMUX (dregs , dregs , A0) (ASR)\n");

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@ -1,3 +1,8 @@
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* gas/bfin/expected_errors.s: Add invalid SEARCH/BITMUX insns.
* gas/bfin/expected_errors.l: Add expected errors.
2011-03-18 Alan Modra <amodra@gmail.com>
* gas/elf/bad-size.err: Adjust expected error.

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@ -90,3 +90,5 @@
.*:113: Error: Preg expected in address. Input text was \).
.*:114: Error: Preg expected in address. Input text was \).
.*:115: Error: Dreg expected for destination operand. Input text was \).
.*:117: Error: Illegal dest register combination. Input text was \).
.*:118: Error: Illegal source register combination. Input text was \).

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@ -113,3 +113,6 @@
R2 = B [ R0 ++ ] (X);
R2 = B [ I0 ++ ] (X);
P2 = B [ P0 ++ ] (X);
(R3, R3) = SEARCH R0 (GE);
BITMUX (R4, R4, A0) (ASR);