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Reduce excessive .eh_frame alignment for powerpc 

PowerPC64 .cfi directives use DW_EH_PE_sdata4 encoding for .eh_frame,
so there is no real reason why .eh_frame should be 8 byte aligned.

gas/
	* config/tc-ppc.h (EH_FRAME_ALIGNMENT): Define.
ld/
	* testsuite/ld-powerpc/tlsopt5.wf: Update for reduced alignment.
This commit is contained in:
Alan Modra 2017-09-21 09:54:04 +09:30
parent 1e5b66ed42
commit ba52cbb9d0
4 changed files with 11 additions and 6 deletions
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4
gas/ChangeLog
View File

@ -1,3 +1,7 @@
2017-09-21 Alan Modra <amodra@gmail.com>
* config/tc-ppc.h (EH_FRAME_ALIGNMENT): Define.
2017-09-14 Alan Modra <amodra@gmail.com>
PR 22127

1
gas/config/tc-ppc.h
View File

@ -325,3 +325,4 @@ extern int ppc_dwarf2_line_min_insn_length;
#define DWARF2_LINE_MIN_INSN_LENGTH ppc_dwarf2_line_min_insn_length
#define DWARF2_DEFAULT_RETURN_COLUMN 0x41
#define DWARF2_CIE_DATA_ALIGNMENT ppc_cie_data_alignment
#define EH_FRAME_ALIGNMENT 2

4
ld/ChangeLog
View File

@ -1,3 +1,7 @@
2017-09-21 Alan Modra <amodra@gmail.com>
* testsuite/ld-powerpc/tlsopt5.wf: Update for reduced alignment.
2017-09-19 Maciej W. Rozycki <macro@imgtec.com>
* configure.tgt <mips64el-*-openbsd*, mips64-*-openbsd*>: New

8
ld/testsuite/ld-powerpc/tlsopt5.wf
View File

@ -16,17 +16,13 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 16 to .*
DW_CFA_restore_extended: r65
0+2c 0+18 0+30 FDE cie=0+ pc=.*
0+2c 0+14 0+30 FDE cie=0+ pc=.*
DW_CFA_advance_loc: 4 to .*
DW_CFA_register: r65 in r0
DW_CFA_advance_loc: 28 to .*
DW_CFA_restore_extended: r65
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
0+48 0+10 0+4c FDE cie=0+ pc=.*
0+44 0+10 0+48 FDE cie=0+ pc=.*
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop