PR gas/15212

* doc/c-arc.texi (ARC Directives): Use @code instead of @bullte
	for table format.
	* doc/c-arm.texi (ARM-Instruction-Set): Likewise.  Also add text
	to the @item directives.
	(ARM-Neon-Alignment): Move to correct place in the document.
	* doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
	formatting.
	* doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
	@smallexample.
This commit is contained in:
Nick Clifton 2013-03-14 10:00:46 +00:00
parent e2be70a0e1
commit ba724cfc0c
5 changed files with 76 additions and 57 deletions

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@ -1,3 +1,16 @@
2013-03-14 Nick Clifton <nickc@redhat.com>
PR gas/15212
* doc/c-arc.texi (ARC Directives): Use @code instead of @bullte
for table format.
* doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
to the @item directives.
(ARM-Neon-Alignment): Move to correct place in the document.
* doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
formatting.
* doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
@smallexample.
2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
* config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'

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@ -1,4 +1,4 @@
@c Copyright 2000, 2001, 2005, 2006, 2007, 2011 Free Software Foundation, Inc.
@c Copyright 2000-2013 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ -220,7 +220,7 @@ The extension instructions are not macros. The assembler creates
encodings for use of these instructions according to the specification
by the user. The parameters are:
@table @bullet
@table @code
@item @var{name}
Name of the extension instruction

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@ -1,5 +1,4 @@
@c Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
@c 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
@c Copyright 1996-2013 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ -390,29 +389,29 @@ ARM and THUMB instructions had their own, separate syntaxes. The new,
@code{unified} syntax, which can be selected via the @code{.syntax}
directive, and has the following main features:
@table @bullet
@item
@table @code
@item 1
Immediate operands do not require a @code{#} prefix.
@item
@item 2
The @code{IT} instruction may appear, and if it does it is validated
against subsequent conditional affixes. In ARM mode it does not
generate machine code, in THUMB mode it does.
@item
@item 3
For ARM instructions the conditional affixes always appear at the end
of the instruction. For THUMB instructions conditional affixes can be
used, but only inside the scope of an @code{IT} instruction.
@item
@item 4
All of the instructions new to the V6T2 architecture (and later) are
available. (Only a few such instructions can be written in the
@code{divided} syntax).
@item
@item 5
The @code{.N} and @code{.W} suffixes are recognized and honored.
@item
@item 6
All instructions set the flags if and only if they have an @code{s}
affix.
@end table
@ -451,28 +450,6 @@ Either @samp{#} or @samp{$} can be used to indicate immediate operands.
@cindex register names, ARM
*TODO* Explain about ARM register naming, and the predefined names.
@node ARM-Neon-Alignment
@subsection NEON Alignment Specifiers
@cindex alignment for NEON instructions
Some NEON load/store instructions allow an optional address
alignment qualifier.
The ARM documentation specifies that this is indicated by
@samp{@@ @var{align}}. However GAS already interprets
the @samp{@@} character as a "line comment" start,
so @samp{: @var{align}} is used instead. For example:
@smallexample
vld1.8 @{q0@}, [r0, :128]
@end smallexample
@node ARM Floating Point
@section Floating Point
@cindex floating point, ARM (@sc{ieee})
@cindex ARM floating point (@sc{ieee})
The ARM family uses @sc{ieee} floating-point numbers.
@node ARM-Relocations
@subsection ARM relocation generation
@ -519,6 +496,28 @@ respectively. For example to load the 32-bit address of foo into r0:
MOVT r0, #:upper16:foo
@end smallexample
@node ARM-Neon-Alignment
@subsection NEON Alignment Specifiers
@cindex alignment for NEON instructions
Some NEON load/store instructions allow an optional address
alignment qualifier.
The ARM documentation specifies that this is indicated by
@samp{@@ @var{align}}. However GAS already interprets
the @samp{@@} character as a "line comment" start,
so @samp{: @var{align}} is used instead. For example:
@smallexample
vld1.8 @{q0@}, [r0, :128]
@end smallexample
@node ARM Floating Point
@section Floating Point
@cindex floating point, ARM (@sc{ieee})
@cindex ARM floating point (@sc{ieee})
The ARM family uses @sc{ieee} floating-point numbers.
@node ARM Directives
@section ARM Machine Directives

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@ -1,4 +1,4 @@
@c Copyright 2007, 2008, 2011 Free Software Foundation, Inc.
@c Copyright 2007-2013 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ -44,26 +44,33 @@ Operand expression type qualifier is an optional field in the instruction operan
CR16 target operand qualifiers and its size (in bits):
@table @samp
@item Immediate Operand
- s ---- 4 bits
@item
- m ---- 16 bits, for movb and movw instructions.
@item
- m ---- 20 bits, movd instructions.
@item
- l ---- 32 bits
@item Immediate Operand: s
4 bits.
@item Absolute Operand
- s ---- Illegal specifier for this operand.
@item
- m ---- 20 bits, movd instructions.
@item Immediate Operand: m
16 bits, for movb and movw instructions.
@item Immediate Operand: m
20 bits, movd instructions.
@item Immediate Operand: l
32 bits.
@item Absolute Operand: s
Illegal specifier for this operand.
@item Absolute Operand: m
20 bits, movd instructions.
@item Displacement Operand: s
8 bits.
@item Displacement Operand: m
16 bits.
@item Displacement Operand: l
24 bits.
@item Displacement Operand
- s ---- 8 bits
@item
- m ---- 16 bits
@item
- l ---- 24 bits
@end table
For example:

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@ -1,4 +1,4 @@
@c Copyright 2000, 2002, 2003, 2006, 2011 Free Software Foundation, Inc.
@c Copyright 2000-2013 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c TI TMS320C54X description by Timothy Wall, twall@cygnus.com
@ -109,7 +109,7 @@ In this example, x is replaced with SYM2; SYM2 is replaced with SYM1, and SYM1
is replaced with x. At this point, x has already been encountered
and the substitution stops.
@smallexample @code
@smallexample
.asg "x",SYM1
.asg "SYM1",SYM2
.asg "SYM2",x
@ -126,14 +126,14 @@ Substitution may be forced in situations where replacement might be
ambiguous by placing colons on either side of the subsym. The following
code:
@smallexample @code
@smallexample
.eval "10",x
LAB:X: add #x, a
@end smallexample
When assembled becomes:
@smallexample @code
@smallexample
LAB10 add #10, a
@end smallexample
@ -309,7 +309,7 @@ The @code{LDX} pseudo-op is provided for loading the extended addressing bits
of a label or address. For example, if an address @code{_label} resides
in extended program memory, the value of @code{_label} may be loaded as
follows:
@smallexample @code
@smallexample
ldx #_label,16,a ; loads extended bits of _label
or #_label,a ; loads lower 16 bits of _label
bacc a ; full address is in accumulator A