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RISC-V: Add riscv-*-* configure support, and minor cleanup. 

bfd/
	* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
	(riscv64*-*-*): Likewise.
	(riscv-*-*): Add as an alias for riscv32*-*-*.

	ld/
	* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
This commit is contained in:
Jim Wilson 2018-07-05 17:49:11 -07:00
parent 01b5d12f28
commit bb11866d6a
4 changed files with 14 additions and 3 deletions
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6
bfd/ChangeLog
View File

@ -1,3 +1,9 @@
2018-07-05 Jim Wilson <jimw@sifive.com>
* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
(riscv64*-*-*): Likewise.
(riscv-*-*): Add as an alias for riscv32*-*-*.
2018-07-05 H.J. Lu <hongjiu.lu@intel.com>
PR ld/23372

4
bfd/config.bfd
View File

@ -1174,12 +1174,12 @@ case "${targ}" in
;;
#ifdef BFD64
riscv32-*-*)
riscv-*-* | riscv32*-*-*)
targ_defvec=riscv_elf32_vec
targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
want64=true
;;
riscv64-*-*)
riscv64*-*-*)
targ_defvec=riscv_elf64_vec
targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
want64=true

4
ld/ChangeLog
View File

@ -1,3 +1,7 @@
2018-07-05 Jim Wilson <jimw@sifive.com>
* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
2018-07-05 Maciej W. Rozycki <macro@mips.com>
* testsuite/ld-mips-elf/mips-elf.exp: Replace remaining calls to

3
ld/configure.tgt
View File

@ -632,7 +632,8 @@ pru*-*-*) targ_emul=pruelf ;;
riscv32*-*-linux*) targ_emul=elf32lriscv
targ_extra_emuls="elf32lriscv_ilp32f elf32lriscv_ilp32 elf64lriscv elf64lriscv_lp64f elf64lriscv_lp64"
targ_extra_libpath=$targ_extra_emuls ;;
riscv32*-*-*) targ_emul=elf32lriscv
riscv-*-* | riscv32*-*-*)
targ_emul=elf32lriscv
targ_extra_emuls="elf64lriscv"
targ_extra_libpath=$targ_extra_emuls ;;
riscv64*-*-linux*) targ_emul=elf64lriscv