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sim: trace: add common macros for logging info 

The Blackfin port had some TRACE_xxx macros for easily logging trace data.
Use these as a base for common ones that have a simple form and match the
existing sets of helper macros.
This commit is contained in:
Mike Frysinger 2015-06-11 18:28:25 +08:00
parent 29bc024d07
commit bb11f3ed2b
8 changed files with 74 additions and 37 deletions
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19
sim/bfin/ChangeLog
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@ -1,3 +1,22 @@
2015-06-12 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (hwloop_get_next_pc): Change TRACE_BRANCH to
BFIN_TRACE_BRANCH.
(decode_ProgCtrl_0, decode_BRCC_0, decode_UJUMP_0, decode_CALLa_0):
Likewise.
* bfin-sim.h (__PUT_MEM, __GET_MEM): Change TRACE_CORE to
BFIN_TRACE_CORE.
* dv-bfin_cec.c (_cec_raise, cec_latch, cec_return): Change
TRACE_BRANCH to BFIN_TRACE_BRANCH.
* interp.c (syscall_read_mem, syscall_write_mem): Change MAYBE_TRACE
to TRACE_CORE.
* sim-main.h (MAYBE_TRACE, TRACE_INSN, TRACE_DECODE, TRACE_EXTRACT,
TRACE_SYSCALL, TRACE_EVENTS): Delete.
(TRACE_CORE): Rename to ...
(BFIN_TRACE_CORE): ... this. Change MAYBE_TRACE to TRACE_CORE.
(TRACE_BRANCH): Rename to ...
(BFIN_TRACE_BRANCH): ... this. Change MAYBE_TRACE to TRACE_BRANCH.
2015-04-24 David Binderman <dcb314@hotmail.com>
Nick Clifton <nickc@redhat.com>

20
sim/bfin/bfin-sim.c
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@ -1741,7 +1741,7 @@ hwloop_get_next_pc (SIM_CPU *cpu, bu32 pc, bu32 insn_len)
for (i = 1; i >= 0; --i)
if (LCREG (i) > 1 && pc == LBREG (i))
{
TRACE_BRANCH (cpu, pc, LTREG (i), i, "Hardware loop %i", i);
BFIN_TRACE_BRANCH (cpu, pc, LTREG (i), i, "Hardware loop %i", i);
return LTREG (i);
}
@ -1773,7 +1773,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
TRACE_BRANCH (cpu, pc, newpc, -1, "RTS");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "RTS");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
CYCLE_DELAY = 5;
@ -1893,7 +1893,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (Preg)");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (Preg)");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
PROFILE_BRANCH_TAKEN (cpu);
@ -1907,7 +1907,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (Preg)");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (Preg)");
/* If we're at the end of a hardware loop, RETS is going to be
the top of the loop rather than the next instruction. */
SET_RETSREG (hwloop_get_next_pc (cpu, pc, 2));
@ -1924,7 +1924,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (PC + Preg)");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "CALL (PC + Preg)");
SET_RETSREG (hwloop_get_next_pc (cpu, pc, 2));
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
@ -1939,7 +1939,7 @@ decode_ProgCtrl_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
IFETCH_CHECK (newpc);
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (PC + Preg)");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP (PC + Preg)");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
PROFILE_BRANCH_TAKEN (cpu);
@ -2444,7 +2444,7 @@ decode_BRCC_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
if (cond)
{
bu32 newpc = pc + pcrel;
TRACE_BRANCH (cpu, pc, newpc, -1, "Conditional JUMP");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "Conditional JUMP");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
PROFILE_BRANCH_TAKEN (cpu);
@ -2477,7 +2477,7 @@ decode_UJUMP_0 (SIM_CPU *cpu, bu16 iw0, bu32 pc)
if (PARALLEL_GROUP != BFIN_PARALLEL_NONE)
illegal_instruction_combination (cpu);
TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.S");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.S");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;
@ -3619,11 +3619,11 @@ decode_CALLa_0 (SIM_CPU *cpu, bu16 iw0, bu16 iw1, bu32 pc)
if (S == 1)
{
TRACE_BRANCH (cpu, pc, newpc, -1, "CALL");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "CALL");
SET_RETSREG (hwloop_get_next_pc (cpu, pc, 4));
}
else
TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.L");
BFIN_TRACE_BRANCH (cpu, pc, newpc, -1, "JUMP.L");
SET_PCREG (newpc);
BFIN_CPU_STATE.did_jump = true;

4
sim/bfin/bfin-sim.h
View File

@ -318,7 +318,7 @@ do { \
(void *)&__v, __taddr, __bytes); \
if (__cnt != __bytes) \
mmu_process_fault (cpu, __taddr, true, false, false, true); \
TRACE_CORE (cpu, __taddr, __bytes, write_map, __v); \
BFIN_TRACE_CORE (cpu, __taddr, __bytes, write_map, __v); \
} while (0)
#define PUT_BYTE(taddr, v) __PUT_MEM(taddr, v, 8)
#define PUT_WORD(taddr, v) __PUT_MEM(taddr, v, 16)
@ -334,7 +334,7 @@ do { \
(void *)&__ret, __taddr, __bytes); \
if (__cnt != __bytes) \
mmu_process_fault (cpu, __taddr, false, inst, false, true); \
TRACE_CORE (cpu, __taddr, __bytes, map, __ret); \
BFIN_TRACE_CORE (cpu, __taddr, __bytes, map, __ret); \
__ret; \
})
#define _GET_MEM(taddr, size) __GET_MEM(taddr, size, false, read_map)

10
sim/bfin/dv-bfin_cec.c
View File

@ -599,7 +599,7 @@ _cec_raise (SIM_CPU *cpu, struct bfin_cec *cec, int ivg)
else
SET_PCREG (cec_get_evt (cpu, ivg));
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC (to EVT%i):", ivg);
BFIN_TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC (to EVT%i):", ivg);
BFIN_CPU_STATE.did_jump = true;
/* Enable the global interrupt mask upon interrupt entry. */
@ -648,7 +648,7 @@ cec_latch (SIM_CPU *cpu, int ivg)
{
bu32 oldpc = PCREG;
SET_PCREG (cec_read_ret_reg (cpu, ivg));
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC");
BFIN_TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC");
return;
}
@ -679,7 +679,7 @@ cec_return (SIM_CPU *cpu, int ivg)
if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
{
SET_PCREG (cec_read_ret_reg (cpu, ivg));
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC");
BFIN_TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC");
return;
}
@ -744,9 +744,9 @@ cec_return (SIM_CPU *cpu, int ivg)
/* XXX: Delayed clear shows bad PCREG register trace above ? */
SET_PCREG (newpc & ~1);
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC (from EVT%i)", ivg);
BFIN_TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC (from EVT%i)", ivg);
/* Update ipend after the TRACE_BRANCH so dv-bfin_trace
/* Update ipend after the BFIN_TRACE_BRANCH so dv-bfin_trace
knows current CEC state wrt overflow. */
if (!snen)
cec->ipend &= ~(1 << ivg);

4
sim/bfin/interp.c
View File

@ -132,7 +132,7 @@ syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
SIM_DESC sd = (SIM_DESC) sc->p1;
SIM_CPU *cpu = (SIM_CPU *) sc->p2;
MAYBE_TRACE (CORE, cpu, "DBUS FETCH (syscall) %i bytes @ 0x%08lx", bytes, taddr);
TRACE_CORE (cpu, "DBUS FETCH (syscall) %i bytes @ 0x%08lx", bytes, taddr);
return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
}
@ -144,7 +144,7 @@ syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
SIM_DESC sd = (SIM_DESC) sc->p1;
SIM_CPU *cpu = (SIM_CPU *) sc->p2;
MAYBE_TRACE (CORE, cpu, "DBUS STORE (syscall) %i bytes @ 0x%08lx", bytes, taddr);
TRACE_CORE (cpu, "DBUS STORE (syscall) %i bytes @ 0x%08lx", bytes, taddr);
return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
}

26
sim/bfin/sim-main.h
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@ -65,28 +65,18 @@ struct sim_state {
#define CLAMP(a, b, c) MIN (MAX (a, b), c)
#define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
#define MAYBE_TRACE(type, cpu, fmt, ...) \
/* TODO: Move all this trace logic to the common code. */
#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \
do { \
if (TRACE_##type##_P (cpu)) \
trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
fmt, ## __VA_ARGS__); \
} while (0)
#define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
#define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
#define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
#define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
#define TRACE_CORE(cpu, addr, size, map, val) \
do { \
MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
map == exec_map ? 'I' : 'D', \
map == write_map ? "STORE" : "FETCH", \
size, addr, size * 2, val); \
TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
map == exec_map ? 'I' : 'D', \
map == write_map ? "STORE" : "FETCH", \
size, addr, size * 2, val); \
PROFILE_COUNT_CORE (cpu, addr, size, map); \
} while (0)
#define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
#define TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
do { \
MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
} while (0)

7
sim/common/ChangeLog
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@ -1,3 +1,10 @@
2015-06-12 Mike Frysinger <vapier@gentoo.org>
* sim-trace.h (TRACE, TRACE_INSN, TRACE_DECODE, TRACE_EXTRACT,
TRACE_LINENUM, TRACE_MEMORY, TRACE_MODEL, TRACE_ALU, TRACE_CORE,
TRACE_EVENTS, TRACE_FPU, TRACE_VPU, TRACE_BRANCH, TRACE_SYSCALL,
TRACE_DEBUG): Define.
2015-06-12 Mike Frysinger <vapier@gentoo.org>
* sim-module.c (modules): Change WITH_TRACE to WITH_TRACE_ANY_P.

21
sim/common/sim-trace.h
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@ -236,6 +236,27 @@ typedef struct _trace_data {
#define TRACE_BRANCH_P(cpu) TRACE_P (cpu, TRACE_BRANCH_IDX)
#define TRACE_SYSCALL_P(cpu) TRACE_P (cpu, TRACE_SYSCALL_IDX)
#define TRACE_DEBUG_P(cpu) TRACE_P (cpu, TRACE_DEBUG_IDX)
/* Helper functions for printing messages. */
#define TRACE(cpu, idx, fmt, args...) \
do { \
if (TRACE_P (cpu, idx)) \
trace_generic (CPU_STATE (cpu), cpu, idx, fmt, ## args); \
} while (0)
#define TRACE_INSN(cpu, fmt, args...) TRACE (cpu, TRACE_INSN_IDX, fmt, ## args)
#define TRACE_DECODE(cpu, fmt, args...) TRACE (cpu, TRACE_DECODE_IDX, fmt, ## args)
#define TRACE_EXTRACT(cpu, fmt, args...) TRACE (cpu, TRACE_EXTRACT_IDX, fmt, ## args)
#define TRACE_LINENUM(cpu, fmt, args...) TRACE (cpu, TRACE_LINENUM_IDX, fmt, ## args)
#define TRACE_MEMORY(cpu, fmt, args...) TRACE (cpu, TRACE_MEMORY_IDX, fmt, ## args)
#define TRACE_MODEL(cpu, fmt, args...) TRACE (cpu, TRACE_MODEL_IDX, fmt, ## args)
#define TRACE_ALU(cpu, fmt, args...) TRACE (cpu, TRACE_ALU_IDX, fmt, ## args)
#define TRACE_CORE(cpu, fmt, args...) TRACE (cpu, TRACE_CORE_IDX, fmt, ## args)
#define TRACE_EVENTS(cpu, fmt, args...) TRACE (cpu, TRACE_EVENTS_IDX, fmt, ## args)
#define TRACE_FPU(cpu, fmt, args...) TRACE (cpu, TRACE_FPU_IDX, fmt, ## args)
#define TRACE_VPU(cpu, fmt, args...) TRACE (cpu, TRACE_VPU_IDX, fmt, ## args)
#define TRACE_BRANCH(cpu, fmt, args...) TRACE (cpu, TRACE_BRANCH_IDX, fmt, ## args)
#define TRACE_SYSCALL(cpu, fmt, args...) TRACE (cpu, TRACE_SYSCALL_IDX, fmt, ## args)
#define TRACE_DEBUG(cpu, fmt, args...) TRACE (cpu, TRACE_DEBUG_IDX, fmt, ## args)
/* Tracing functions. */