include/
* opcode/tic6x-control-registers.h (tscl): Now read_write. gas/testsuite/ * gas/tic6x/insns-bad-1.s: Remove test for readonly tscl. * gas/tic6x/insns-bad-1.l: Likewise. * gas/tic6x/insns-c674x.d: Add test for writeable tscl. * gas/tic6x/insns-c674x.s: Likewise.
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@ -1,3 +1,10 @@
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2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
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* gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
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* gas/tic6x/insns-bad-1.l: Likewise.
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* gas/tic6x/insns-c674x.d: Add test for writeable tscl.
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* gas/tic6x/insns-c674x.s: Likewise.
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2010-09-29 Alan Modra <amodra@gmail.com>
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* expr.c (expr): Correct returned segment value.
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@ -867,7 +867,6 @@
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[^:]*:854: Error: operand 1 of 'mvc' is write-only
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[^:]*:855: Error: operand 2 of 'mvc' is read-only
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[^:]*:856: Error: operand 2 of 'mvc' is read-only
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[^:]*:857: Error: operand 2 of 'mvc' is read-only
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[^:]*:858: Error: 'mv' instruction not supported on this functional unit
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[^:]*:859: Error: too many operands to 'mv'
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[^:]*:860: Error: operand 2 of 'mv' on wrong side
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@ -854,7 +854,7 @@ f:
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mvc .S2 isr,b0
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mvc .S2 b0,pce1
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mvc .S2 b0,tsch
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mvc .S2 b0,tscl
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mv .M1 a1,a2
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mv .L1 a1,a2,a3
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mv .L1 a1,b2
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@ -902,8 +902,9 @@ Disassembly of section \.text:
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[0-9a-f]+[048c] <[^>]*> 0ac403a2[ \t]+mvc \.S2 b17,ssr
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[0-9a-f]+[048c] <[^>]*> 092c03e2[ \t]+mvc \.S2 tsch,b18
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[0-9a-f]+[048c] <[^>]*> 09a803e2[ \t]+mvc \.S2 tscl,b19
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[0-9a-f]+[048c] <[^>]*> 0a6803e2[ \t]+mvc \.S2 tsr,b20
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[0-9a-f]+[048c] <[^>]*> 0d5403a2[ \t]+mvc \.S2 b21,tsr
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[0-9a-f]+[048c] <[^>]*> 055003a2[ \t]+mvc \.S2 b20,tscl
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[0-9a-f]+[048c] <[^>]*> 0ae803e2[ \t]+mvc \.S2 tsr,b21
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[0-9a-f]+[048c] <[^>]*> 0d5803a2[ \t]+mvc \.S2 b22,tsr
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[0-9a-f]+[048c] <[^>]*> 0001e3e2[ \t]+mvc \.S2 amr,b0
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[0-9a-f]+[048c] <[^>]*> 0005e3e2[ \t]+mvc \.S2 csr,b0
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[0-9a-f]+[048c] <[^>]*> 0181e3a2[ \t]+mvc \.S2 b0,icr
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@ -1566,3 +1567,4 @@ Disassembly of section \.text:
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[0-9a-f]+[048c] <[^>]*> 74800042[ \t]+\[!b2\] mvk \.D2 0,b9
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[0-9a-f]+[048c] <[^>]*> c5000028[ \t]+\[a0\] mvk \.S1 0,a10
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[0-9a-f]+[048c] <[^>]*> 0580002a[ \t]+mvk \.S2 0,b11
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[ \t]*\.\.\.
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@ -899,8 +899,9 @@ f:
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mvc .S2 b17,ssr
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mvc .S2 tsch,b18
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mvc .S2 tscl,b19
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mvc .S2 tsr,b20
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mvc .S2 b21,tsr
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mvc .S2 b20,tscl
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mvc .S2 tsr,b21
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mvc .S2 b22,tsr
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.word 0x0001e3e2
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.word 0x0005e3e2
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.word 0x0181e3a2
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@ -1,3 +1,7 @@
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2010-09-29 Bernd Schmidt <bernds@codesourcery.com>
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* opcode/tic6x-control-registers.h (tscl): Now read_write.
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2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
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@ -50,5 +50,7 @@ CTRL(rep, C64XP, read_write, 0xf, 0x1f)
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CTRL(rilc, C64XP, read_write, 0xe, 0x1f)
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CTRL(ssr, C64XP, read_write, 0x15, 0x1f)
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CTRL(tsch, C64XP, read, 0xb, 0x1f)
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CTRL(tscl, C64XP, read, 0xa, 0x1f)
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/* Contrary to Table 3-26 in SPRUFE8, this register is read-write, as
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documented in section 2.9.13. */
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CTRL(tscl, C64XP, read_write, 0xa, 0x1f)
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CTRL(tsr, C64XP, read_write, 0x1a, 0x1f)
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