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PR gas/11395 

* config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
        matcher to accept and unconditional 32-bit add instruction.
        (pa_build_unwind_subspace): Cope with error conditions not
        allowing the start symbol to be set.

        * gas/hppa/basic/add2.s: Add test of simple 32-bit instruction.
        * gas/hppa/basic/basic.exp (do_add2): Add grep for expected
        disassembly.
This commit is contained in:
Nick Clifton 2010-04-16 11:20:41 +00:00
parent 9b79b476a6
commit bb7835b8e5
5 changed files with 32 additions and 2 deletions
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8
gas/ChangeLog
View File

@ -1,3 +1,11 @@
2010-04-16 Nick Clifton <nickc@redhat.com>
PR gas/11395
* config/tc-hppa.c (pa_ip): Do not allow 64-bit add condition
matcher to accept and unconditional 32-bit add instruction.
(pa_build_unwind_subspace): Cope with error conditions not
allowing the start symbol to be set.
2010-04-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (arm_convert_symbolic_attribute): Add support for

10
gas/config/tc-hppa.c
View File

@ -3968,6 +3968,12 @@ pa_ip (char *str)
/* Handle an add condition. */
case 'A':
/* PR gas/11395
If we are looking for 64-bit add conditions and we
do not have the ",*" prefix, then we have no match. */
if (*s != ',')
break;
/* Fall through. */
case 'a':
cmpltr = 0;
flag = 0;
@ -5969,6 +5975,10 @@ pa_build_unwind_subspace (struct call_info *call_info)
!= (SEC_ALLOC | SEC_LOAD | SEC_READONLY))
return;
if (call_info->start_symbol == NULL)
/* This can happen if there were errors earlier on in the assembly. */
return;
/* Replace the start symbol with a local symbol that will be reduced
to a section offset. This avoids problems with weak functions with
multiple definitions, etc. */

9
gas/testsuite/ChangeLog
View File

@ -1,3 +1,10 @@
2010-04-16 Nick Clifton <nickc@redhat.com>
PR gas/11395
* gas/hppa/basic/add2.s: Add test of simple 32-bit instruction.
* gas/hppa/basic/basic.exp (do_add2): Add grep for expected
disassembly.
2010-04-15 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/attr-mcpu.d: Update for new attribute tag names.
@ -19,7 +26,7 @@
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-names.d: Add test to make sure all attribute names
* gas/arm/attr-names.d: Add test to make sure all attribute names
are recognised.
* gas/arm/attr-names.s: Likewise.

4
gas/testsuite/gas/hppa/basic/add2.s
View File

@ -90,3 +90,7 @@
add,tsv,dc,*vnz %r4,%r5,%r6
add,tsv,dc,*nsv %r4,%r5,%r6
add,tsv,dc,*ev %r4,%r5,%r6
;; PR gas/11395: Check for the correct assembly
;; of an unconditional 32-bit add instruction.
add %r1,%r1,%r1

3
gas/testsuite/gas/hppa/basic/basic.exp
View File

@ -674,6 +674,7 @@ proc do_add2 {} {
-re "^ +\[0-9\]+ 0134 08A4BF26\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0138 08A4DF26\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 013c 08A4FF26\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0140 08210601\[^\n\]*\n" { set x [expr $x+1] }
-re "\[^\n\]*\n" { }
timeout { perror "timeout\n"; break }
eof { break }
@ -685,7 +686,7 @@ proc do_add2 {} {
gas_finish
# Did we find what we were looking for? If not, flunk it.
if [expr $x==80] then { pass $testname } else { fail $testname }
if [expr $x==81] then { pass $testname } else { fail $testname }
}
proc do_sh1add {} {