bfd/
* elf32-spu.c (spu_elf_size_stubs): Split out section placement to.. (spu_elf_place_overlay_data): ..here. New function. * elf32-spu.h (spu_elf_place_overlay_data): Declare. ld/ * emultempl/spuelf.em (spu_before_allocation): Call spu_elf_place_overlay_data. ld/testsuite/ * ld-spu/icache1.d: Update for changed overlay manager placement. * ld-spu/ovl.d: Likewise. * ld-spu/ovl2.d: Likewise.
This commit is contained in:
Alan Modra
parent
011aa75f62
commit
bbb0fc04cc
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@ -1,3 +1,9 @@
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2009-05-14 Alan Modra <amodra@bigpond.net.au>
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* elf32-spu.c (spu_elf_size_stubs): Split out section placement to..
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(spu_elf_place_overlay_data): ..here. New function.
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* elf32-spu.h (spu_elf_place_overlay_data): Declare.
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2009-05-13 Andrew Jenner <andrew@codesourcery.com>
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* elf32-arm.c: Move sysdep.h to start of file.
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@ -1660,7 +1660,6 @@ spu_elf_size_stubs (struct bfd_link_info *info)
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flagword flags;
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unsigned int i;
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asection *stub;
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const char *ovout;
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if (!process_stubs (info, FALSE))
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return 0;
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@ -1691,7 +1690,6 @@ spu_elf_size_stubs (struct bfd_link_info *info)
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if (htab->params->ovly_flavour == ovly_soft_icache)
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/* Extra space for linked list entries. */
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stub->size += htab->stub_count[0] * 16;
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(*htab->params->place_spu_section) (stub, NULL, ".text");
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for (i = 0; i < htab->num_overlays; ++i)
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{
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@ -1704,7 +1702,6 @@ spu_elf_size_stubs (struct bfd_link_info *info)
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ovl_stub_size_log2 (htab->params)))
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return 0;
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stub->size = htab->stub_count[ovl] * ovl_stub_size (htab->params);
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(*htab->params->place_spu_section) (stub, osec, NULL);
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}
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flags = (SEC_ALLOC | SEC_LOAD
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@ -1728,7 +1725,6 @@ spu_elf_size_stubs (struct bfd_link_info *info)
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return 0;
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htab->init->size = 16;
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(*htab->params->place_spu_section) (htab->init, NULL, ".ovl.init");
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}
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else
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{
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@ -1747,21 +1743,51 @@ spu_elf_size_stubs (struct bfd_link_info *info)
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htab->ovtab->size = htab->num_overlays * 16 + 16 + htab->num_buf * 4;
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}
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ovout = ".data";
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if (htab->params->ovly_flavour == ovly_soft_icache)
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ovout = ".data.icache";
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(*htab->params->place_spu_section) (htab->ovtab, NULL, ovout);
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htab->toe = bfd_make_section_anyway_with_flags (ibfd, ".toe", SEC_ALLOC);
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if (htab->toe == NULL
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|| !bfd_set_section_alignment (ibfd, htab->toe, 4))
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return 0;
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htab->toe->size = htab->params->ovly_flavour == ovly_soft_icache ? 256 : 16;
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(*htab->params->place_spu_section) (htab->toe, NULL, ".toe");
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return 2;
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}
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/* Called from ld to place overlay manager data sections. This is done
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after the overlay manager itself is loaded, mainly so that the
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linker's htab->init section is placed after any other .ovl.init
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sections. */
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void
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spu_elf_place_overlay_data (struct bfd_link_info *info)
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{
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struct spu_link_hash_table *htab = spu_hash_table (info);
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unsigned int i;
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const char *ovout;
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if (htab->stub_count == NULL)
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return;
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(*htab->params->place_spu_section) (htab->stub_sec[0], NULL, ".text");
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for (i = 0; i < htab->num_overlays; ++i)
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{
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asection *osec = htab->ovl_sec[i];
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unsigned int ovl = spu_elf_section_data (osec)->u.o.ovl_index;
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(*htab->params->place_spu_section) (htab->stub_sec[ovl], osec, NULL);
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}
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if (htab->params->ovly_flavour == ovly_soft_icache)
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(*htab->params->place_spu_section) (htab->init, NULL, ".ovl.init");
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ovout = ".data";
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if (htab->params->ovly_flavour == ovly_soft_icache)
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ovout = ".data.icache";
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(*htab->params->place_spu_section) (htab->ovtab, NULL, ovout);
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(*htab->params->place_spu_section) (htab->toe, NULL, ".toe");
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}
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/* Functions to handle embedded spu_ovl.o object. */
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static void *
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@ -116,4 +116,5 @@ extern bfd_boolean spu_elf_open_builtin_lib (bfd **,
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extern bfd_boolean spu_elf_create_sections (struct bfd_link_info *);
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extern int spu_elf_find_overlays (struct bfd_link_info *);
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extern int spu_elf_size_stubs (struct bfd_link_info *);
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extern void spu_elf_place_overlay_data (struct bfd_link_info *);
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extern asection *spu_elf_check_vma (struct bfd_link_info *);
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@ -1,3 +1,8 @@
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2009-05-14 Alan Modra <amodra@bigpond.net.au>
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* emultempl/spuelf.em (spu_before_allocation): Call
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spu_elf_place_overlay_data.
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2009-05-14 Alan Modra <amodra@bigpond.net.au>
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* ldlang.c (lang_insert_orphan): Add __start_<section> symbol
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@ -308,6 +308,8 @@ spu_before_allocation (void)
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einfo ("%X%P: can not size overlay stubs: %E\n");
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else if (ret == 2)
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spu_elf_load_ovl_mgr ();
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spu_elf_place_overlay_data (&link_info);
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}
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/* We must not cache anything from the preliminary sizing. */
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@ -1,3 +1,9 @@
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2009-05-14 Alan Modra <amodra@bigpond.net.au>
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* ld-spu/icache1.d: Update for changed overlay manager placement.
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* ld-spu/ovl.d: Likewise.
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* ld-spu/ovl2.d: Likewise.
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2009-05-05 Paul Brook <paul@codesourcery.com>
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* ld-arm/arm.ld: Add .ARM.exidx and .ARM.extab.
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@ -34,19 +34,19 @@ Disassembly of section \.ovly2:
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fa0: 00 00 00 02.*
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fa4: 00 04 11 04.*
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fa8: a0 00 0c 10.*
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fac: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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fac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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fb0: 00 00 ed 00.*
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\.\.\.
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fc0: 00 00 00 02.*
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fc4: 00 04 10 00.*
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fc8: a0 00 0c 14.*
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fcc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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fcc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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fd0: 00 00 00 00.*
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fd4: 00 00 0a 80.*
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\.\.\.
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fe4: 00 04 08 00.*
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fe8: 20 00 0f 38.*
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fec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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fec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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\.\.\.
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ff8: 00 7f 0f 80.*
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ffc: 00 00 00 00.*
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@ -73,7 +73,7 @@ Disassembly of section \.ovly4:
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.* 1c 80 00 81 ai \$1,\$1,-512
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.* 33 7f fe 80 brsl \$0,1400 <f5> # 1400
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\.\.\.
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.* 42 01 00 03 ila \$3,200 <__icache_linked_list\+0x1c0>
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.* 42 01 00 03 ila \$3,200.*
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.* 18 00 c0 81 a \$1,\$1,\$3
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.* 34 00 40 80 lqd \$0,16\(\$1\)
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.* 35 00 00 00 bi \$0
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@ -91,7 +91,7 @@ Disassembly of section \.ovly5:
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be0: 00 00 00 03.*
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be4: 00 04 14 00.*
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be8: a0 00 0b 2c.*
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bec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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bec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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\.\.\.
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bfc: 00 03 fd 80.*
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@ -106,20 +106,20 @@ Disassembly of section \.ovly6:
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fa0: 00 00 00 07.*
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fa4: 00 08 14 00.*
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fa8: a0 00 0c 00.*
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fac: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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fac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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fb0: 00 03 75 80.*
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\.\.\.
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fc0: 00 00 00 07.*
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fc4: 00 08 14 00.*
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fc8: a0 00 0c 04.*
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fcc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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fcc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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fd0: 00 00 00 00.*
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fd4: 00 00 86 80.*
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\.\.\.
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fe0: 00 00 00 04.*
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fe4: 00 08 08 00.*
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fe8: 20 00 0f 28.*
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fec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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fec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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\.\.\.
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ff8: 00 7f 03 80.*
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ffc: 00 00 00 00.*
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@ -142,20 +142,20 @@ Disassembly of section \.ovly7:
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13a0: 00 00 00 03.*
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13a4: 00 04 14 00.*
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13a8: a0 00 10 18.*
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13ac: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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13ac: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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\.\.\.
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13b8: 00 00 0f 80.*
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13bc: 00 00 00 00.*
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13c0: 00 00 00 07.*
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13c4: 00 08 14 00.*
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13c8: a0 00 10 1c.*
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13cc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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13cc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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\.\.\.
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13dc: 00 00 0a 80.*
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13e0: 00 00 00 05.*
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13e4: 00 08 0c 00.*
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13e8: 20 00 13 44.*
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13ec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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13ec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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13f0: 00 00 00 00.*
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13f4: 00 7f 02 80.*
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\.\.\.
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@ -173,13 +173,13 @@ Disassembly of section \.ovly8:
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17c0: 00 00 00 02.*
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17c4: 00 04 11 04.*
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17c8: a0 00 14 0c.*
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17cc: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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17cc: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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\.\.\.
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17dc: 00 00 d9 00.*
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17e0: 00 00 00 06.*
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17e4: 00 08 10 00.*
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17e8: 20 00 17 30.*
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17ec: 31 03 0a 4b brasl \$75,1850 <__icache_br_handler>
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17ec: 31 03 01 cb brasl \$75,180c <__icache_br_handler>
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17f0: 00 7f 0d 80.*
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\.\.\.
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@ -189,14 +189,16 @@ Disassembly of section \.text:
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.* 41 00 02 03 ilhu \$3,4
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.* 60 8a 00 03 iohl \$3,5120 # 1400
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.* 32 00 04 80 br 182c.*
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0000180c <__icache_br_handler>:
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180c: 00 00 00 00 stop
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00001810 <__icache_call_handler>:
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\.\.\.
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1820: 00 00 00 01.*
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1824: 00 04 0c 00.*
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1828: a0 00 18 08.*
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182c: 31 03 0a cb brasl \$75,1854 <__icache_call_handler>
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182c: 31 03 02 4b brasl \$75,1810 <__icache_call_handler>
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\.\.\.
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1838: 00 7e 7b 80.*
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\.\.\.
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00001850 <__icache_br_handler>:
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#pass
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@ -17,8 +17,7 @@ Disassembly of section \.text:
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.*SPU_REL16 f2_a1
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.* brsl \$0,.* <00000000\.ovl_call\.f1_a2>.*
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.*SPU_REL16 f1_a2
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#.* ila \$9,328 # 148
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.* ila \$9,352 # 160
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.* ila \$9,.*
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.*SPU_ADDR18 f2_a2
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.* bisl \$0,\$9
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.* ai \$1,\$1,32 # 20
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@ -28,66 +27,6 @@ Disassembly of section \.text:
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0000012c <f0>:
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.* bi \$0
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#00000130 <00000000\.ovl_call\.f1_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 00.*
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#
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#00000138 <00000000\.ovl_call\.f2_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 04.*
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#
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#00000140 <00000000\.ovl_call\.f1_a2>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 00.*
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#
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#00000148 <00000000\.ovl_call\.f2_a2>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 24.*
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#
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#00000150 <00000000\.ovl_call\.f4_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 10.*
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#
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#00000158 <00000000.ovl_call.14:8>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 34.*
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00000130 <00000000\.ovl_call\.f1_a1>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1024 # 400
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.* bra? .* <__ovly_load>.*
|
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|
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00000140 <00000000\.ovl_call\.f2_a1>:
|
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.* ila \$78,1
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.* lnop
|
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.* ila \$79,1028 # 404
|
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.* bra? .* <__ovly_load>.*
|
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|
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00000150 <00000000.ovl_call.f1_a2>:
|
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.* ila \$78,2
|
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.* lnop
|
||||
.* ila \$79,1024 # 400
|
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.* bra? .* <__ovly_load>.*
|
||||
|
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00000160 <00000000\.ovl_call\.f2_a2>:
|
||||
.* ila \$78,2
|
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.* lnop
|
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.* ila \$79,1060 # 424
|
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.* bra? .* <__ovly_load>.*
|
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|
||||
00000170 <00000000\.ovl_call\.f4_a1>:
|
||||
.* ila \$78,1
|
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.* lnop
|
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.* ila \$79,1040 # 410
|
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.* bra? .* <__ovly_load>.*
|
||||
|
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00000180 <00000000.ovl_call.14:8>:
|
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.* ila \$78,2
|
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.* lnop
|
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.* ila \$79,1076 # 434
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
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#...
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[0-9a-f]+ <__ovly_return>:
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#...
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|
|
@ -95,6 +34,66 @@ Disassembly of section \.text:
|
|||
#...
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[0-9a-f]+ <_ovly_debug_event>:
|
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#...
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||||
00000330 <00000000\.ovl_call\.f1_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1024 # 400
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000340 <00000000\.ovl_call\.f2_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1028 # 404
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000350 <00000000.ovl_call.f1_a2>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1024 # 400
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000360 <00000000\.ovl_call\.f2_a2>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1060 # 424
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000370 <00000000\.ovl_call\.f4_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1040 # 410
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000380 <00000000.ovl_call.14:8>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1076 # 434
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
#00000330 <00000000\.ovl_call\.f1_a1>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 00.*
|
||||
#
|
||||
#00000338 <00000000\.ovl_call\.f2_a1>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 04.*
|
||||
#
|
||||
#00000340 <00000000\.ovl_call\.f1_a2>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 00.*
|
||||
#
|
||||
#00000348 <00000000\.ovl_call\.f2_a2>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 24.*
|
||||
#
|
||||
#00000350 <00000000\.ovl_call\.f4_a1>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 10.*
|
||||
#
|
||||
#00000358 <00000000.ovl_call.14:8>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 34.*
|
||||
|
||||
Disassembly of section \.ov_a1:
|
||||
|
||||
00000400 <f1_a1>:
|
||||
|
|
@ -102,8 +101,7 @@ Disassembly of section \.ov_a1:
|
|||
.*SPU_REL16 f3_a1
|
||||
|
||||
00000404 <f2_a1>:
|
||||
#.* ila \$3,336 # 150
|
||||
.* ila \$3,368 # 170
|
||||
.* ila \$3,.*
|
||||
.*SPU_ADDR18 f4_a1
|
||||
.* bi \$0
|
||||
|
||||
|
|
@ -121,19 +119,18 @@ Disassembly of section \.ov_a2:
|
|||
.* ai \$1,\$1,-32
|
||||
.* brsl \$0,12c <f0> # 12c
|
||||
.*SPU_REL16 f0
|
||||
.* brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
|
||||
.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
|
||||
.*SPU_REL16 f1_a1
|
||||
.* brsl \$0,430 <f3_a2> # 430
|
||||
.* brsl \$0,.* <f3_a2>.*
|
||||
.*SPU_REL16 f3_a2
|
||||
.* lqd \$0,48\(\$1\) # 30
|
||||
.* ai \$1,\$1,32 # 20
|
||||
.* bi \$0
|
||||
|
||||
00000424 <f2_a2>:
|
||||
.* ilhu \$3,0
|
||||
.* ilhu \$3,.*
|
||||
.*SPU_ADDR16_HI f4_a2
|
||||
#.* iohl \$3,344 # 158
|
||||
.* iohl \$3,384 # 180
|
||||
.* iohl \$3,.*
|
||||
.*SPU_ADDR16_LO f4_a2
|
||||
.* bi \$0
|
||||
|
||||
|
|
|
|||
|
|
@ -19,47 +19,47 @@ Disassembly of section \.text:
|
|||
|
||||
00000110 <longjmp>:
|
||||
.* bi \$0
|
||||
.*00 00 01 40.*
|
||||
|
||||
.*00 00 03 40.*
|
||||
.*SPU_ADDR32 \.ov_a1\+0x14
|
||||
\.\.\.
|
||||
|
||||
#00000118 <00000000\.ovl_call.f1_a1>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 00.*
|
||||
#
|
||||
#00000120 <00000000\.ovl_call.setjmp>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 00 01 0c.*
|
||||
#
|
||||
#00000128 <_SPUEAR_f1_a2>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 00.*
|
||||
|
||||
00000120 <00000000\.ovl_call.f1_a1>:
|
||||
#...
|
||||
00000320 <00000000\.ovl_call.f1_a1>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1040 # 410
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000130 <00000000\.ovl_call.setjmp>:
|
||||
00000330 <00000000\.ovl_call.setjmp>:
|
||||
.* ila \$78,0
|
||||
.* lnop
|
||||
.* ila \$79,268 # 10c
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000140 <00000000\.ovl_call\.13:5>:
|
||||
00000340 <00000000\.ovl_call\.13:5>:
|
||||
.* ila \$78,1
|
||||
.* lnop
|
||||
.* ila \$79,1044 # 414
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
00000150 <_SPUEAR_f1_a2>:
|
||||
00000350 <_SPUEAR_f1_a2>:
|
||||
.* ila \$78,2
|
||||
.* lnop
|
||||
.* ila \$79,1040 # 410
|
||||
.* bra? .* <__ovly_load>.*
|
||||
|
||||
#...
|
||||
#00000318 <00000000\.ovl_call.f1_a1>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 04 04 00.*
|
||||
#
|
||||
#00000320 <00000000\.ovl_call.setjmp>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 00 01 0c.*
|
||||
#
|
||||
#00000328 <_SPUEAR_f1_a2>:
|
||||
#.* bra?sl \$75,.* <__ovly_load>.*
|
||||
#.*00 08 04 00.*
|
||||
|
||||
Disassembly of section \.ov_a1:
|
||||
|
||||
00000400 <00000001\.ovl_call\.14:6>:
|
||||
|
|
|
|||
Loading…
Reference in New Issue