2009-07-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Update operand types. (update_imm): Updated. (finalize_imm): Update the first 2 immediate operands only for instructions with 2 operands or more.
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@ -1,3 +1,10 @@
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2009-07-17 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (md_assemble): Update operand types.
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(update_imm): Updated.
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(finalize_imm): Update the first 2 immediate operands only
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for instructions with 2 operands or more.
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2009-07-17 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (md_assemble): Check implicit registers
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@ -2813,6 +2813,10 @@ md_assemble (char *line)
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if (!process_suffix ())
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return;
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/* Update operand types. */
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for (j = 0; j < i.operands; j++)
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i.types[j] = operand_type_and (i.types[j], i.tm.operand_types[j]);
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/* Make still unresolved immediate matches conform to size of immediate
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given in i.suffix. */
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if (!finalize_imm ())
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@ -4434,9 +4438,7 @@ check_word_reg (void)
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static int
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update_imm (unsigned int j)
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{
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i386_operand_type overlap;
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overlap = operand_type_and (i.types[j], i.tm.operand_types[j]);
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i386_operand_type overlap = i.types[j];
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if ((overlap.bitfield.imm8
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|| overlap.bitfield.imm8s
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|| overlap.bitfield.imm16
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@ -4500,14 +4502,19 @@ update_imm (unsigned int j)
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static int
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finalize_imm (void)
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{
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unsigned int j;
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unsigned int j, n;
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for (j = 0; j < 2; j++)
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if (update_imm (j) == 0)
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return 0;
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/* Update the first 2 immediate operands. */
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n = i.operands > 2 ? 2 : i.operands;
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if (n)
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{
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for (j = 0; j < n; j++)
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if (update_imm (j) == 0)
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return 0;
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i.types[2] = operand_type_and (i.types[2], i.tm.operand_types[2]);
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gas_assert (operand_type_check (i.types[2], imm) == 0);
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/* The 3rd operand can't be immediate operand. */
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gas_assert (operand_type_check (i.types[2], imm) == 0);
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}
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return 1;
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}
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