2000-02-16 Fernando Nasser <fnasser@totem.to.cygnus.com>
* arm-tdep.c (set_disassembly_flavor, arm_othernames, _initialize_arm_tdep): Allows the user to choose between any of the flavors available for the disassembly to be used in the "info reg" command and elsewhere in gdb. It prevents having to maintain this information in two places by using the data kept in the opcodes directory.
This commit is contained in:
Fernando Nasser
parent
9e673ad141
commit
bc90b915f7
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@ -1,3 +1,12 @@
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2000-02-16 Fernando Nasser <fnasser@totem.to.cygnus.com>
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* arm-tdep.c (set_disassembly_flavor, arm_othernames,
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_initialize_arm_tdep): Allows the user to choose between any of
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the flavors available for the disassembly to be used in the "info
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reg" command and elsewhere in gdb. It prevents having to maintain
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this information in two places by using the data kept in the
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opcodes directory.
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2000-02-09 Mark Kettenis <kettenis@gnu.org>
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* configure.in: Check for lwpid_t, psaddr_t, prgregset_t and
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229
gdb/arm-tdep.c
229
gdb/arm-tdep.c
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@ -30,56 +30,41 @@
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extern void _initialize_arm_tdep (void);
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/*
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The following macros are actually wrong. Neither arm nor thumb can
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or should set the lsb on addr.
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The thumb addresses are mod 2, so (addr & 2) would be a good heuristic
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to use when checking for thumb (see arm_pc_is_thumb() below).
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Unfortunately, something else depends on these (incorrect) macros, so
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fixing them actually breaks gdb. I didn't have time to investigate. Z.R.
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*/
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/* Thumb function addresses are odd (bit 0 is set). Here are some
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macros to test, set, or clear bit 0 of addresses. */
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#define IS_THUMB_ADDR(addr) ((addr) & 1)
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#define MAKE_THUMB_ADDR(addr) ((addr) | 1)
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#define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
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/* From opcodes/arm-dis.c */
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/* Default register names as specified by APCS. */
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static char * atpcs_register_names[] =
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{"a1", "a2", "a3", "a4", /* 0 1 2 3 */
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"v1", "v2", "v3", "v4", /* 4 5 6 7 */
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"v5", "v6", "v7", "v8", /* 8 9 10 11 */
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"IP", "SP", "LR", "PC", /* 12 13 14 15 */
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"f0", "f1", "f2", "f3", /* 16 17 18 19 */
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"f4", "f5", "f6", "f7", /* 20 21 22 23 */
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"FPS", "PS" }; /* 24 25 */
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extern int get_arm_regname_num_options (void);
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/* Alternate set of registers names used by GCC. */
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static char * additional_register_names[] =
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extern int set_arm_regname_option (int option);
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extern int get_arm_regnames (int option, const char **setname,
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const char **setdescription,
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const char ***regnames);
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/* Number of different reg name sets (options). */
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static int num_flavor_options;
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/* We have more registers than the disassembler as gdb can print the value
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of special registers as well.
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The general register names are overwritten by whatever is being used by
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the disassembler at the moment. We also adjust the case of cpsr and fps. */
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/* Initial value: Register names used in ARM's ISA documentation. */
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static char * arm_register_name_strings[] =
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{"r0", "r1", "r2", "r3", /* 0 1 2 3 */
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"r4", "r5", "r6", "r7", /* 4 5 6 7 */
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"r8", "r9", "r10", "r11", /* 8 9 10 11 */
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"r12", "sp", "lr", "pc", /* 12 13 14 15 */
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"f0", "f1", "f2", "f3", /* 16 17 18 19 */
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"f4", "f5", "f6", "f7", /* 20 21 22 23 */
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"fps", "ps" }; /* 24 25 */
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"fps", "cpsr" }; /* 24 25 */
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char **arm_register_names = arm_register_name_strings;
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/* This is the variable that is set with "set disassembly-flavor".
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By default use the APCS registers names. */
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char ** arm_register_names = atpcs_register_names;
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/* Valid register name flavors. */
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static char **valid_flavors;
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/* Valid register name flavours. */
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static char apcs_flavor[] = "apcs";
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static char r_prefix_flavor[] = "r-prefix";
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static char * valid_flavors[] =
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{
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apcs_flavor,
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r_prefix_flavor,
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NULL
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};
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/* Disassembly flavor to use. */
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static char *disassembly_flavor = apcs_flavor;
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/* Disassembly flavor to use. Default to "std" register names. */
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static char *disassembly_flavor;
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static int current_option; /* Index to that option in the opcodes table. */
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/* This is used to keep the bfd arch_info in sync with the disassembly
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flavor. */
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@ -103,6 +88,12 @@ struct frame_extra_info
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int framereg;
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};
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/* Addresses for calling Thumb functions have the bit 0 set.
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Here are some macros to test, set, or clear bit 0 of addresses. */
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#define IS_THUMB_ADDR(addr) ((addr) & 1)
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#define MAKE_THUMB_ADDR(addr) ((addr) | 1)
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#define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
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#define SWAP_TARGET_AND_HOST(buffer,len) \
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do \
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{ \
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@ -1388,52 +1379,6 @@ arm_float_info (void)
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print_fpu_flags (status);
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}
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/* If the disassembly mode is APCS, we have to also switch the
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bfd mach_type. This function is run in the set disassembly_flavor
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command, and does that. */
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static void
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set_disassembly_flavor_sfunc (char *args, int from_tty,
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struct cmd_list_element *c)
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{
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set_disassembly_flavor ();
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}
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static void
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set_disassembly_flavor (void)
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{
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if (disassembly_flavor == apcs_flavor)
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{
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parse_arm_disassembler_option ("reg-names-atpcs");
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arm_register_names = atpcs_register_names;
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}
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else if (disassembly_flavor == r_prefix_flavor)
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{
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parse_arm_disassembler_option ("reg-names-std");
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arm_register_names = additional_register_names;
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}
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}
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/* arm_othernames implements the "othernames" command. This is kind
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of hacky, and I prefer the set-show disassembly-flavor which is
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also used for the x86 gdb. I will keep this around, however, in
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case anyone is actually using it. */
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static void
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arm_othernames (char *names, int n)
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{
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if (disassembly_flavor == r_prefix_flavor)
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{
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disassembly_flavor = apcs_flavor;
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set_disassembly_flavor ();
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}
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else
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{
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disassembly_flavor = r_prefix_flavor;
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set_disassembly_flavor ();
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}
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}
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#if 0
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/* FIXME: The generated assembler works but sucks. Instead of using
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r0, r1 it pushes them on the stack, then loads them into r3, r4 and
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@ -2033,29 +1978,121 @@ arm_skip_stub (CORE_ADDR pc)
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return 0; /* not a stub */
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}
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/* If the user changes the register disassembly flavor used for info register
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and other commands, we have to also switch the flavor used in opcodes
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for disassembly output.
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This function is run in the set disassembly_flavor command, and does that. */
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static void
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set_disassembly_flavor_sfunc (char *args, int from_tty,
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struct cmd_list_element *c)
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{
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set_disassembly_flavor ();
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}
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static void
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set_disassembly_flavor (void)
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{
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const char *setname, *setdesc, **regnames;
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int numregs, j;
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/* Find the flavor that the user wants in the opcodes table. */
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int current = 0;
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numregs = get_arm_regnames (current, &setname, &setdesc, ®names);
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while ((disassembly_flavor != setname)
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&& (current < num_flavor_options))
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get_arm_regnames (++current, &setname, &setdesc, ®names);
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current_option = current;
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/* Fill our copy. */
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for (j = 0; j < numregs; j++)
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arm_register_names[j] = (char *) regnames[j];
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/* Adjust case. */
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if (isupper (*regnames[PC_REGNUM]))
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{
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arm_register_names[FPS_REGNUM] = "FPS";
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arm_register_names[PS_REGNUM] = "CPSR";
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}
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else
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{
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arm_register_names[FPS_REGNUM] = "fps";
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arm_register_names[PS_REGNUM] = "cpsr";
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}
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/* Synchronize the disassembler. */
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set_arm_regname_option (current);
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}
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/* arm_othernames implements the "othernames" command. This is kind
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of hacky, and I prefer the set-show disassembly-flavor which is
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also used for the x86 gdb. I will keep this around, however, in
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case anyone is actually using it. */
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static void
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arm_othernames (char *names, int n)
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{
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/* Circle through the various flavors. */
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current_option = (current_option + 1) % num_flavor_options;
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disassembly_flavor = valid_flavors[current_option];
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set_disassembly_flavor ();
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}
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void
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_initialize_arm_tdep (void)
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{
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struct ui_file *stb;
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long length;
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struct cmd_list_element *new_cmd;
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const char *setname, *setdesc, **regnames;
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int numregs, i, j;
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static char *helptext;
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tm_print_insn = gdb_print_insn_arm;
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/* Get the number of possible sets of register names defined in opcodes. */
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num_flavor_options = get_arm_regname_num_options ();
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/* Sync the opcode insn printer with our register viewer: */
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parse_arm_disassembler_option ("reg-names-atpcs");
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parse_arm_disassembler_option ("reg-names-std");
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/* Add the deprecated "othernames" command */
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/* Begin creating the help text. */
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stb = mem_fileopen ();
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fprintf_unfiltered (stb, "Set the disassembly flavor.\n\
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The valid values are:\n");
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add_com ("othernames", class_obscure, arm_othernames,
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"Switch to the other set of register names.");
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/* Initialize the array that will be passed to add_set_enum_cmd(). */
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valid_flavors = xmalloc ((num_flavor_options + 1) * sizeof (char *));
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for (i = 0; i < num_flavor_options; i++)
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{
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numregs = get_arm_regnames (i, &setname, &setdesc, ®names);
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valid_flavors[i] = (char *) setname;
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fprintf_unfiltered (stb, "%s - %s\n", setname,
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setdesc);
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/* Copy the default names (if found) and synchronize disassembler. */
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if (!strcmp (setname, "std"))
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{
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disassembly_flavor = (char *) setname;
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current_option = i;
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for (j = 0; j < numregs; j++)
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arm_register_names[j] = (char *) regnames[j];
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set_arm_regname_option (i);
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}
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}
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/* Mark the end of valid options. */
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valid_flavors[num_flavor_options] = NULL;
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/* Finish the creation of the help text. */
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fprintf_unfiltered (stb, "The default is \"std\".");
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helptext = ui_file_xstrdup (stb, &length);
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ui_file_delete (stb);
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/* Add the disassembly-flavor command */
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new_cmd = add_set_enum_cmd ("disassembly-flavor", no_class,
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valid_flavors,
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(char *) &disassembly_flavor,
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"Set the disassembly flavor, \
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the valid values are \"apcs\" and \"r-prefix\", \
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and the default value is \"apcs\".",
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helptext,
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&setlist);
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new_cmd->function.sfunc = set_disassembly_flavor_sfunc;
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add_show_from_set (new_cmd, &showlist);
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@ -2066,6 +2103,10 @@ and the default value is \"apcs\".",
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"Set usage of ARM 32-bit mode.\n", &setlist),
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&showlist);
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/* Add the deprecated "othernames" command */
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add_com ("othernames", class_obscure, arm_othernames,
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"Switch to the next set of register names.");
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}
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/* Test whether the coff symbol specific value corresponds to a Thumb
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