x86-64: Generate branch with PLT32 relocation
Since there is no need to prepare for PLT branch on x86-64, generate R_X86_64_PLT32, instead of R_X86_64_PC32, if possible, which can be used as a marker for 32-bit PC-relative branches. To compile Linux kernel, this patch: From: "H.J. Lu" <hjl.tools@gmail.com> Subject: [PATCH] x86: Treat R_X86_64_PLT32 as R_X86_64_PC32 On i386, there are 2 types of PLTs, PIC and non-PIC. PIE and shared objects must use PIC PLT. To use PIC PLT, you need to load _GLOBAL_OFFSET_TABLE_ into EBX first. There is no need for that on x86-64 since x86-64 uses PC-relative PLT. On x86-64, for 32-bit PC-relative branches, we can generate PLT32 relocation, instead of PC32 relocation, which can also be used as a marker for 32-bit PC-relative branches. Linker can always reduce PLT32 relocation to PC32 if function is defined locally. Local functions should use PC32 relocation. As far as Linux kernel is concerned, R_X86_64_PLT32 can be treated the same as R_X86_64_PC32 since Linux kernel doesn't use PLT. is needed. It is available on hjl/plt32/master branch at https://github.com/hjl-tools/linux bfd/ PR gas/22791 * elf64-x86-64.c (is_32bit_relative_branch): Removed. (elf_x86_64_relocate_section): Check PIC relocations in PIE. Remove is_32bit_relative_branch usage. Disallow PC32 reloc against protected function in shared object. gas/ PR gas/22791 * config/tc-i386.c (need_plt32_p): New function. (output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible. (md_estimate_size_before_relax): Likewise. * testsuite/gas/i386/reloc64.d: Updated. * testsuite/gas/i386/x86-64-jump.d: Likewise. * testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise. * testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise. * testsuite/gas/i386/x86-64-relax-2.d: Likewise. * testsuite/gas/i386/x86-64-relax-3.d: Likewise. * testsuite/gas/i386/ilp32/reloc64.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise. ld/ PR gas/22791 * testsuite/ld-x86-64/mpx1c.rd: Updated. * testsuite/ld-x86-64/pr22791-1.err: New file. * testsuite/ld-x86-64/pr22791-1a.c: Likewise. * testsuite/ld-x86-64/pr22791-1b.s: Likewise. * testsuite/ld-x86-64/pr22791-2.rd: Likewise. * testsuite/ld-x86-64/pr22791-2a.s: Likewise. * testsuite/ld-x86-64/pr22791-2b.c: Likewise. * testsuite/ld-x86-64/pr22791-2c.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/22791 tests.
This commit is contained in:
H.J. Lu
parent
80c9635046
commit
bd7ab16b45
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@ -1,3 +1,11 @@
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2018-02-13 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22791
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* elf64-x86-64.c (is_32bit_relative_branch): Removed.
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(elf_x86_64_relocate_section): Check PIC relocations in PIE.
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Remove is_32bit_relative_branch usage. Disallow PC32 reloc
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against protected function in shared object.
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2018-02-13 Sergei Trofimovich <slyfox@inbox.ru>
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PR 22828
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@ -2307,24 +2307,6 @@ elf_x86_64_tpoff (struct bfd_link_info *info, bfd_vma address)
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return address - static_tls_size - htab->tls_sec->vma;
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}
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/* Is the instruction before OFFSET in CONTENTS a 32bit relative
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branch? */
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static bfd_boolean
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is_32bit_relative_branch (bfd_byte *contents, bfd_vma offset)
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{
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/* Opcode Instruction
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0xe8 call
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0xe9 jump
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0x0f 0x8x conditional jump */
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return ((offset > 0
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&& (contents [offset - 1] == 0xe8
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|| contents [offset - 1] == 0xe9))
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|| (offset > 1
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&& contents [offset - 2] == 0x0f
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&& (contents [offset - 1] & 0xf0) == 0x80));
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}
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/* Relocate an x86_64 ELF section. */
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static bfd_boolean
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@ -3023,14 +3005,18 @@ do_ifunc_pointer:
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case R_X86_64_PC32:
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case R_X86_64_PC32_BND:
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/* Don't complain about -fPIC if the symbol is undefined when
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building executable unless it is unresolved weak symbol or
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-z nocopyreloc is used. */
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building executable unless it is unresolved weak symbol,
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references a dynamic definition in PIE or -z nocopyreloc
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is used. */
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if ((input_section->flags & SEC_ALLOC) != 0
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&& (input_section->flags & SEC_READONLY) != 0
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&& h != NULL
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&& ((bfd_link_executable (info)
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&& ((h->root.type == bfd_link_hash_undefweak
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&& !resolved_to_zero)
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|| (bfd_link_pie (info)
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&& !h->def_regular
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&& h->def_dynamic)
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|| ((info->nocopyreloc
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|| (eh->def_protected
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&& elf_has_no_copy_on_protected (h->root.u.def.section->owner)))
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@ -3039,26 +3025,21 @@ do_ifunc_pointer:
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|| bfd_link_dll (info)))
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{
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bfd_boolean fail = FALSE;
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bfd_boolean branch
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= ((r_type == R_X86_64_PC32
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|| r_type == R_X86_64_PC32_BND)
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&& is_32bit_relative_branch (contents, rel->r_offset));
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if (SYMBOL_REFERENCES_LOCAL_P (info, h))
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{
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/* Symbol is referenced locally. Make sure it is
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defined locally or for a branch. */
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fail = (!(h->def_regular || ELF_COMMON_DEF_P (h))
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&& !branch);
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defined locally. */
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fail = !(h->def_regular || ELF_COMMON_DEF_P (h));
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}
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else if (!(bfd_link_pie (info)
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&& (h->needs_copy || eh->needs_copy)))
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{
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/* Symbol doesn't need copy reloc and isn't referenced
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locally. We only allow branch to symbol with
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non-default visibility. */
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fail = (!branch
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|| ELF_ST_VISIBILITY (h->other) == STV_DEFAULT);
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locally. Address of protected function may not be
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reachable at run-time. */
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fail = (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
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|| (ELF_ST_VISIBILITY (h->other) == STV_PROTECTED
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&& h->type == STT_FUNC));
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}
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if (fail)
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@ -1,3 +1,18 @@
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2018-02-13 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/22791
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* config/tc-i386.c (need_plt32_p): New function.
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(output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible.
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(md_estimate_size_before_relax): Likewise.
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* testsuite/gas/i386/reloc64.d: Updated.
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* testsuite/gas/i386/x86-64-jump.d: Likewise.
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* testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise.
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* testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise.
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* testsuite/gas/i386/x86-64-relax-2.d: Likewise.
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* testsuite/gas/i386/x86-64-relax-3.d: Likewise.
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* testsuite/gas/i386/ilp32/reloc64.d: Likewise.
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* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
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2018-02-13 Maciej W. Rozycki <macro@mips.com>
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* testsuite/gas/mips/loongson-3a-2.d: Rename test.
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@ -7023,12 +7023,46 @@ output_branch (void)
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frag_var (rs_machine_dependent, 5, i.reloc[0], subtype, sym, off, p);
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}
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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/* Return TRUE iff PLT32 relocation should be used for branching to
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symbol S. */
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static bfd_boolean
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need_plt32_p (symbolS *s)
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{
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/* PLT32 relocation is ELF only. */
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if (!IS_ELF)
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return FALSE;
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/* Since there is no need to prepare for PLT branch on x86-64, we
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can generate R_X86_64_PLT32, instead of R_X86_64_PC32, which can
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be used as a marker for 32-bit PC-relative branches. */
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if (!object_64bit)
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return FALSE;
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/* Weak or undefined symbol need PLT32 relocation. */
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if (S_IS_WEAK (s) || !S_IS_DEFINED (s))
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return TRUE;
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/* Non-global symbol doesn't need PLT32 relocation. */
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if (! S_IS_EXTERNAL (s))
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return FALSE;
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/* Other global symbols need PLT32 relocation. NB: Symbol with
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non-default visibilities are treated as normal global symbol
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so that PLT32 relocation can be used as a marker for 32-bit
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PC-relative branches. It is useful for linker relaxation. */
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return TRUE;
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}
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#endif
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static void
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output_jump (void)
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{
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char *p;
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int size;
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fixS *fixP;
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bfd_reloc_code_real_type jump_reloc = i.reloc[0];
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if (i.tm.opcode_modifier.jumpbyte)
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{
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@ -7096,8 +7130,17 @@ output_jump (void)
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abort ();
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}
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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if (size == 4
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&& jump_reloc == NO_RELOC
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&& need_plt32_p (i.op[0].disps->X_add_symbol))
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jump_reloc = BFD_RELOC_X86_64_PLT32;
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#endif
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jump_reloc = reloc (size, 1, 1, jump_reloc);
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fixP = fix_new_exp (frag_now, p - frag_now->fr_literal, size,
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i.op[0].disps, 1, reloc (size, 1, 1, i.reloc[0]));
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i.op[0].disps, 1, jump_reloc);
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/* All jumps handled here are signed, but don't use a signed limit
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check for 32 and 16 bit jumps as we want to allow wrap around at
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@ -9315,6 +9358,10 @@ md_estimate_size_before_relax (fragS *fragP, segT segment)
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reloc_type = (enum bfd_reloc_code_real) fragP->fr_var;
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else if (size == 2)
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reloc_type = BFD_RELOC_16_PCREL;
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#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
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else if (need_plt32_p (fragP->fr_symbol))
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reloc_type = BFD_RELOC_X86_64_PLT32;
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#endif
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else
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reloc_type = BFD_RELOC_32_PCREL;
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@ -16,7 +16,7 @@ Disassembly of section \.text:
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.*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
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.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
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.*[ ]+R_X86_64_GOT32[ ]+xtrn
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.*[ ]+R_X86_64_GOT32[ ]+xtrn
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@ -20,9 +20,9 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: 66 ff 20 data16 jmpq \*\(%rax\)
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[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x1f 1b: R_X86_64_PC32 \*ABS\*\+0x10003c
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x24 20: R_X86_64_PC32 \*ABS\*\+0x10003c
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[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 0x2a 26: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 0x30 2c: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: 66 e8 00 00 00 00 data16 callq 0x2a 26: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: 66 e9 00 00 00 00 data16 jmpq 0x30 2c: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: 66 0f 82 00 00 00 00 data16 jb 0x37 33: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: ff d0 callq \*%rax
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[ ]*[a-f0-9]+: ff d0 callq \*%rax
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[ ]*[a-f0-9]+: 66 ff d0 data16 callq \*%rax
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@ -18,7 +18,7 @@ Disassembly of section \.text:
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.*[ ]+R_X86_64_PC8[ ]+xtrn\+0x0*1
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.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PC32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PLT32[ ]+xtrn-0x0*4
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.*[ ]+R_X86_64_PC8[ ]+xtrn-0x0*1
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.*[ ]+R_X86_64_GOT64[ ]+xtrn
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.*[ ]+R_X86_64_GOT32[ ]+xtrn
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@ -8,7 +8,7 @@ Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: eb fe jmp (0x0|0 <.text>)
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x7 3: R_X86_64_PC32 xxx-0x4
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 0x7 3: R_X86_64_PLT32 xxx-0x4
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[ ]*[a-f0-9]+: ff 24 25 00 00 00 00 jmpq \*0x0 a: R_X86_64_32S xxx
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[ ]*[a-f0-9]+: ff e7 jmpq \*%rdi
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[ ]*[a-f0-9]+: ff 27 jmpq \*\(%rdi\)
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@ -17,7 +17,7 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: ff 2c 25 00 00 00 00 ljmp \*0x0 24: R_X86_64_32S xxx
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[ ]*[a-f0-9]+: 66 ff 2c 25 00 00 00 00 ljmpw \*0x0 2c: R_X86_64_32S xxx
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[ ]*[a-f0-9]+: e8 cb ff ff ff callq 0x0
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[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x3a 36: R_X86_64_PC32 xxx-0x4
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[ ]*[a-f0-9]+: e8 00 00 00 00 callq 0x3a 36: R_X86_64_PLT32 xxx-0x4
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[ ]*[a-f0-9]+: ff 14 25 00 00 00 00 callq \*0x0 3d: R_X86_64_32S xxx
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[ ]*[a-f0-9]+: ff d7 callq \*%rdi
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[ ]*[a-f0-9]+: ff 17 callq \*\(%rdi\)
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@ -20,9 +20,9 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
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0+24 <foo2>:
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[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32 foo-0x4
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@ -20,9 +20,9 @@ Disassembly of section .text:
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 24 <foo2>
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0+24 <foo2>:
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[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PC32 foo-0x4
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[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 2a <foo2\+0x6> 26: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 31 <foo2\+0xd> 2d: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 37 <foo2\+0x13> 33: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 e9 00 00 00 00 bnd jmpq 3d <foo2\+0x19> 39: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 0f 82 00 00 00 00 bnd jb 44 <foo2\+0x20> 40: R_X86_64_PLT32 foo-0x4
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[ ]*[a-f0-9]+: f2 e8 00 00 00 00 bnd callq 4a <foo2\+0x26> 46: R_X86_64_PLT32 foo-0x4
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@ -10,12 +10,12 @@ Disassembly of section .text:
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0+ <foo>:
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[ ]*[a-f0-9]+: eb 24 jmp 26 <local>
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[ ]*[a-f0-9]+: eb 1e jmp 22 <hidden_def>
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 9 <foo\+0x9> 5: R_X86_64_PC32 global_def-0x4
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 9 <foo\+0x9> 5: R_X86_64_PLT32 global_def-0x4
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq e <foo\+0xe> a: R_X86_64_PLT32 global_def-0x4
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[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 13 <foo\+0x13> f: R_X86_64_PC32 weak_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 18 <foo\+0x18> 14: R_X86_64_PC32 weak_hidden_undef-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1d <foo\+0x1d> 19: R_X86_64_PC32 weak_hidden_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 22 <hidden_def> 1e: R_X86_64_PC32 hidden_undef-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 13 <foo\+0x13> f: R_X86_64_PLT32 weak_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 18 <foo\+0x18> 14: R_X86_64_PLT32 weak_hidden_undef-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1d <foo\+0x1d> 19: R_X86_64_PLT32 weak_hidden_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 22 <hidden_def> 1e: R_X86_64_PLT32 hidden_undef-0x4
|
||||
|
||||
0+22 <hidden_def>:
|
||||
[ ]*[a-f0-9]+: c3 retq
|
||||
|
|
|
|||
|
|
@ -11,10 +11,10 @@ Disassembly of section .text:
|
|||
[ ]*[a-f0-9]+: eb 1b jmp 1f <hidden_def>
|
||||
[ ]*[a-f0-9]+: eb 1b jmp 21 <global_def>
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq b <foo\+0xb> 7: R_X86_64_PLT32 global_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo\+0x10> c: R_X86_64_PC32 weak_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 15 <foo\+0x15> 11: R_X86_64_PC32 weak_hidden_undef-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1a <foo\+0x1a> 16: R_X86_64_PC32 weak_hidden_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1f <hidden_def> 1b: R_X86_64_PC32 hidden_undef-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 10 <foo\+0x10> c: R_X86_64_PLT32 weak_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 15 <foo\+0x15> 11: R_X86_64_PLT32 weak_hidden_undef-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1a <foo\+0x1a> 16: R_X86_64_PLT32 weak_hidden_def-0x4
|
||||
[ ]*[a-f0-9]+: e9 00 00 00 00 jmpq 1f <hidden_def> 1b: R_X86_64_PLT32 hidden_undef-0x4
|
||||
|
||||
0+1f <hidden_def>:
|
||||
[ ]*[a-f0-9]+: c3 retq
|
||||
|
|
|
|||
13
ld/ChangeLog
13
ld/ChangeLog
|
|
@ -1,3 +1,16 @@
|
|||
2018-02-13 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
PR gas/22791
|
||||
* testsuite/ld-x86-64/mpx1c.rd: Updated.
|
||||
* testsuite/ld-x86-64/pr22791-1.err: New file.
|
||||
* testsuite/ld-x86-64/pr22791-1a.c: Likewise.
|
||||
* testsuite/ld-x86-64/pr22791-1b.s: Likewise.
|
||||
* testsuite/ld-x86-64/pr22791-2.rd: Likewise.
|
||||
* testsuite/ld-x86-64/pr22791-2a.s: Likewise.
|
||||
* testsuite/ld-x86-64/pr22791-2b.c: Likewise.
|
||||
* testsuite/ld-x86-64/pr22791-2c.s: Likewise.
|
||||
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/22791 tests.
|
||||
|
||||
2018-02-13 Alan Modra <amodra@gmail.com>
|
||||
|
||||
PR 22836
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
#...
|
||||
[0-9a-f ]+R_X86_64_PC32 +0+ +.*
|
||||
[0-9a-f ]+R_X86_64_PLT32 +0+ +.*
|
||||
#...
|
||||
|
|
|
|||
|
|
@ -0,0 +1,2 @@
|
|||
.*relocation R_X86_64_PC32 against symbol `foo' can not be used when making a PIE object; recompile with -fPIC
|
||||
#...
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
void
|
||||
foo (void)
|
||||
{
|
||||
}
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
.text
|
||||
.globl main
|
||||
.type main, @function
|
||||
main:
|
||||
movl foo(%rip), %eax
|
||||
.size main, .-main
|
||||
|
|
@ -0,0 +1,6 @@
|
|||
#failif
|
||||
#...
|
||||
.*\(TEXTREL\).*
|
||||
#...
|
||||
[0-9a-f ]+R_X86_64_NONE.*
|
||||
#...
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
.text
|
||||
.p2align 4,,15
|
||||
.globl foo
|
||||
.type foo, @function
|
||||
foo:
|
||||
jmp bar
|
||||
.size foo, .-foo
|
||||
.section .note.GNU-stack,"",@progbits
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
#include <stdio.h>
|
||||
|
||||
void
|
||||
bar (void)
|
||||
{
|
||||
puts ("PASS");
|
||||
}
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
.text
|
||||
.p2align 4,,15
|
||||
.globl main
|
||||
.type main, @function
|
||||
main:
|
||||
subq $8, %rsp
|
||||
call foo
|
||||
xorl %eax, %eax
|
||||
addq $8, %rsp
|
||||
ret
|
||||
.size main, .-main
|
||||
.section .note.GNU-stack,"",@progbits
|
||||
|
|
@ -1152,6 +1152,44 @@ if { [isnative] && [which $CC] != 0 } {
|
|||
{readelf -lW pr22393-3b.rd}} \
|
||||
"pr22393-3-static" \
|
||||
] \
|
||||
[list \
|
||||
"Build pr22791-1.so" \
|
||||
"-shared" \
|
||||
"-fPIC" \
|
||||
{ pr22791-1a.c } \
|
||||
{} \
|
||||
"pr22791-1.so" \
|
||||
] \
|
||||
[list \
|
||||
"Build pr22791-1" \
|
||||
"-pie -Wl,--no-as-needed tmpdir/pr22791-1.so" \
|
||||
"$NOPIE_CFLAGS" \
|
||||
{ pr22791-1b.s } \
|
||||
{{error_output "pr22791-1.err"}} \
|
||||
"pr22791-1" \
|
||||
] \
|
||||
[list \
|
||||
"Build pr22791-2a.o" \
|
||||
"" \
|
||||
"$NOPIE_CFLAGS" \
|
||||
{ pr22791-2a.s } \
|
||||
] \
|
||||
[list \
|
||||
"Build pr22791-2.so" \
|
||||
"-shared tmpdir/pr22791-2a.o" \
|
||||
"-fPIC" \
|
||||
{ pr22791-2b.c } \
|
||||
{{readelf -drW pr22791-2.rd}} \
|
||||
"pr22791-2.so" \
|
||||
] \
|
||||
[list \
|
||||
"Build pr22791-2" \
|
||||
"-pie -Wl,--no-as-needed tmpdir/pr22791-2.so" \
|
||||
"$NOPIE_CFLAGS" \
|
||||
{ pr22791-2c.s } \
|
||||
{{readelf -drW pr22791-2.rd}} \
|
||||
"pr22791-2" \
|
||||
] \
|
||||
]
|
||||
|
||||
if {[istarget "x86_64-*-linux*-gnux32"]} {
|
||||
|
|
@ -1477,6 +1515,15 @@ if { [isnative] && [which $CC] != 0 } {
|
|||
"pr22393-3-static" \
|
||||
"pass.out" \
|
||||
] \
|
||||
[list \
|
||||
"Run pr22791-2" \
|
||||
"-pie -Wl,--no-as-needed tmpdir/pr22791-2.so" \
|
||||
"" \
|
||||
{ pr22791-2c.s } \
|
||||
"pr22791-2" \
|
||||
"pass.out" \
|
||||
"$NOPIE_CFLAGS" \
|
||||
] \
|
||||
]
|
||||
|
||||
# Run-time tests which require working ifunc attribute support.
|
||||
|
|
|
|||
Loading…
Reference in New Issue