Fix sh-elf linker relaxation:
gcc: * config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and subtarget_asm_isa_spec. (SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define. (ASM_SPEC): Define as SH_ASM_SPEC. (SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h. Use subtarget_asm_relax_spec and subtarget_asm_isa_spec. * config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC. (SUBTARGET_ASM_ISA_SPEC): Undef / define. gcc/testsuite: gcc.dg/sh-relax.c: New test. include/elf: * sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E, and SH2E & SH4 merge to SH4, not SH2E. gas: * config/tc-sh.c (sh_dsp): Replace with preset_target_arch. (md_begin): Use preset_target_arch. (md_longopts): Make isa option unconditional. (md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any set preset_target_arch. (md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups by -S_GET_VALUE (fixP->fx_subsy). (tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy, and the addend is 0. Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. bfd: elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary relocation (no special function), and make it non-partial_inplace. (sh_elf_relax_section): When creating a bsr, use a consistent value no matter if the symbol is extern or not; set addend to -4. Don't swap load / non-load instructions for SH4. (sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset rather than if the symbol is external to determine if adjusting the offset makes sense. Adjust the addend too if appropriate. (sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the relocation.
This commit is contained in:
Joern Rennecke
parent
a0ed55327d
commit
bdfaef528f
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@ -1,3 +1,16 @@
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Mon Mar 3 20:48:23 2003 J"orn Rennecke <joern.rennecke@superh.com>
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* elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
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relocation (no special function), and make it non-partial_inplace.
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(sh_elf_relax_section): When creating a bsr, use a consistent value
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no matter if the symbol is extern or not; set addend to -4.
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Don't swap load / non-load instructions for SH4.
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(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
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rather than if the symbol is external to determine if adjusting the
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offset makes sense. Adjust the addend too if appropriate.
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(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
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relocation.
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2003-03-03 Nick Clifton <nickc@redhat.com>
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* po/da.po: Installed latest translation.
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@ -179,6 +179,8 @@ static reloc_howto_type sh_elf_howto_table[] =
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TRUE), /* pcrel_offset */
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/* 12 bit PC relative branch divided by 2. */
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/* This cannot be partial_inplace because relaxation can't know the
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eventual value of a symbol. */
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HOWTO (R_SH_IND12W, /* type */
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1, /* rightshift */
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1, /* size (0 = byte, 1 = short, 2 = long) */
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@ -186,10 +188,10 @@ static reloc_howto_type sh_elf_howto_table[] =
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TRUE, /* pc_relative */
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0, /* bitpos */
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complain_overflow_signed, /* complain_on_overflow */
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sh_elf_reloc, /* special_function */
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NULL, /* special_function */
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"R_SH_IND12W", /* name */
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TRUE, /* partial_inplace */
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0xfff, /* src_mask */
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FALSE, /* partial_inplace */
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0x0, /* src_mask */
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0xfff, /* dst_mask */
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TRUE), /* pcrel_offset */
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@ -2232,6 +2234,12 @@ sh_elf_relax_section (abfd, sec, link_info, again)
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/* Change the R_SH_USES reloc into an R_SH_IND12W reloc, and
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replace the jsr with a bsr. */
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irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_SH_IND12W);
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/* We used to test (ELF32_R_SYM (irelfn->r_info) < symtab_hdr->sh_info)
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here, but that only checks if the symbol is an external symbol,
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not if the symbol is in a different section. Besides, we need
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a consistent meaning for the relocation, so we just assume here that
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the value of the symbol is not available. */
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#if 0
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if (ELF32_R_SYM (irelfn->r_info) < symtab_hdr->sh_info)
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{
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/* If this needs to be changed because of future relaxing,
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@ -2242,12 +2250,14 @@ sh_elf_relax_section (abfd, sec, link_info, again)
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contents + irel->r_offset);
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}
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else
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#endif
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{
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/* We can't fully resolve this yet, because the external
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symbol value may be changed by future relaxing. We let
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the final link phase handle it. */
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bfd_put_16 (abfd, (bfd_vma) 0xb000, contents + irel->r_offset);
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}
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irel->r_addend = -4;
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/* See if there is another R_SH_USES reloc referring to the same
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register load. */
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@ -2316,7 +2326,8 @@ sh_elf_relax_section (abfd, sec, link_info, again)
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/* Look for load and store instructions that we can align on four
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byte boundaries. */
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if (have_code)
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if ((elf_elfheader (abfd)->e_flags & EF_SH_MACH_MASK) != EF_SH4
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&& have_code)
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{
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bfd_boolean swapped;
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@ -2542,14 +2553,28 @@ sh_elf_relax_delete_bytes (abfd, sec, addr, count)
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break;
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case R_SH_IND12W:
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if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
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start = stop = addr;
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off = insn & 0xfff;
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if (! off)
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{
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/* This has been made by previous relaxation. Since the
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relocation will be against an external symbol, the
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final relocation will just do the right thing. */
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start = stop = addr;
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}
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else
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{
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off = insn & 0xfff;
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if (off & 0x800)
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off -= 0x1000;
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stop = (bfd_vma) ((bfd_signed_vma) start + 4 + off * 2);
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/* The addend will be against the section symbol, thus
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for adjusting the addend, the relevant start is the
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start of the section.
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N.B. If we want to abandom in-place changes here and
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test directly using symbol + addend, we have to take into
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account that the addend has already been adjusted by -4. */
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if (stop > addr && stop < toaddr)
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irel->r_addend -= count;
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}
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break;
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@ -4811,7 +4836,6 @@ sh_elf_relocate_section (output_bfd, info, input_bfd, input_section,
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break;
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case R_SH_IND12W:
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relocation -= 4;
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goto final_link_relocate;
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case R_SH_DIR8WPN:
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@ -1,3 +1,17 @@
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Mon Mar 3 20:36:47 2003 J"orn Rennecke <joern.rennecke@superh.com>
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* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
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(md_begin): Use preset_target_arch.
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(md_longopts): Make isa option unconditional.
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(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
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set preset_target_arch.
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(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
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by -S_GET_VALUE (fixP->fx_subsy).
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(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
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and the addend is 0.
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Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
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* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
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2003-03-02 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* config/tc-mips.c (append_insn): Add handling of
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@ -163,9 +163,9 @@ int sh_relax; /* set if -relax seen */
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int sh_small;
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/* Whether -dsp was seen. */
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/* preset architecture set, if given; zero otherwise. */
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static int sh_dsp;
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static int preset_target_arch;
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/* The bit mask of architectures that could
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accomodate the insns seen so far. */
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@ -867,7 +867,8 @@ md_begin ()
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char *prev_name = "";
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int target_arch;
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target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
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target_arch
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= preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_dsp_up;
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valid_arch = target_arch;
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#ifdef HAVE_SH64
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@ -2593,20 +2594,20 @@ struct option md_longopts[] =
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#define OPTION_LITTLE (OPTION_BIG + 1)
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#define OPTION_SMALL (OPTION_LITTLE + 1)
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#define OPTION_DSP (OPTION_SMALL + 1)
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#define OPTION_ISA (OPTION_DSP + 1)
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{"relax", no_argument, NULL, OPTION_RELAX},
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{"big", no_argument, NULL, OPTION_BIG},
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{"little", no_argument, NULL, OPTION_LITTLE},
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{"small", no_argument, NULL, OPTION_SMALL},
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{"dsp", no_argument, NULL, OPTION_DSP},
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{"isa", required_argument, NULL, OPTION_ISA},
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#ifdef HAVE_SH64
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#define OPTION_ISA (OPTION_DSP + 1)
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#define OPTION_ABI (OPTION_ISA + 1)
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#define OPTION_NO_MIX (OPTION_ABI + 1)
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#define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
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#define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
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#define OPTION_PT32 (OPTION_NO_EXPAND + 1)
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{"isa", required_argument, NULL, OPTION_ISA},
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{"abi", required_argument, NULL, OPTION_ABI},
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{"no-mix", no_argument, NULL, OPTION_NO_MIX},
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{"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE},
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@ -2642,12 +2643,16 @@ md_parse_option (c, arg)
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break;
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case OPTION_DSP:
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sh_dsp = 1;
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preset_target_arch = arch_sh1_up & ~arch_sh3e_up;
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break;
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#ifdef HAVE_SH64
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case OPTION_ISA:
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if (strcasecmp (arg, "shmedia") == 0)
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if (strcasecmp (arg, "sh4") == 0)
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preset_target_arch = arch_sh4;
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else if (strcasecmp (arg, "any") == 0)
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preset_target_arch = arch_sh1_up;
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#ifdef HAVE_SH64
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else if (strcasecmp (arg, "shmedia") == 0)
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{
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if (sh64_isa_mode == sh64_isa_shcompact)
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as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia"));
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@ -2661,10 +2666,12 @@ md_parse_option (c, arg)
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as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact"));
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sh64_isa_mode = sh64_isa_shcompact;
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}
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#endif /* HAVE_SH64 */
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else
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as_bad ("Invalid argument to --isa option: %s", arg);
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break;
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#ifdef HAVE_SH64
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case OPTION_ABI:
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if (strcmp (arg, "32") == 0)
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{
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@ -3381,7 +3388,10 @@ md_apply_fix3 (fixP, valP, seg)
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val -= S_GET_VALUE (fixP->fx_addsy);
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#endif
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#ifndef BFD_ASSEMBLER
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#ifdef BFD_ASSEMBLER
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if (SWITCH_TABLE (fixP))
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val -= S_GET_VALUE (fixP->fx_subsy);
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#else
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if (fixP->fx_r_type == 0)
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{
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if (fixP->fx_size == 2)
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@ -3902,7 +3912,8 @@ tc_gen_reloc (section, fixp)
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if (SWITCH_TABLE (fixp))
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{
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rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
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*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
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rel->addend = 0;
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if (r_type == BFD_RELOC_16)
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r_type = BFD_RELOC_SH_SWITCH16;
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else if (r_type == BFD_RELOC_8)
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@ -3941,6 +3952,8 @@ tc_gen_reloc (section, fixp)
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rel->addend = 0;
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rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
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if (rel->howto->type == R_SH_IND12W)
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rel->addend += fixp->fx_offset - 4;
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if (rel->howto == NULL)
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{
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as_bad_where (fixp->fx_file, fixp->fx_line,
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@ -235,6 +235,8 @@ extern bfd_boolean sh_fix_adjustable PARAMS ((struct fix *));
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|| (FIX)->fx_r_type == BFD_RELOC_SH_GOTPC \
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|| TC_FORCE_RELOCATION (FIX))
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#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX) (sh_relax && SWITCH_TABLE (FIX))
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/* This keeps the subtracted symbol around, for use by PLT_PCREL
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relocs. */
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#define TC_FORCE_RELOCATION_SUB_ABS(FIX) \
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@ -1,3 +1,8 @@
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Mon Mar 3 20:35:58 2003 J"orn Rennecke <joern.rennecke@superh.com>
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* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
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and SH2E & SH4 merge to SH4, not SH2E.
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2003-02-21 Ian Wienand <ianw@gelato.unsw.edu.au>
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* ia64.h (SHT_IA_64_LOPSREG, SHT_IA_64_HIPSREG,
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@ -56,7 +56,8 @@
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: (((mach1) == EF_SH3E && (mach2) == EF_SH_UNKNOWN) \
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|| ((mach2) == EF_SH3E && (mach1) == EF_SH_UNKNOWN)) \
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? EF_SH4 \
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: ((mach1) > (mach2) ? (mach1) : (mach2)))
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: (((mach1) == EF_SH2E ? 7 : (mach1)) > ((mach2) == EF_SH2E ? 7 : (mach2)) \
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? (mach1) : (mach2)))
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/* Flags for the st_other symbol field.
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Keep away from the STV_ visibility flags (bit 0..1). */
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