From be6389fdef2f1df307fc760d344796c815103075 Mon Sep 17 00:00:00 2001 From: Jason Eckhardt Date: Sun, 17 Aug 2003 03:16:23 +0000 Subject: [PATCH] include/opcode/ChangeLog: 2003-08-16 Jason Eckhardt * i860.h (fmov.ds): Expand as famov.ds. (fmov.sd): Expand as famov.sd. (pfmov.ds): Expand as pfamov.ds. gas/testsuite/ChangeLog: 2003-08-16 Jason Eckhardt * gas/i860/pseudo-ops01.{s,d}: New files. * gas/i860/i860.exp: Execute the new test above. * gas/i860/README.i860: Mention that pseudo-ops need more testing and remove the align fill defect from the list. --- gas/testsuite/ChangeLog | 6 ++++++ gas/testsuite/gas/i860/README.i860 | 4 +--- gas/testsuite/gas/i860/i860.exp | 1 + gas/testsuite/gas/i860/pseudo-ops01.d | 14 ++++++++++++++ gas/testsuite/gas/i860/pseudo-ops01.s | 10 ++++++++++ include/opcode/ChangeLog | 6 ++++++ include/opcode/i860.h | 6 +++--- 7 files changed, 41 insertions(+), 6 deletions(-) create mode 100644 gas/testsuite/gas/i860/pseudo-ops01.d create mode 100644 gas/testsuite/gas/i860/pseudo-ops01.s diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 01fd1715b7..160a22204a 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2003-08-16 Jason Eckhardt + + * gas/i860/pseudo-ops01.{s,d}: New files. + * gas/i860/i860.exp: Execute the new test above. + * gas/i860/README.i860: Remove align defect from list. + 2003-08-14 Nick Clifton * gas/arm/pic.d: Update regexp for destination address of diff --git a/gas/testsuite/gas/i860/README.i860 b/gas/testsuite/gas/i860/README.i860 index ae5c89062c..cab007644f 100644 --- a/gas/testsuite/gas/i860/README.i860 +++ b/gas/testsuite/gas/i860/README.i860 @@ -19,15 +19,13 @@ way GAS/i860 is tested against a known good assembler. TODO: - Relocation testing is basically non-existent. - pst.d (pixel store) is the only instruction with no testcase. + - Some pseudo instructions need testcases (mov, all pfmov, etc.). - More tests for dual instruction mode: check that dual mode has a proper pair (FLOP/core) of instructions, and other error conditions. - Most current testcases use the default AT&T/SVR4 syntax; a few simple tests of the Intel syntax should be added to prevent bitrot (including relocatable expression syntax, etc). Test file dual03.s uses Intel syntax lightly (i.e., register names without '%' prefix). - - Currently, .align in a .text section fills with 0x00000000. This is - a defect and it needs to fill with nop (0xa0000000). Write a testcase - for it. Contact me (Jason Eckhardt, jle@rice.edu) if you'd like to help. diff --git a/gas/testsuite/gas/i860/i860.exp b/gas/testsuite/gas/i860/i860.exp index 3a1ceed5c4..041d859cc9 100644 --- a/gas/testsuite/gas/i860/i860.exp +++ b/gas/testsuite/gas/i860/i860.exp @@ -48,6 +48,7 @@ if [istarget i860-*-*] { run_dump_test "pfmam" run_dump_test "pfmsm" run_dump_test "pfsm" + run_dump_test "pseudo-ops01" run_dump_test "regress01" run_dump_test "shift" run_dump_test "simd" diff --git a/gas/testsuite/gas/i860/pseudo-ops01.d b/gas/testsuite/gas/i860/pseudo-ops01.d new file mode 100644 index 0000000000..3131e2efee --- /dev/null +++ b/gas/testsuite/gas/i860/pseudo-ops01.d @@ -0,0 +1,14 @@ +#as: +#objdump: -d +#name: i860 pseudo-ops01 + +.*: +file format .* + +Disassembly of section \.text: + +00000000 <\.text>: + 0: 49 28 06 48 fiadd\.ss %f5,%f0,%f6 + 4: c9 41 0a 48 fiadd\.dd %f8,%f0,%f10 + 8: b3 18 14 48 famov\.sd %f3,%f20 + c: 33 c1 09 48 famov\.ds %f24,%f9 + 10: 33 e5 03 48 pfamov\.ds %f28,%f3 diff --git a/gas/testsuite/gas/i860/pseudo-ops01.s b/gas/testsuite/gas/i860/pseudo-ops01.s new file mode 100644 index 0000000000..4b88925bd8 --- /dev/null +++ b/gas/testsuite/gas/i860/pseudo-ops01.s @@ -0,0 +1,10 @@ +# Test some assembler pseudo-operations: +# Floating point moves. + + .text + fmov.ss %f5,%f6 + fmov.dd %f8,%f10 + fmov.sd %f3,%f20 + fmov.ds %f24,%f9 + pfmov.ds %f28,%f3 + diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index a9b501d1ef..5c40b419e3 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,9 @@ +2003-08-16 Jason Eckhardt + + * i860.h (fmov.ds): Expand as famov.ds. + (fmov.sd): Expand as famov.sd. + (pfmov.ds): Expand as pfamov.ds. + 2003-08-07 Michael Meissner * cgen.h: Remove PARAM macro usage in all prototypes. diff --git a/include/opcode/i860.h b/include/opcode/i860.h index 6e2a683a49..b46a5e5a4e 100644 --- a/include/opcode/i860.h +++ b/include/opcode/i860.h @@ -494,9 +494,9 @@ static const struct i860_opcode i860_opcodes[] = /* Floating point pseudo-instructions. */ { "fmov.ss", 0x48000049, 0xb7e005b6, "e,g", 0 }, /* fiadd.ss fsrc1,f0,fdest */ { "fmov.dd", 0x480001c9, 0xb7e00436, "e,g", 0 }, /* fiadd.dd fsrc1,f0,fdest */ -{ "fmov.sd", 0x480000b0, 0xb7e0054f, "e,g", 0 }, /* fadd.sd fsrc1,f0,fdest */ -{ "fmov.ds", 0x48000130, 0xb7e004cf, "e,g", 0 }, /* fadd.ds fsrc1,f0,fdest */ -{ "pfmov.ds", 0x48000530, 0xb73000cf, "e,g", 0 }, /* pfadd.ds fsrc1,f0,fdest */ +{ "fmov.sd", 0x480000b3, 0xb400054c, "e,g", 0 }, /* famov.sd fsrc1,fdest */ +{ "fmov.ds", 0x48000133, 0xb40004cc, "e,g", 0 }, /* famov.ds fsrc1,fdest */ +{ "pfmov.ds", 0x48000533, 0xb40000cc, "e,g", 0 }, /* pfamov.ds fsrc1,fdest */ { "pfmov.dd", 0x480005c9, 0xb7e00036, "e,g", 0 }, /* pfiadd.dd fsrc1,f0,fdest */ { 0, 0, 0, 0, 0 },