x86-64: Add ENDBR64 to the TLSDESC PLT entry
The TLSDESC entry in a lazy procedure linkage table is called indirectly with "callq *(%rax)". This patch adds an ENDBR64 to support indirect branch tracking in Intel CET. The TLSDESC PLT entry now looks like: 0xf3, 0x0f, 0x1e, 0xfa, /* endbr64 */ 0xff, 0x35, 8, 0, 0, 0, /* pushq GOT+8(%rip) */ 0xff, 0x25, 16, 0, 0, 0 /* jmpq *GOT+TDG(%rip) */ The BND prefix isn't needed since MPX isn't used for TLSDESC. bfd/ PR ld/23000 * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Add ENDBR64 to the TLSDESC PLT entry. ld/ PR ld/23000 * testsuite/ld-x86-64/tlsdesc.pd: Updated.
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@ -1,3 +1,9 @@
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2018-03-25 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/23000
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* elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Add
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ENDBR64 to the TLSDESC PLT entry.
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2018-03-21 Alan Modra <amodra@gmail.com>
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* elf64-ppc.c (ppc64_elf_get_synthetic_symtab): Trim uninteresting
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@ -4411,15 +4411,23 @@ elf_x86_64_finish_dynamic_sections (bfd *output_bfd,
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if (htab->tlsdesc_plt)
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{
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/* The TLSDESC entry in a lazy procedure linkage table. */
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static const bfd_byte tlsdesc_plt_entry[LAZY_PLT_ENTRY_SIZE] =
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{
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0xf3, 0x0f, 0x1e, 0xfa, /* endbr64 */
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0xff, 0x35, 8, 0, 0, 0, /* pushq GOT+8(%rip) */
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0xff, 0x25, 16, 0, 0, 0 /* jmpq *GOT+TDG(%rip) */
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};
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bfd_put_64 (output_bfd, (bfd_vma) 0,
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htab->elf.sgot->contents + htab->tlsdesc_got);
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memcpy (htab->elf.splt->contents + htab->tlsdesc_plt,
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htab->lazy_plt->plt0_entry,
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htab->lazy_plt->plt0_entry_size);
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tlsdesc_plt_entry, LAZY_PLT_ENTRY_SIZE);
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/* Add offset for pushq GOT+8(%rip), since the
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instruction uses 6 bytes subtract this value. */
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/* Add offset for pushq GOT+8(%rip), since ENDBR64 uses 4
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bytes and the instruction uses 6 bytes, subtract these
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values. */
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bfd_put_32 (output_bfd,
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(htab->elf.sgotplt->output_section->vma
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+ htab->elf.sgotplt->output_offset
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@ -4427,14 +4435,13 @@ elf_x86_64_finish_dynamic_sections (bfd *output_bfd,
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- htab->elf.splt->output_section->vma
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- htab->elf.splt->output_offset
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- htab->tlsdesc_plt
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- 6),
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- 4 - 6),
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(htab->elf.splt->contents
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+ htab->tlsdesc_plt
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+ htab->lazy_plt->plt0_got1_offset));
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/* Add offset for the PC-relative instruction accessing
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GOT+TDG, where TDG stands for htab->tlsdesc_got,
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subtracting the offset to the end of that
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instruction. */
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+ 4 + 2));
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/* Add offset for indirect branch via GOT+TDG, where TDG
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stands for htab->tlsdesc_got, subtracting the offset
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to the end of that instruction. */
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bfd_put_32 (output_bfd,
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(htab->elf.sgot->output_section->vma
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+ htab->elf.sgot->output_offset
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@ -4442,10 +4449,9 @@ elf_x86_64_finish_dynamic_sections (bfd *output_bfd,
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- htab->elf.splt->output_section->vma
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- htab->elf.splt->output_offset
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- htab->tlsdesc_plt
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- htab->lazy_plt->plt0_got2_insn_end),
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- 4 - 6 - 6),
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(htab->elf.splt->contents
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+ htab->tlsdesc_plt
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+ htab->lazy_plt->plt0_got2_offset));
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+ htab->tlsdesc_plt + 4 + 6 + 2));
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}
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}
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@ -1,3 +1,8 @@
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2018-03-25 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/23000
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* testsuite/ld-x86-64/tlsdesc.pd: Updated.
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2018-03-23 Nick Clifton <nickc@redhat.com>
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PR 22948
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@ -13,7 +13,7 @@ Disassembly of section .plt:
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[0-9a-f]+: ff 35 .. .. 20 00 pushq .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
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[0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201360 <_GLOBAL_OFFSET_TABLE_\+0x10>
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[0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\)
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[0-9a-f]+: f3 0f 1e fa endbr64
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[0-9a-f]+: ff 35 .. .. 20 00 pushq .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8>
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[0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201348 <.*>
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[0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\)
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