MIPS/BFD: Discard ineligible JALR relocations right away
Discard R_MIPS_JALR and R_MICROMIPS_JALR relocations associated with jumps that cannot be converted to an equivalent branch right away in `mips_elf_calculate_relocation' rather than letting them through to `mips_elf_perform_relocation'. This includes cross-mode jumps which need to flip the ISA bit or jumps to a misaligned location that cannot be encoded with a branch, in addition to preemptible symbol references already handled. Cross-mode jumps are actually already rejected as the conversion is made in `mips_elf_perform_relocation', so in this case this change only saves some processing. Jumps to a misaligned location are however converted, with bits causing misalignment lost, making resulting code functionally different even if the lone effect is avoiding an address error exception with an instruction fetch at the jump destination requested. Add test cases suitable, also including GAS verification to confirm that the JALR relocations explicitly requested have indeed been output in the intermediate objects used. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR> <R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p' or misaligned. gas/ * testsuite/gas/mips/jalr4.d: New test. * testsuite/gas/mips/jalr4-n32.d: New test. * testsuite/gas/mips/jalr4-n64.d: New test. * testsuite/gas/mips/jalr4.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/jalr4.dd: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
This commit is contained in:
parent
a567769b81
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@ -1,3 +1,9 @@
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2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
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* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_JALR>
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<R_MICROMIPS_JALR>: Discard relocation if `cross_mode_jump_p'
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or misaligned.
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2017-02-23 Alan Modra <amodra@gmail.com>
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PR 20744
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@ -6278,7 +6278,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd,
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when the symbol does not resolve locally. */
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if (h != NULL && !SYMBOL_CALLS_LOCAL (info, &h->root))
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return bfd_reloc_continue;
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/* We can't optimize cross-mode jumps either. */
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if (*cross_mode_jump_p)
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return bfd_reloc_continue;
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value = symbol + addend;
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/* Neither we can non-instruction-aligned targets. */
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if (r_type == R_MIPS_JALR ? (value & 3) != 0 : (value & 1) == 0)
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return bfd_reloc_continue;
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break;
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case R_MIPS_PJUMP:
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@ -1,3 +1,11 @@
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2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/gas/mips/jalr4.d: New test.
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* testsuite/gas/mips/jalr4-n32.d: New test.
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* testsuite/gas/mips/jalr4-n64.d: New test.
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* testsuite/gas/mips/jalr4.s: New test source.
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* testsuite/gas/mips/mips.exp: Run the new tests.
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2017-02-23 Sheldon Lobo <sheldon.lobo@oracle.com>
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Add support for associating SPARC ASIs with an architecture level.
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5
gas/testsuite/gas/mips/jalr4-n32.d
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5
gas/testsuite/gas/mips/jalr4-n32.d
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@ -0,0 +1,5 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JALR reloc unaligned/cross-mode (n32)
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#as: -n32
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#source: jalr4.s
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#dump: jalr4.d
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42
gas/testsuite/gas/mips/jalr4-n64.d
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42
gas/testsuite/gas/mips/jalr4-n64.d
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@ -0,0 +1,42 @@
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JALR reloc unaligned/cross-mode (n64)
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#as: -64
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#source: jalr4.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar0
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320000[89] jr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar0
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar1
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320000[89] jr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar1
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar2
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320000[89] jr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar2
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*
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[0-9a-f]+ <[^>]*> 00000000 nop
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\.\.\.
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\.\.\.
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\.\.\.
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\.\.\.
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30
gas/testsuite/gas/mips/jalr4.d
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30
gas/testsuite/gas/mips/jalr4.d
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: MIPS JALR reloc unaligned/cross-mode (o32)
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#as: -32
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#source: jalr4.s
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar0
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320000[89] jr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar0
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar1
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320000[89] jr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar1
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar2
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320000[89] jr t9
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[ ]*[0-9a-f]+: R_MIPS_JALR bar2
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[0-9a-f]+ <[^>]*> 00000000 nop
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\.\.\.
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\.\.\.
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\.\.\.
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\.\.\.
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63
gas/testsuite/gas/mips/jalr4.s
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63
gas/testsuite/gas/mips/jalr4.s
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@ -0,0 +1,63 @@
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.abicalls
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.text
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.align 2
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.globl foo
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.ent foo
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foo:
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.reloc 1f, R_MIPS_JALR, bar0
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1: jalr $25
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.reloc 1f, R_MIPS_JALR, bar0
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1: jr $25
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.reloc 1f, R_MIPS_JALR, bar1
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1: jalr $25
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.reloc 1f, R_MIPS_JALR, bar1
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1: jr $25
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.reloc 1f, R_MIPS_JALR, bar2
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1: jalr $25
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.reloc 1f, R_MIPS_JALR, bar2
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1: jr $25
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.end foo
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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.align 2
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.globl bar0
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.ent bar0
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bar0:
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.insn
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.end bar0
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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.align 2
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.globl bar1
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.ent bar1
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.space 2
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bar1:
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.insn
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.end bar1
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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.set mips64r2
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.set mips16
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.align 2
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.globl bar2
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.ent bar2
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.byte 0
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bar2:
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.insn
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.end bar2
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.set nomips16
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.set mips0
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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@ -1182,13 +1182,21 @@ if { [istarget mips*-*-vxworks*] } {
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run_dump_test "jalr2"
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run_dump_test_arches "jalr3" [mips_arch_list_matching mips1 \
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!micromips]
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run_dump_test_arches "jalr4" [mips_arch_list_matching mips1 \
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!micromips]
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if $has_newabi {
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run_dump_test_arches "jalr3-n32" \
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[mips_arch_list_matching mips3 \
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!micromips]
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run_dump_test_arches "jalr4-n32" \
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[mips_arch_list_matching mips3 \
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!micromips]
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run_dump_test_arches "jalr3-n64" \
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[mips_arch_list_matching mips3 \
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!micromips]
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run_dump_test_arches "jalr4-n64" \
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[mips_arch_list_matching mips3 \
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!micromips]
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}
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run_dump_test_arches "aent" [mips_arch_list_matching mips1]
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@ -1,3 +1,8 @@
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2017-02-23 Maciej W. Rozycki <macro@imgtec.com>
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* testsuite/ld-mips-elf/jalr4.dd: New test.
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* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
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2017-02-23 Alan Modra <amodra@gmail.com>
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PR 20744
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19
ld/testsuite/ld-mips-elf/jalr4.dd
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19
ld/testsuite/ld-mips-elf/jalr4.dd
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@ -0,0 +1,19 @@
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.*: +file format .*mips.*
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Disassembly of section \.text:
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[0-9a-f]+ <[^>]*> 0411000f bal 0+000040 <bar0>
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 1000000d b 0+000040 <bar0>
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 03200008 jr t9
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 0320f809 jalr t9
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 03200008 jr t9
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[0-9a-f]+ <[^>]*> 00000000 nop
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\.\.\.
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\.\.\.
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\.\.\.
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\.\.\.
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@ -999,7 +999,14 @@ foreach { abi } $abis {
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"$abi_asflags($abi)" \
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[list ../../../gas/testsuite/gas/mips/jalr3.s] \
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[list "objdump -d jalr3.dd"] \
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"jalr3-${abi}"]]
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"jalr3-${abi}"] \
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[list \
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"MIPS JALR reloc unaligned/cross-mode link test ($abi)" \
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"$abi_ldflags($abi) -T jalr3.ld" "" \
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"$abi_asflags($abi)" \
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[list ../../../gas/testsuite/gas/mips/jalr4.s] \
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[list "objdump {-d --prefix-addresses --show-raw-insn} jalr4.dd"] \
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"jalr4-${abi}"]]
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}
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proc build_mips_plt_lib { abi } {
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