PowerPC disassembler: Don't emit trailing spaces
When an instruction has operands, the PowerPC disassembler prints spaces after the opcode so as to line up operands. If the operands are all optional and all default value, then no operands are printed, leaving trailing spaces. This patch fixes that. opcodes/ * ppc-dis.c (print_insn_powerpc): Delay printing spaces after opcode until first operand is output. gas/ * testsuite/gas/ppc/476.d: Remove trailing spaces. * testsuite/gas/ppc/a2.d: Likewise. * testsuite/gas/ppc/booke.d: Likewise. * testsuite/gas/ppc/booke_xcoff.d: Likewise. * testsuite/gas/ppc/e500.d: Likewise. * testsuite/gas/ppc/e500mc.d: Likewise. * testsuite/gas/ppc/e6500.d: Likewise. * testsuite/gas/ppc/htm.d: Likewise. * testsuite/gas/ppc/power6.d: Likewise. * testsuite/gas/ppc/power8.d: Likewise. * testsuite/gas/ppc/power9.d: Likewise. * testsuite/gas/ppc/vle.d: Likewise. ld/ * testsuite/ld-powerpc/tlsexe32.d: Remove trailing spaces. * testsuite/ld-powerpc/tlsopt5.d: Likewise. * testsuite/ld-powerpc/tlsopt5_32.d: Likewise.
This commit is contained in:
Alan Modra
parent
82477cd28a
commit
c2b1c27545
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@ -1,3 +1,18 @@
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2019-04-05 Alan Modra <amodra@gmail.com>
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* testsuite/gas/ppc/476.d: Remove trailing spaces.
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* testsuite/gas/ppc/a2.d: Likewise.
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* testsuite/gas/ppc/booke.d: Likewise.
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* testsuite/gas/ppc/booke_xcoff.d: Likewise.
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* testsuite/gas/ppc/e500.d: Likewise.
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* testsuite/gas/ppc/e500mc.d: Likewise.
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* testsuite/gas/ppc/e6500.d: Likewise.
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* testsuite/gas/ppc/htm.d: Likewise.
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* testsuite/gas/ppc/power6.d: Likewise.
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* testsuite/gas/ppc/power8.d: Likewise.
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* testsuite/gas/ppc/power9.d: Likewise.
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* testsuite/gas/ppc/vle.d: Likewise.
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2019-04-04 Peter Bergner <bergner@linux.ibm.com>
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PR gas/24349
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@ -40,20 +40,20 @@ Disassembly of section \.text:
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78: (48 00 00 02|02 00 00 48) ba 0 <ppc476>
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7c: (40 01 00 00|00 00 01 40) bdnzf gt,7c <ppc476\+0x7c>
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80: (40 85 00 02|02 00 85 40) blea cr1,0 <ppc476>
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84: (4d 80 04 20|20 04 80 4d) bltctr
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84: (4d 80 04 20|20 04 80 4d) bltctr
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88: (4c 8a 04 20|20 04 8a 4c) bnectr cr2
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8c: (4c 86 04 20|20 04 86 4c) bnectr cr1
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90: (4c 86 04 20|20 04 86 4c) bnectr cr1
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94: (4d 80 04 21|21 04 80 4d) bltctrl
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94: (4d 80 04 21|21 04 80 4d) bltctrl
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98: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2
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9c: (4c 86 04 21|21 04 86 4c) bnectrl cr1
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a0: (4c 86 04 21|21 04 86 4c) bnectrl cr1
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a4: (40 43 00 01|01 00 43 40) bdzfl so,a4 <ppc476\+0xa4>
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a8: (4d 80 00 20|20 00 80 4d) bltlr
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a8: (4d 80 00 20|20 00 80 4d) bltlr
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ac: (4c 8a 00 20|20 00 8a 4c) bnelr cr2
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b0: (4c 86 00 20|20 00 86 4c) bnelr cr1
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b4: (4c 86 00 20|20 00 86 4c) bnelr cr1
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b8: (4d 80 00 21|21 00 80 4d) bltlrl
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b8: (4d 80 00 21|21 00 80 4d) bltlrl
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bc: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2
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c0: (4c 86 00 21|21 00 86 4c) bnelrl cr1
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c4: (4c 86 00 21|21 00 86 4c) bnelrl cr1
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@ -100,9 +100,9 @@ Disassembly of section \.text:
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168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
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16c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
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170: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
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174: (7c 00 03 8c|8c 03 00 7c) dccci
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178: (7c 00 03 8c|8c 03 00 7c) dccci
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17c: (7c 00 03 8c|8c 03 00 7c) dccci
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174: (7c 00 03 8c|8c 03 00 7c) dccci
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178: (7c 00 03 8c|8c 03 00 7c) dccci
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17c: (7c 00 03 8c|8c 03 00 7c) dccci
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180: (7c 20 03 8c|8c 03 20 7c) dci 1
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184: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12
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188: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13
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@ -203,9 +203,9 @@ Disassembly of section \.text:
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304: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18
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308: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9
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30c: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15
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310: (7c 00 07 8c|8c 07 00 7c) iccci
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314: (7c 00 07 8c|8c 07 00 7c) iccci
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318: (7c 00 07 8c|8c 07 00 7c) iccci
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310: (7c 00 07 8c|8c 07 00 7c) iccci
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314: (7c 00 07 8c|8c 07 00 7c) iccci
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318: (7c 00 07 8c|8c 07 00 7c) iccci
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31c: (7c 20 07 8c|8c 07 20 7c) ici 1
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320: (7c 03 27 cc|cc 27 03 7c) icread r3,r4
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324: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
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@ -292,8 +292,8 @@ Disassembly of section \.text:
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468: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5
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46c: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5
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470: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5
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474: (7c 00 06 ac|ac 06 00 7c) mbar
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478: (7c 00 06 ac|ac 06 00 7c) mbar
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474: (7c 00 06 ac|ac 06 00 7c) mbar
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478: (7c 00 06 ac|ac 06 00 7c) mbar
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47c: (7c 20 06 ac|ac 06 20 7c) mbar 1
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480: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
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484: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
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@ -412,7 +412,7 @@ Disassembly of section \.text:
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648: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
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64c: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
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650: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
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654: (44 00 00 02|02 00 00 44) sc
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654: (44 00 00 02|02 00 00 44) sc
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658: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5
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65c: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5
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660: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5
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@ -476,8 +476,8 @@ Disassembly of section \.text:
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748: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14
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74c: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14
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750: (7c 00 04 6c|6c 04 00 7c) tlbsync
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754: (7c 00 07 a4|a4 07 00 7c) tlbwe
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758: (7c 00 07 a4|a4 07 00 7c) tlbwe
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754: (7c 00 07 a4|a4 07 00 7c) tlbwe
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758: (7c 00 07 a4|a4 07 00 7c) tlbwe
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75c: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1
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760: (7f e0 00 08|08 00 e0 7f) trap
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764: (7f e0 00 08|08 00 e0 7f) trap
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@ -128,9 +128,9 @@ Disassembly of section \.text:
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190: (7c 2a 59 0c|0c 59 2a 7c) dcbtstls 1,r10,r11
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194: (7c 0a 5f ec|ec 5f 0a 7c) dcbz r10,r11
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198: (7c 0a 5f fe|fe 5f 0a 7c) dcbzep r10,r11
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19c: (7c 00 03 8c|8c 03 00 7c) dccci
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1a0: (7c 00 03 8c|8c 03 00 7c) dccci
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1a4: (7c 00 03 8c|8c 03 00 7c) dccci
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19c: (7c 00 03 8c|8c 03 00 7c) dccci
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1a0: (7c 00 03 8c|8c 03 00 7c) dccci
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1a4: (7c 00 03 8c|8c 03 00 7c) dccci
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1a8: (7d 40 03 8c|8c 03 40 7d) dci 10
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1ac: (7e 95 b3 d3|d3 b3 95 7e) divd\. r20,r21,r22
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1b0: (7e 95 b3 d2|d2 b3 95 7e) divd r20,r21,r22
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@ -268,9 +268,9 @@ Disassembly of section \.text:
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3c0: (7c ea 58 2c|2c 58 ea 7c) icbt 7,r10,r11
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3c4: (7c 0a 5b cc|cc 5b 0a 7c) icbtls r10,r11
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3c8: (7c ea 5b cc|cc 5b ea 7c) icbtls 7,r10,r11
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3cc: (7c 00 07 8c|8c 07 00 7c) iccci
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3d0: (7c 00 07 8c|8c 07 00 7c) iccci
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3d4: (7c 00 07 8c|8c 07 00 7c) iccci
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3cc: (7c 00 07 8c|8c 07 00 7c) iccci
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3d0: (7c 00 07 8c|8c 07 00 7c) iccci
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3d4: (7c 00 07 8c|8c 07 00 7c) iccci
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3d8: (7d 40 07 8c|8c 07 40 7d) ici 10
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3dc: (7d 4b 63 2d|2d 63 4b 7d) icswx\. r10,r11,r12
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3e0: (7d 4b 63 2c|2c 63 4b 7d) icswx r10,r11,r12
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@ -338,9 +338,9 @@ Disassembly of section \.text:
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4d8: (85 4b 00 04|04 00 4b 85) lwzu r10,4\(r11\)
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4dc: (7d 4b 60 6e|6e 60 4b 7d) lwzux r10,r11,r12
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4e0: (7d 4b 60 2e|2e 60 4b 7d) lwzx r10,r11,r12
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4e4: (7c 00 06 ac|ac 06 00 7c) mbar
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4e8: (7c 00 06 ac|ac 06 00 7c) mbar
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4ec: (7c 00 06 ac|ac 06 00 7c) mbar
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4e4: (7c 00 06 ac|ac 06 00 7c) mbar
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4e8: (7c 00 06 ac|ac 06 00 7c) mbar
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4ec: (7c 00 06 ac|ac 06 00 7c) mbar
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4f0: (7c 20 06 ac|ac 06 20 7c) mbar 1
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4f4: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
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4f8: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
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@ -453,7 +453,7 @@ Disassembly of section \.text:
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6a4: (55 6a b8 3e|3e b8 6a 55) rotlwi r10,r11,23
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6a8: (5d 6a b8 3f|3f b8 6a 5d) rotlw\. r10,r11,r23
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6ac: (5d 6a b8 3e|3e b8 6a 5d) rotlw r10,r11,r23
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6b0: (44 00 00 02|02 00 00 44) sc
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6b0: (44 00 00 02|02 00 00 44) sc
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6b4: (44 00 0c 82|82 0c 00 44) sc 100
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6b8: (7d 6a 60 37|37 60 6a 7d) sld\. r10,r11,r12
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6bc: (7d 6a 60 36|36 60 6a 7d) sld r10,r11,r12
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@ -553,25 +553,25 @@ Disassembly of section \.text:
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834: (08 aa ff 9c|9c ff aa 08) tdlgei r10,-100
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838: (7c 6a 58 24|24 58 6a 7c) tlbilxva r10,r11
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83c: (7c 0a 5e 24|24 5e 0a 7c) tlbivax r10,r11
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840: (7c 00 07 64|64 07 00 7c) tlbre
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840: (7c 00 07 64|64 07 00 7c) tlbre
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844: (7d 4b 3f 64|64 3f 4b 7d) tlbre r10,r11,7
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848: (7c 0a 5e a5|a5 5e 0a 7c) tlbsrx\. r10,r11
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84c: (7d 4b 67 25|25 67 4b 7d) tlbsx\. r10,r11,r12
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850: (7d 4b 67 24|24 67 4b 7d) tlbsx r10,r11,r12
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854: (7c 00 04 6c|6c 04 00 7c) tlbsync
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858: (7c 00 07 a4|a4 07 00 7c) tlbwe
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858: (7c 00 07 a4|a4 07 00 7c) tlbwe
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85c: (7d 4b 3f a4|a4 3f 4b 7d) tlbwe r10,r11,7
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860: (7c aa 58 08|08 58 aa 7c) twlge r10,r11
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864: (0c aa 00 64|64 00 aa 0c) twlgei r10,100
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868: (0c aa ff 9c|9c ff aa 0c) twlgei r10,-100
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86c: (7c 00 00 7c|7c 00 00 7c) wait
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870: (7c 00 00 7c|7c 00 00 7c) wait
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86c: (7c 00 00 7c|7c 00 00 7c) wait
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870: (7c 00 00 7c|7c 00 00 7c) wait
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874: (7c 20 00 7c|7c 00 20 7c) waitrsv
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878: (7c 40 00 7c|7c 00 40 7c) waitimpl
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87c: (7c 40 00 7c|7c 00 40 7c) waitimpl
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880: (7c 20 00 7c|7c 00 20 7c) waitrsv
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884: (7c 00 01 6c|6c 01 00 7c) wchkall
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888: (7c 00 01 6c|6c 01 00 7c) wchkall
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884: (7c 00 01 6c|6c 01 00 7c) wchkall
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888: (7c 00 01 6c|6c 01 00 7c) wchkall
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88c: (7d 80 01 6c|6c 01 80 7d) wchkall cr3
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890: (7c 2a 5f 4c|4c 5f 2a 7c) wclr 1,r10,r11
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894: (7c 20 07 4c|4c 07 20 7c) wclrall 1
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@ -11,8 +11,8 @@ Disassembly of section \.text:
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4: (7c a6 02 26|26 02 a6 7c) mfapidi r5,r6
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8: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8
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c: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12
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10: (7c 00 07 a4|a4 07 00 7c) tlbwe
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14: (7c 00 07 a4|a4 07 00 7c) tlbwe
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10: (7c 00 07 a4|a4 07 00 7c) tlbwe
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14: (7c 00 07 a4|a4 07 00 7c) tlbwe
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18: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1
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0+000001c <branch_target_2>:
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@ -25,8 +25,8 @@ Disassembly of section \.text:
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34: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8
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38: (7c 00 04 ac|ac 04 00 7c) msync
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3c: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10
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40: (7c 00 06 ac|ac 06 00 7c) mbar
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44: (7c 00 06 ac|ac 06 00 7c) mbar
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40: (7c 00 06 ac|ac 06 00 7c) mbar
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44: (7c 00 06 ac|ac 06 00 7c) mbar
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48: (7c 20 06 ac|ac 06 20 7c) mbar 1
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4c: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14
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50: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14
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@ -22,4 +22,4 @@ Disassembly of section .text:
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30: 7d 10 6b 86 mtdcr 432,r8
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34: 7c 00 04 ac msync
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38: 7c 09 55 ec dcba r9,r10
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3c: 7c 00 06 ac mbar
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3c: 7c 00 06 ac mbar
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@ -50,7 +50,7 @@ Disassembly of section \.text:
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a0: (10 a0 22 f6|f6 22 a0 10) efdctuf r5,r4
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a4: (10 a0 22 ef|ef 22 a0 10) efdcfs r5,r4
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a8: (7c 20 06 ac|ac 06 20 7c) mbar 1
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ac: (7c 00 06 ac|ac 06 00 7c) mbar
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ac: (7c 00 06 ac|ac 06 00 7c) mbar
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b0: (7c 20 06 ac|ac 06 20 7c) mbar 1
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b4: (7c 00 04 ac|ac 04 00 7c) msync
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b8: (7c 00 04 ac|ac 04 00 7c) msync
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@ -14,8 +14,8 @@ Disassembly of section \.text:
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10: (7c 09 57 be|be 57 09 7c) icbiep r9,r10
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14: (7c 00 69 dc|dc 69 00 7c) msgclr r13
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18: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
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1c: (7c 00 00 7c|7c 00 00 7c) wait
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20: (7c 00 00 7c|7c 00 00 7c) wait
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1c: (7c 00 00 7c|7c 00 00 7c) wait
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20: (7c 00 00 7c|7c 00 00 7c) wait
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24: (7c 20 00 7c|7c 00 20 7c) waitrsv
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28: (7c 20 00 7c|7c 00 20 7c) waitrsv
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2c: (7c 40 00 7c|7c 00 40 7c) waitimpl
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@ -59,8 +59,8 @@ Disassembly of section \.text:
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c4: (7c 00 16 0a|0a 16 00 7c) lvsm v0,0,r2
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c8: (7c 01 16 0a|0a 16 01 7c) lvsm v0,r1,r2
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cc: (7f 5a d3 78|78 d3 5a 7f) miso
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d0: (7c 00 04 ac|ac 04 00 7c) sync
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d4: (7c 00 04 ac|ac 04 00 7c) sync
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d0: (7c 00 04 ac|ac 04 00 7c) sync
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d4: (7c 00 04 ac|ac 04 00 7c) sync
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d8: (7c 20 04 ac|ac 04 20 7c) lwsync
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dc: (7c 21 04 ac|ac 04 21 7c) sync 1,1
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e0: (7c 07 04 ac|ac 04 07 7c) sync 0,7
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@ -12,10 +12,10 @@ Disassembly of section \.text:
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8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
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c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
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10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
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14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
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14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
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18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
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1c: (7c 00 05 5d|5d 05 00 7c) tend\.
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20: (7c 00 05 5d|5d 05 00 7c) tend\.
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1c: (7c 00 05 5d|5d 05 00 7c) tend\.
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20: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
24: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
28: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
|
||||
|
|
|
|||
|
|
@ -71,8 +71,8 @@ Disassembly of section \.text:
|
|||
f4: (7d 4b 60 94|94 60 4b 7d) addg6s r10,r11,r12
|
||||
f8: (60 21 00 00|00 00 21 60) ori r1,r1,0
|
||||
fc: (60 21 00 00|00 00 21 60) ori r1,r1,0
|
||||
.*: (7c 00 03 e4|e4 03 00 7c) slbia
|
||||
.*: (7c 00 03 e4|e4 03 00 7c) slbia
|
||||
.*: (7c 00 03 e4|e4 03 00 7c) slbia
|
||||
.*: (7c 00 03 e4|e4 03 00 7c) slbia
|
||||
.*: (7c e0 03 e4|e4 03 e0 7c) slbia 7
|
||||
.*: (7c 00 52 64|64 52 00 7c) tlbie r10
|
||||
.*: (7c 00 52 64|64 52 00 7c) tlbie r10
|
||||
|
|
|
|||
|
|
@ -12,10 +12,10 @@ Disassembly of section \.text:
|
|||
8: (7e 8b 56 5d|5d 56 8b 7e) tabortdc\. 20,r11,r10
|
||||
c: (7e 2a 9e 9d|9d 9e 2a 7e) tabortwci\. 17,r10,-13
|
||||
10: (7f a3 de dd|dd de a3 7f) tabortdci\. 29,r3,-5
|
||||
14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
|
||||
14: (7c 00 05 1d|1d 05 00 7c) tbegin\.
|
||||
18: (7f 80 05 9c|9c 05 80 7f) tcheck cr7
|
||||
1c: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
20: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
1c: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
20: (7c 00 05 5d|5d 05 00 7c) tend\.
|
||||
24: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
28: (7e 00 05 5d|5d 05 00 7e) tendall\.
|
||||
2c: (7c 18 07 5d|5d 07 18 7c) treclaim\. r24
|
||||
|
|
@ -28,12 +28,12 @@ Disassembly of section \.text:
|
|||
48: (60 00 00 00|00 00 00 60) nop
|
||||
4c: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||
50: (4c 00 01 24|24 01 00 4c) rfebb 0
|
||||
54: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
58: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
54: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
58: (4c 00 09 24|24 09 00 4c) rfebb
|
||||
5c: (4d d5 04 60|60 04 d5 4d) bgttar- cr5
|
||||
60: (4c c7 04 61|61 04 c7 4c) bnstarl- cr1
|
||||
64: (4d ec 04 60|60 04 ec 4d) blttar\+ cr3
|
||||
68: (4c e2 04 61|61 04 e2 4c) bnetarl\+
|
||||
68: (4c e2 04 61|61 04 e2 4c) bnetarl\+
|
||||
6c: (4c 88 0c 60|60 0c 88 4c) bctar 4,4\*cr2\+lt,1
|
||||
70: (4c 87 14 61|61 14 87 4c) bctarl 4,4\*cr1\+so,2
|
||||
74: (7c 00 00 3c|3c 00 00 7c) waitasec
|
||||
|
|
|
|||
|
|
@ -361,8 +361,8 @@ Disassembly of section \.text:
|
|||
.*: (7d 40 7a 6a|6a 7a 40 7d) ldmx r10,0,r15
|
||||
.*: (7d 43 7a 6a|6a 7a 43 7d) ldmx r10,r3,r15
|
||||
.*: (4c 00 02 e4|e4 02 00 4c) stop
|
||||
.*: (7c 00 00 3c|3c 00 00 7c) wait
|
||||
.*: (7c 00 00 3c|3c 00 00 7c) wait
|
||||
.*: (7c 00 00 3c|3c 00 00 7c) wait
|
||||
.*: (7c 00 00 3c|3c 00 00 7c) wait
|
||||
.*: (7c 60 05 e6|e6 05 60 7c) darn r3,0
|
||||
.*: (7c 61 05 e6|e6 05 61 7c) darn r3,1
|
||||
.*: (7c 62 05 e6|e6 05 62 7c) darn r3,2
|
||||
|
|
|
|||
|
|
@ -149,6 +149,6 @@ Disassembly of section \.text:
|
|||
196: 79 ff ff 82 e_b 118 <middle_label>
|
||||
19a: 79 ff fe 67 e_bl 0 <start_label>
|
||||
19e: 00 0c se_rfgi
|
||||
1a0: 7c 00 00 48 e_sc
|
||||
1a4: 7c 00 00 48 e_sc
|
||||
1a0: 7c 00 00 48 e_sc
|
||||
1a4: 7c 00 00 48 e_sc
|
||||
1a8: 7c 00 08 48 e_sc 1
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2019-04-05 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* testsuite/ld-powerpc/tlsexe32.d: Remove trailing spaces.
|
||||
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
|
||||
* testsuite/ld-powerpc/tlsopt5_32.d: Likewise.
|
||||
|
||||
2019-04-03 Alan Modra <amodra@gmail.com>
|
||||
|
||||
PR 24411
|
||||
|
|
|
|||
|
|
@ -48,7 +48,7 @@ Disassembly of section \.text:
|
|||
.*: (7c 60 1b 78|78 1b 60 7c) mr r0,r3
|
||||
.*: (2c 0b 00 00|00 00 0b 2c) cmpwi r11,0
|
||||
.*: (7c 6c 12 14|14 12 6c 7c) add r3,r12,r2
|
||||
.*: (4d 82 00 20|20 00 82 4d) beqlr
|
||||
.*: (4d 82 00 20|20 00 82 4d) beqlr
|
||||
.*: (7c 03 03 78|78 03 03 7c) mr r3,r0
|
||||
.*: (60 00 00 00|00 00 00 60) nop
|
||||
.*: (3d 60 01 81|81 01 60 3d) lis r11,385
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@ Disassembly of section \.text:
|
|||
.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3
|
||||
.*: (00 00 2b 2c|2c 2b 00 00) cmpdi r11,0
|
||||
.*: (14 6a 6c 7c|7c 6c 6a 14) add r3,r12,r13
|
||||
.*: (20 00 82 4d|4d 82 00 20) beqlr
|
||||
.*: (20 00 82 4d|4d 82 00 20) beqlr
|
||||
.*: (78 03 03 7c|7c 03 03 78) mr r3,r0
|
||||
.*: (a6 02 68 7d|7d 68 02 a6) mflr r11
|
||||
.*: (08 00 61 f9|f9 61 00 08) std r11,8\(r1\)
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@ Disassembly of section \.text:
|
|||
.*: (78 1b 60 7c|7c 60 1b 78) mr r0,r3
|
||||
.*: (00 00 0b 2c|2c 0b 00 00) cmpwi r11,0
|
||||
.*: (14 12 6c 7c|7c 6c 12 14) add r3,r12,r2
|
||||
.*: (20 00 82 4d|4d 82 00 20) beqlr
|
||||
.*: (20 00 82 4d|4d 82 00 20) beqlr
|
||||
.*: (78 03 03 7c|7c 03 03 78) mr r3,r0
|
||||
.*: (00 00 00 60|60 00 00 00) nop
|
||||
.*: (0c 00 7e 81|81 7e 00 0c) lwz r11,12\(r30\)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2019-04-05 Alan Modra <amodra@gmail.com>
|
||||
|
||||
* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
|
||||
opcode until first operand is output.
|
||||
|
||||
2019-04-04 Peter Bergner <bergner@linux.ibm.com>
|
||||
|
||||
PR gas/24349
|
||||
|
|
|
|||
|
|
@ -723,11 +723,13 @@ print_insn_powerpc (bfd_vma memaddr,
|
|||
int need_comma;
|
||||
int need_paren;
|
||||
int skip_optional;
|
||||
int spaces;
|
||||
|
||||
if (opcode->operands[0] != 0)
|
||||
(*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
|
||||
else
|
||||
(*info->fprintf_func) (info->stream, "%s", opcode->name);
|
||||
(*info->fprintf_func) (info->stream, "%s", opcode->name);
|
||||
/* gdb fprintf_func doesn't return count printed. */
|
||||
spaces = 8 - strlen (opcode->name);
|
||||
if (spaces <= 0)
|
||||
spaces = 1;
|
||||
|
||||
/* Now extract and print the operands. */
|
||||
need_comma = 0;
|
||||
|
|
@ -752,6 +754,11 @@ print_insn_powerpc (bfd_vma memaddr,
|
|||
|
||||
value = operand_value_powerpc (operand, insn, dialect);
|
||||
|
||||
if (spaces)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, "%*s", spaces, " ");
|
||||
spaces = 0;
|
||||
}
|
||||
if (need_comma)
|
||||
{
|
||||
(*info->fprintf_func) (info->stream, ",");
|
||||
|
|
|
|||
Loading…
Reference in New Issue