gas/
2007-08-09 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb. gas/testsuite/ 2007-08-09 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel, x86-64-sse4_1-intel and x86-64-sse4_2-intel. * gas/i386/sse4_1-intel.d: New file. * gas/i386/sse4_2-intel.d: Likewise. * gas/i386/x86-64-sse4_1-intel.d: Likewise. * gas/i386/x86-64-sse4_2-intel.d: Likewise. * gas/i386/sse4_1.s: Add tests for Intel syntax. * gas/i386/sse4_2.s: Likewise. * gas/i386/x86-64-sse4_1.s: Likewise. * gas/i386/x86-64-sse4_2.s: Likewise. * gas/i386/sse4_1.d: Updated. * gas/i386/sse4_2.d: Likewise. * gas/i386/x86-64-sse4_1.d: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. opcodes/ 2007-08-09 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq, pmovzxbw, pmovzxwd, pmovzxdq and roundsd. * i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu
parent
1e1c6a43f8
commit
c3ad16c0cd
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@ -1,3 +1,7 @@
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2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.
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2007-07-29 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (check_long_reg): Allow cvtss2si to convert
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@ -3062,13 +3062,16 @@ check_byte_reg (void)
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if (i.types[op] & Reg8)
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continue;
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/* movzx and movsx should not generate this warning. */
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/* movzx, movsx, pextrb and pinsrb should not generate this
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warning. */
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if (intel_syntax
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&& (i.tm.base_opcode == 0xfb7
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|| i.tm.base_opcode == 0xfb6
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|| i.tm.base_opcode == 0x63
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|| i.tm.base_opcode == 0xfbe
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|| i.tm.base_opcode == 0xfbf))
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|| i.tm.base_opcode == 0xfbf
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|| i.tm.base_opcode == 0x660f3a14
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|| i.tm.base_opcode == 0x660f3a20))
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continue;
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/* crc32 doesn't generate this warning. */
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@ -1,3 +1,23 @@
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2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
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x86-64-sse4_1-intel and x86-64-sse4_2-intel.
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* gas/i386/sse4_1-intel.d: New file.
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* gas/i386/sse4_2-intel.d: Likewise.
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* gas/i386/x86-64-sse4_1-intel.d: Likewise.
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* gas/i386/x86-64-sse4_2-intel.d: Likewise.
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* gas/i386/sse4_1.s: Add tests for Intel syntax.
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* gas/i386/sse4_2.s: Likewise.
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* gas/i386/x86-64-sse4_1.s: Likewise.
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* gas/i386/x86-64-sse4_2.s: Likewise.
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* gas/i386/sse4_1.d: Updated.
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* gas/i386/sse4_2.d: Likewise.
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* gas/i386/x86-64-sse4_1.d: Likewise.
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* gas/i386/x86-64-sse4_2.d: Likewise.
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2007-08-09 Alan Modra <amodra@bigpond.net.au>
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* gas/all/weakref1u.d (not-target): Match *-*-*aout.
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@ -82,7 +82,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "addr16"
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run_dump_test "addr32"
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run_dump_test "sse4_1"
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run_dump_test "sse4_1-intel"
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run_dump_test "sse4_2"
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run_dump_test "sse4_2-intel"
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run_dump_test "crc32"
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run_dump_test "crc32-intel"
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run_list_test "inval-crc32" "-al"
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@ -179,7 +181,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-nops-4-core2"
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run_dump_test "x86-64-nops-4-k8"
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run_dump_test "x86-64-sse4_1"
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run_dump_test "x86-64-sse4_1-intel"
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run_dump_test "x86-64-sse4_2"
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run_dump_test "x86-64-sse4_2-intel"
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run_dump_test "x86-64-crc32"
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run_dump_test "x86-64-crc32-intel"
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run_list_test "x86-64-inval-crc32" "-al"
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@ -0,0 +1,196 @@
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#objdump: -dwMintel
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#name: i386 SSE4.1 (Intel disassembly)
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#source: sse4_1.s
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.*: file format .*
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Disassembly of section .text:
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0+000 <foo>:
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[ ]*[a-f0-9]+: 66 0f 3a 0d 01 00 blendpd xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0d c1 00 blendpd xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0c 01 00 blendps xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0c c1 00 blendps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 38 15 01 blendvpd xmm0,XMMWORD PTR \[ecx\],xmm0
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[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd xmm0,xmm1,xmm0
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[ ]*[a-f0-9]+: 66 0f 38 14 01 blendvps xmm0,XMMWORD PTR \[ecx\],xmm0
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[ ]*[a-f0-9]+: 66 0f 38 14 c1 blendvps xmm0,xmm1,xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 41 01 00 dppd xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 41 c1 00 dppd xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 40 01 00 dpps xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 40 c1 00 dpps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 17 c1 00 extractps ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 17 01 00 extractps DWORD PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 21 c1 00 insertps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 21 01 00 insertps xmm0,DWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 38 2a 01 movntdqa xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 3a 42 01 00 mpsadbw xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 42 c1 00 mpsadbw xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 38 2b 01 packusdw xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 2b c1 packusdw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 10 01 pblendvb xmm0,XMMWORD PTR \[ecx\],xmm0
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[ ]*[a-f0-9]+: 66 0f 38 10 c1 pblendvb xmm0,xmm1,xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 0e 01 00 pblendw xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0e c1 00 pblendw xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 38 29 c1 pcmpeqq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 29 01 pcmpeqq xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 3a 14 c1 00 pextrb ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 14 01 00 pextrb BYTE PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 16 c1 00 pextrd ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 16 01 00 pextrd DWORD PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f c5 c8 00 pextrw ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 15 01 00 pextrw WORD PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 38 41 c1 phminposuw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 41 01 phminposuw xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 3a 20 01 00 pinsrb xmm0,BYTE PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 20 c1 00 pinsrb xmm0,ecx,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 22 01 00 pinsrd xmm0,DWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 22 c1 00 pinsrd xmm0,ecx,0x0
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[ ]*[a-f0-9]+: 66 0f 38 3c c1 pmaxsb xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 3c 01 pmaxsb xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 3d c1 pmaxsd xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 3d 01 pmaxsd xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 3f c1 pmaxud xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 3f 01 pmaxud xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 3e c1 pmaxuw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 3e 01 pmaxuw xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 38 c1 pminsb xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 38 01 pminsb xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 39 c1 pminsd xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 39 01 pminsd xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 3b c1 pminud xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 3b 01 pminud xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 3a c1 pminuw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 3a 01 pminuw xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 21 c1 pmovsxbd xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 21 01 pmovsxbd xmm0,DWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 22 c1 pmovsxbq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 22 01 pmovsxbq xmm0,WORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 23 c1 pmovsxwd xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 23 01 pmovsxwd xmm0,QWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 24 c1 pmovsxwq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 24 01 pmovsxwq xmm0,DWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 25 c1 pmovsxdq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 25 01 pmovsxdq xmm0,QWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 30 c1 pmovzxbw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 30 01 pmovzxbw xmm0,QWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 33 c1 pmovzxwd xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 33 01 pmovzxwd xmm0,QWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 35 c1 pmovzxdq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 35 01 pmovzxdq xmm0,QWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 28 c1 pmuldq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 28 01 pmuldq xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 40 c1 pmulld xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 40 01 pmulld xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 17 01 ptest xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 3a 09 01 00 roundpd xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 08 01 00 roundps xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0b 01 00 roundsd xmm0,QWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0a 01 00 roundss xmm0,DWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0d 01 00 blendpd xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0d c1 00 blendpd xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0c 01 00 blendps xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0c c1 00 blendps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 38 15 01 blendvpd xmm0,XMMWORD PTR \[ecx\],xmm0
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[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd xmm0,xmm1,xmm0
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[ ]*[a-f0-9]+: 66 0f 38 14 01 blendvps xmm0,XMMWORD PTR \[ecx\],xmm0
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[ ]*[a-f0-9]+: 66 0f 38 14 c1 blendvps xmm0,xmm1,xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 41 01 00 dppd xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 41 c1 00 dppd xmm0,xmm1,0x0
|
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[ ]*[a-f0-9]+: 66 0f 3a 40 01 00 dpps xmm0,XMMWORD PTR \[ecx\],0x0
|
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[ ]*[a-f0-9]+: 66 0f 3a 40 c1 00 dpps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 17 c1 00 extractps ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 17 01 00 extractps DWORD PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 21 c1 00 insertps xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 21 01 00 insertps xmm0,DWORD PTR \[ecx\],0x0
|
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[ ]*[a-f0-9]+: 66 0f 38 2a 01 movntdqa xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 3a 42 01 00 mpsadbw xmm0,XMMWORD PTR \[ecx\],0x0
|
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[ ]*[a-f0-9]+: 66 0f 3a 42 c1 00 mpsadbw xmm0,xmm1,0x0
|
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[ ]*[a-f0-9]+: 66 0f 38 2b 01 packusdw xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 2b c1 packusdw xmm0,xmm1
|
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[ ]*[a-f0-9]+: 66 0f 38 10 01 pblendvb xmm0,XMMWORD PTR \[ecx\],xmm0
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[ ]*[a-f0-9]+: 66 0f 38 10 c1 pblendvb xmm0,xmm1,xmm0
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[ ]*[a-f0-9]+: 66 0f 3a 0e 01 00 pblendw xmm0,XMMWORD PTR \[ecx\],0x0
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[ ]*[a-f0-9]+: 66 0f 3a 0e c1 00 pblendw xmm0,xmm1,0x0
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[ ]*[a-f0-9]+: 66 0f 38 29 c1 pcmpeqq xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 29 01 pcmpeqq xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 3a 14 c1 00 pextrb ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 14 01 00 pextrb BYTE PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 16 c1 00 pextrd ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 16 01 00 pextrd DWORD PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f c5 c8 00 pextrw ecx,xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 3a 15 01 00 pextrw WORD PTR \[ecx\],xmm0,0x0
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[ ]*[a-f0-9]+: 66 0f 38 41 c1 phminposuw xmm0,xmm1
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[ ]*[a-f0-9]+: 66 0f 38 41 01 phminposuw xmm0,XMMWORD PTR \[ecx\]
|
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[ ]*[a-f0-9]+: 66 0f 3a 20 01 00 pinsrb xmm0,BYTE PTR \[ecx\],0x0
|
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[ ]*[a-f0-9]+: 66 0f 3a 20 c1 00 pinsrb xmm0,ecx,0x0
|
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[ ]*[a-f0-9]+: 66 0f 3a 22 01 00 pinsrd xmm0,DWORD PTR \[ecx\],0x0
|
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[ ]*[a-f0-9]+: 66 0f 3a 22 c1 00 pinsrd xmm0,ecx,0x0
|
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[ ]*[a-f0-9]+: 66 0f 38 3c c1 pmaxsb xmm0,xmm1
|
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[ ]*[a-f0-9]+: 66 0f 38 3c 01 pmaxsb xmm0,XMMWORD PTR \[ecx\]
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[ ]*[a-f0-9]+: 66 0f 38 3d c1 pmaxsd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d 01 pmaxsd xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f c1 pmaxud xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f 01 pmaxud xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e c1 pmaxuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e 01 pmaxuw xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 c1 pminsb xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 01 pminsb xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 c1 pminsd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 01 pminsd xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b c1 pminud xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b 01 pminud xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a c1 pminuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a 01 pminuw xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 c1 pmovsxbd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 01 pmovsxbd xmm0,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 c1 pmovsxbq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 01 pmovsxbq xmm0,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 c1 pmovsxwd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 01 pmovsxwd xmm0,QWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 c1 pmovsxwq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 01 pmovsxwq xmm0,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 c1 pmovsxdq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 01 pmovsxdq xmm0,QWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 c1 pmovzxbw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 01 pmovzxbw xmm0,QWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 c1 pmovzxwd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 01 pmovzxwd xmm0,QWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 c1 pmovzxdq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 01 pmovzxdq xmm0,QWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 c1 pmuldq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 01 pmuldq xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 c1 pmulld xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 01 pmulld xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 01 ptest xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 01 00 roundpd xmm0,XMMWORD PTR \[ecx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 01 00 roundps xmm0,XMMWORD PTR \[ecx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b 01 00 roundsd xmm0,QWORD PTR \[ecx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a 01 00 roundss xmm0,DWORD PTR \[ecx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss xmm0,xmm1,0x0
|
||||
#pass
|
||||
|
|
@ -99,4 +99,97 @@ Disassembly of section .text:
|
|||
[ ]*[0-9a-f]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[0-9a-f]+: 66 0f 3a 0a 01 00 roundss \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[0-9a-f]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d 01 00 blendpd \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d c1 00 blendpd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c 01 00 blendps \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c c1 00 blendps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 01 blendvpd %xmm0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 01 blendvps %xmm0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 c1 blendvps %xmm0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 01 00 dppd \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 c1 00 dppd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 01 00 dpps \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 c1 00 dpps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 c1 00 extractps \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 01 00 extractps \$0x0,%xmm0,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 c1 00 insertps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 01 00 insertps \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2a 01 movntdqa \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 01 00 mpsadbw \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 c1 00 mpsadbw \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b 01 packusdw \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b c1 packusdw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 01 pblendvb %xmm0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 c1 pblendvb %xmm0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e 01 00 pblendw \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e c1 00 pblendw \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 c1 pcmpeqq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 01 pcmpeqq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 c1 00 pextrb \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 01 00 pextrb \$0x0,%xmm0,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 c1 00 pextrd \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 01 00 pextrd \$0x0,%xmm0,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: 66 0f c5 c8 00 pextrw \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 15 01 00 pextrw \$0x0,%xmm0,\(%ecx\)
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 c1 phminposuw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 01 phminposuw \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 01 00 pinsrb \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 c1 00 pinsrb \$0x0,%ecx,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 01 00 pinsrd \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 c1 00 pinsrd \$0x0,%ecx,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c c1 pmaxsb %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c 01 pmaxsb \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d c1 pmaxsd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d 01 pmaxsd \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f c1 pmaxud %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f 01 pmaxud \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e c1 pmaxuw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e 01 pmaxuw \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 c1 pminsb %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 01 pminsb \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 c1 pminsd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 01 pminsd \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b c1 pminud %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b 01 pminud \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a c1 pminuw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a 01 pminuw \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 c1 pmovsxbd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 01 pmovsxbd \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 c1 pmovsxbq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 01 pmovsxbq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 c1 pmovsxwd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 01 pmovsxwd \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 c1 pmovsxwq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 01 pmovsxwq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 c1 pmovsxdq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 01 pmovsxdq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 c1 pmovzxbw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 01 pmovzxbw \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 c1 pmovzxwd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 01 pmovzxwd \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 c1 pmovzxdq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 01 pmovzxdq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 c1 pmuldq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 01 pmuldq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 c1 pmulld %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 01 pmulld \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 01 ptest \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 01 00 roundpd \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 01 00 roundps \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b 01 00 roundsd \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a 01 00 roundss \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -96,4 +96,99 @@ foo:
|
|||
roundss $0,(%ecx),%xmm0
|
||||
roundss $0,%xmm1,%xmm0
|
||||
|
||||
.intel_syntax noprefix
|
||||
blendpd xmm0,XMMWORD PTR [ecx],0x0
|
||||
blendpd xmm0,xmm1,0x0
|
||||
blendps xmm0,XMMWORD PTR [ecx],0x0
|
||||
blendps xmm0,xmm1,0x0
|
||||
blendvpd xmm0,XMMWORD PTR [ecx],xmm0
|
||||
blendvpd xmm0,xmm1,xmm0
|
||||
blendvps xmm0,XMMWORD PTR [ecx],xmm0
|
||||
blendvps xmm0,xmm1,xmm0
|
||||
dppd xmm0,XMMWORD PTR [ecx],0x0
|
||||
dppd xmm0,xmm1,0x0
|
||||
dpps xmm0,XMMWORD PTR [ecx],0x0
|
||||
dpps xmm0,xmm1,0x0
|
||||
extractps ecx,xmm0,0x0
|
||||
extractps DWORD PTR [ecx],xmm0,0x0
|
||||
insertps xmm0,xmm1,0x0
|
||||
insertps xmm0,DWORD PTR [ecx],0x0
|
||||
movntdqa xmm0,XMMWORD PTR [ecx]
|
||||
mpsadbw xmm0,XMMWORD PTR [ecx],0x0
|
||||
mpsadbw xmm0,xmm1,0x0
|
||||
packusdw xmm0,XMMWORD PTR [ecx]
|
||||
packusdw xmm0,xmm1
|
||||
pblendvb xmm0,XMMWORD PTR [ecx],xmm0
|
||||
pblendvb xmm0,xmm1,xmm0
|
||||
pblendw xmm0,XMMWORD PTR [ecx],0x0
|
||||
pblendw xmm0,xmm1,0x0
|
||||
pcmpeqq xmm0,xmm1
|
||||
pcmpeqq xmm0,XMMWORD PTR [ecx]
|
||||
pextrb ecx,xmm0,0x0
|
||||
pextrb BYTE PTR [ecx],xmm0,0x0
|
||||
pextrd ecx,xmm0,0x0
|
||||
pextrd DWORD PTR [ecx],xmm0,0x0
|
||||
pextrw ecx,xmm0,0x0
|
||||
pextrw WORD PTR [ecx],xmm0,0x0
|
||||
phminposuw xmm0,xmm1
|
||||
phminposuw xmm0,XMMWORD PTR [ecx]
|
||||
pinsrb xmm0,BYTE PTR [ecx],0x0
|
||||
pinsrb xmm0,ecx,0x0
|
||||
pinsrd xmm0,DWORD PTR [ecx],0x0
|
||||
pinsrd xmm0,ecx,0x0
|
||||
pmaxsb xmm0,xmm1
|
||||
pmaxsb xmm0,XMMWORD PTR [ecx]
|
||||
pmaxsd xmm0,xmm1
|
||||
pmaxsd xmm0,XMMWORD PTR [ecx]
|
||||
pmaxud xmm0,xmm1
|
||||
pmaxud xmm0,XMMWORD PTR [ecx]
|
||||
pmaxuw xmm0,xmm1
|
||||
pmaxuw xmm0,XMMWORD PTR [ecx]
|
||||
pminsb xmm0,xmm1
|
||||
pminsb xmm0,XMMWORD PTR [ecx]
|
||||
pminsd xmm0,xmm1
|
||||
pminsd xmm0,XMMWORD PTR [ecx]
|
||||
pminud xmm0,xmm1
|
||||
pminud xmm0,XMMWORD PTR [ecx]
|
||||
pminuw xmm0,xmm1
|
||||
pminuw xmm0,XMMWORD PTR [ecx]
|
||||
pmovsxbw xmm0,xmm1
|
||||
pmovsxbw xmm0,QWORD PTR [ecx]
|
||||
pmovsxbd xmm0,xmm1
|
||||
pmovsxbd xmm0,DWORD PTR [ecx]
|
||||
pmovsxbq xmm0,xmm1
|
||||
pmovsxbq xmm0,WORD PTR [ecx]
|
||||
pmovsxwd xmm0,xmm1
|
||||
pmovsxwd xmm0,QWORD PTR [ecx]
|
||||
pmovsxwq xmm0,xmm1
|
||||
pmovsxwq xmm0,DWORD PTR [ecx]
|
||||
pmovsxdq xmm0,xmm1
|
||||
pmovsxdq xmm0,QWORD PTR [ecx]
|
||||
pmovzxbw xmm0,xmm1
|
||||
pmovzxbw xmm0,QWORD PTR [ecx]
|
||||
pmovzxbd xmm0,xmm1
|
||||
pmovzxbd xmm0,DWORD PTR [ecx]
|
||||
pmovzxbq xmm0,xmm1
|
||||
pmovzxbq xmm0,WORD PTR [ecx]
|
||||
pmovzxwd xmm0,xmm1
|
||||
pmovzxwd xmm0,QWORD PTR [ecx]
|
||||
pmovzxwq xmm0,xmm1
|
||||
pmovzxwq xmm0,DWORD PTR [ecx]
|
||||
pmovzxdq xmm0,xmm1
|
||||
pmovzxdq xmm0,QWORD PTR [ecx]
|
||||
pmuldq xmm0,xmm1
|
||||
pmuldq xmm0,XMMWORD PTR [ecx]
|
||||
pmulld xmm0,xmm1
|
||||
pmulld xmm0,XMMWORD PTR [ecx]
|
||||
ptest xmm0,xmm1
|
||||
ptest xmm0,XMMWORD PTR [ecx]
|
||||
roundpd xmm0,XMMWORD PTR [ecx],0x0
|
||||
roundpd xmm0,xmm1,0x0
|
||||
roundps xmm0,XMMWORD PTR [ecx],0x0
|
||||
roundps xmm0,xmm1,0x0
|
||||
roundsd xmm0,QWORD PTR [ecx],0x0
|
||||
roundsd xmm0,xmm1,0x0
|
||||
roundss xmm0,DWORD PTR [ecx],0x0
|
||||
roundss xmm0,xmm1,0x0
|
||||
|
||||
.p2align 4,0
|
||||
|
|
|
|||
|
|
@ -0,0 +1,65 @@
|
|||
#objdump: -dwMintel
|
||||
#name: i386 SSE4.2 (Intel disassembly)
|
||||
#source: sse4_2.s
|
||||
|
||||
.*: file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+000 <foo>:
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 19 crc32 ebx,BYTE PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 19 crc32 ebx,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 19 crc32 ebx,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 01 pcmpgtq xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri xmm0,XMMWORD PTR \[ecx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm xmm0,XMMWORD PTR \[ecx\],0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri xmm0,XMMWORD PTR \[ecx\],0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri xmm0,xmm1,0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm xmm0,XMMWORD PTR \[ecx\],0x3
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 c1 03 pcmpistrm xmm0,xmm1,0x3
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 19 crc32 ebx,BYTE PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 19 crc32 ebx,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 19 crc32 ebx,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 01 pcmpgtq xmm0,XMMWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri xmm0,XMMWORD PTR \[ecx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm xmm0,XMMWORD PTR \[ecx\],0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri xmm0,XMMWORD PTR \[ecx\],0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri xmm0,xmm1,0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm xmm0,XMMWORD PTR \[ecx\],0x3
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 c1 03 pcmpistrm xmm0,xmm1,0x3
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[ecx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: 00 00 add BYTE PTR \[eax\],al
|
||||
#pass
|
||||
|
|
@ -33,4 +33,31 @@ Disassembly of section .text:
|
|||
[ ]*[0-9a-f]+: f3 0f b8 d9 popcnt %ecx,%ebx
|
||||
[ ]*[0-9a-f]+: 66 f3 0f b8 d9 popcnt %cx,%bx
|
||||
[ ]*[0-9a-f]+: f3 0f b8 d9 popcnt %ecx,%ebx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 19 crc32b \(%ecx\),%ebx
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 19 crc32w \(%ecx\),%ebx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 19 crc32l \(%ecx\),%ebx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32w %cx,%ebx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%ebx
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 01 pcmpgtq \(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri \$0x0,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm \$0x1,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm \$0x1,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri \$0x2,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri \$0x2,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm \$0x3,\(%ecx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 c1 03 pcmpistrm \$0x3,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt \(%ecx\),%bx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt \(%ecx\),%ebx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt \(%ecx\),%bx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt \(%ecx\),%ebx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt %cx,%bx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt %ecx,%ebx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt %cx,%bx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt %ecx,%ebx
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -30,4 +30,34 @@ foo:
|
|||
popcntw %cx,%bx
|
||||
popcntl %ecx,%ebx
|
||||
|
||||
|
||||
.intel_syntax noprefix
|
||||
crc32 ebx,cl
|
||||
crc32 ebx,cx
|
||||
crc32 ebx,ecx
|
||||
crc32 ebx,BYTE PTR [ecx]
|
||||
crc32 ebx,WORD PTR [ecx]
|
||||
crc32 ebx,DWORD PTR [ecx]
|
||||
crc32 ebx,cl
|
||||
crc32 ebx,cx
|
||||
crc32 ebx,ecx
|
||||
pcmpgtq xmm0,XMMWORD PTR [ecx]
|
||||
pcmpgtq xmm0,xmm1
|
||||
pcmpestri xmm0,XMMWORD PTR [ecx],0x0
|
||||
pcmpestri xmm0,xmm1,0x0
|
||||
pcmpestrm xmm0,XMMWORD PTR [ecx],0x1
|
||||
pcmpestrm xmm0,xmm1,0x1
|
||||
pcmpistri xmm0,XMMWORD PTR [ecx],0x2
|
||||
pcmpistri xmm0,xmm1,0x2
|
||||
pcmpistrm xmm0,XMMWORD PTR [ecx],0x3
|
||||
pcmpistrm xmm0,xmm1,0x3
|
||||
popcnt bx,WORD PTR [ecx]
|
||||
popcnt ebx,DWORD PTR [ecx]
|
||||
popcnt bx,WORD PTR [ecx]
|
||||
popcnt ebx,DWORD PTR [ecx]
|
||||
popcnt bx,cx
|
||||
popcnt ebx,ecx
|
||||
popcnt bx,cx
|
||||
popcnt ebx,ecx
|
||||
|
||||
.p2align 4,0
|
||||
|
|
|
|||
|
|
@ -0,0 +1,212 @@
|
|||
#objdump: -dwMintel
|
||||
#name: x86-64 SSE4.1 (Intel disassembly)
|
||||
#source: x86-64-sse4_1.s
|
||||
|
||||
.*: file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+000 <foo>:
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d 01 00 blendpd xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d c1 00 blendpd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c 01 00 blendps xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c c1 00 blendps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 01 blendvpd xmm0,XMMWORD PTR \[rcx\],xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd xmm0,xmm1,xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 01 blendvps xmm0,XMMWORD PTR \[rcx\],xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 c1 blendvps xmm0,xmm1,xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 01 00 dppd xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 c1 00 dppd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 01 00 dpps xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 c1 00 dpps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 17 c1 00 extractps rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 c1 00 extractps ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 01 00 extractps DWORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 c1 00 insertps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 01 00 insertps xmm0,DWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2a 01 movntdqa xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 01 00 mpsadbw xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 c1 00 mpsadbw xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b 01 packusdw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b c1 packusdw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 01 pblendvb xmm0,XMMWORD PTR \[rcx\],xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 c1 pblendvb xmm0,xmm1,xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e 01 00 pblendw xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e c1 00 pblendw xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 c1 pcmpeqq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 01 pcmpeqq xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 14 c1 00 pextrb rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 c1 00 pextrb ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 01 00 pextrb BYTE PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 c1 00 pextrd ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 01 00 pextrd DWORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 16 c1 00 pextrq rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 16 01 00 pextrq QWORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f c5 c8 00 pextrw rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f c5 c8 00 pextrw ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 15 01 00 pextrw WORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 c1 phminposuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 01 phminposuw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 01 00 pinsrb xmm0,BYTE PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 c1 00 pinsrb xmm0,ecx,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 20 c1 00 pinsrb xmm0,rcx,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 01 00 pinsrd xmm0,DWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 c1 00 pinsrd xmm0,ecx,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 22 01 00 pinsrq xmm0,QWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 22 c1 00 pinsrq xmm0,rcx,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c c1 pmaxsb xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c 01 pmaxsb xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d c1 pmaxsd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d 01 pmaxsd xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f c1 pmaxud xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f 01 pmaxud xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e c1 pmaxuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e 01 pmaxuw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 c1 pminsb xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 01 pminsb xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 c1 pminsd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 01 pminsd xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b c1 pminud xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b 01 pminud xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a c1 pminuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a 01 pminuw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 c1 pmovsxbd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 01 pmovsxbd xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 c1 pmovsxbq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 01 pmovsxbq xmm0,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 c1 pmovsxwd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 01 pmovsxwd xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 c1 pmovsxwq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 01 pmovsxwq xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 c1 pmovsxdq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 01 pmovsxdq xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 c1 pmovzxbw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 01 pmovzxbw xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 c1 pmovzxwd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 01 pmovzxwd xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 c1 pmovzxdq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 01 pmovzxdq xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 c1 pmuldq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 01 pmuldq xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 c1 pmulld xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 01 pmulld xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 01 ptest xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 01 00 roundpd xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 01 00 roundps xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b 01 00 roundsd xmm0,QWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a 01 00 roundss xmm0,DWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d 01 00 blendpd xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d c1 00 blendpd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c 01 00 blendps xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c c1 00 blendps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 01 blendvpd xmm0,XMMWORD PTR \[rcx\],xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd xmm0,xmm1,xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 01 blendvps xmm0,XMMWORD PTR \[rcx\],xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 c1 blendvps xmm0,xmm1,xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 01 00 dppd xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 c1 00 dppd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 01 00 dpps xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 c1 00 dpps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 17 c1 00 extractps rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 c1 00 extractps ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 01 00 extractps DWORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 c1 00 insertps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 01 00 insertps xmm0,DWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2a 01 movntdqa xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 01 00 mpsadbw xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 c1 00 mpsadbw xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b 01 packusdw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b c1 packusdw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 01 pblendvb xmm0,XMMWORD PTR \[rcx\],xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 c1 pblendvb xmm0,xmm1,xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e 01 00 pblendw xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e c1 00 pblendw xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 c1 pcmpeqq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 01 pcmpeqq xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 14 c1 00 pextrb rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 c1 00 pextrb ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 01 00 pextrb BYTE PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 c1 00 pextrd ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 01 00 pextrd DWORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 16 c1 00 pextrq rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 16 01 00 pextrq QWORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f c5 c8 00 pextrw rcx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f c5 c8 00 pextrw ecx,xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 15 01 00 pextrw WORD PTR \[rcx\],xmm0,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 c1 phminposuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 01 phminposuw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 01 00 pinsrb xmm0,BYTE PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 c1 00 pinsrb xmm0,ecx,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 20 c1 00 pinsrb xmm0,rcx,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 01 00 pinsrd xmm0,DWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 c1 00 pinsrd xmm0,ecx,0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 22 01 00 pinsrq xmm0,QWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 22 c1 00 pinsrq xmm0,rcx,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c c1 pmaxsb xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c 01 pmaxsb xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d c1 pmaxsd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d 01 pmaxsd xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f c1 pmaxud xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f 01 pmaxud xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e c1 pmaxuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e 01 pmaxuw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 c1 pminsb xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 01 pminsb xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 c1 pminsd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 01 pminsd xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b c1 pminud xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b 01 pminud xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a c1 pminuw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a 01 pminuw xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 c1 pmovsxbd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 01 pmovsxbd xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 c1 pmovsxbq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 01 pmovsxbq xmm0,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 c1 pmovsxwd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 01 pmovsxwd xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 c1 pmovsxwq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 01 pmovsxwq xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 c1 pmovsxdq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 01 pmovsxdq xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 c1 pmovzxbw xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 01 pmovzxbw xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 c1 pmovzxwd xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 01 pmovzxwd xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 c1 pmovzxdq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 01 pmovzxdq xmm0,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 c1 pmuldq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 01 pmuldq xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 c1 pmulld xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 01 pmulld xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 01 ptest xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 01 00 roundpd xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 01 00 roundps xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b 01 00 roundsd xmm0,QWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a 01 00 roundss xmm0,DWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss xmm0,xmm1,0x0
|
||||
#pass
|
||||
|
|
@ -107,4 +107,105 @@ Disassembly of section .text:
|
|||
[ ]*[0-9a-f]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[0-9a-f]+: 66 0f 3a 0a 01 00 roundss \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[0-9a-f]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d 01 00 blendpd \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0d c1 00 blendpd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c 01 00 blendps \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0c c1 00 blendps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 01 blendvpd %xmm0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 01 blendvps %xmm0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 14 c1 blendvps %xmm0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 01 00 dppd \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 41 c1 00 dppd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 01 00 dpps \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 40 c1 00 dpps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 17 c1 00 extractps \$0x0,%xmm0,%rcx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 c1 00 extractps \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 17 01 00 extractps \$0x0,%xmm0,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 c1 00 insertps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 21 01 00 insertps \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2a 01 movntdqa \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 01 00 mpsadbw \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 42 c1 00 mpsadbw \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b 01 packusdw \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 2b c1 packusdw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 01 pblendvb %xmm0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 10 c1 pblendvb %xmm0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e 01 00 pblendw \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0e c1 00 pblendw \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 c1 pcmpeqq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 29 01 pcmpeqq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 14 c1 00 pextrb \$0x0,%xmm0,%rcx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 c1 00 pextrb \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 14 01 00 pextrb \$0x0,%xmm0,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 c1 00 pextrd \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 16 01 00 pextrd \$0x0,%xmm0,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 16 c1 00 pextrq \$0x0,%xmm0,%rcx
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 16 01 00 pextrq \$0x0,%xmm0,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: 66 48 0f c5 c8 00 pextrw \$0x0,%xmm0,%rcx
|
||||
[ ]*[a-f0-9]+: 66 0f c5 c8 00 pextrw \$0x0,%xmm0,%ecx
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 15 01 00 pextrw \$0x0,%xmm0,\(%rcx\)
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 c1 phminposuw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 41 01 phminposuw \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 01 00 pinsrb \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 20 c1 00 pinsrb \$0x0,%ecx,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 20 c1 00 pinsrb \$0x0,%rcx,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 01 00 pinsrd \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 22 c1 00 pinsrd \$0x0,%ecx,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 22 01 00 pinsrq \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 48 0f 3a 22 c1 00 pinsrq \$0x0,%rcx,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c c1 pmaxsb %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3c 01 pmaxsb \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d c1 pmaxsd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3d 01 pmaxsd \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f c1 pmaxud %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3f 01 pmaxud \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e c1 pmaxuw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3e 01 pmaxuw \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 c1 pminsb %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 38 01 pminsb \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 c1 pminsd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 39 01 pminsd \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b c1 pminud %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3b 01 pminud \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a c1 pminuw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 3a 01 pminuw \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 c1 pmovsxbd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 21 01 pmovsxbd \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 c1 pmovsxbq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 22 01 pmovsxbq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 c1 pmovsxwd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 23 01 pmovsxwd \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 c1 pmovsxwq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 24 01 pmovsxwq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 c1 pmovsxdq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 25 01 pmovsxdq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 c1 pmovzxbw %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 30 01 pmovzxbw \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 c1 pmovzxbd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 31 01 pmovzxbd \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 c1 pmovzxwd %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 33 01 pmovzxwd \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 c1 pmovzxdq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 35 01 pmovzxdq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 c1 pmuldq %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 28 01 pmuldq \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 c1 pmulld %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 40 01 pmulld \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 c1 ptest %xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 38 17 01 ptest \(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 01 00 roundpd \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 09 c1 00 roundpd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 01 00 roundps \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 08 c1 00 roundps \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b 01 00 roundsd \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0b c1 00 roundsd \$0x0,%xmm1,%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a 01 00 roundss \$0x0,\(%rcx\),%xmm0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 0a c1 00 roundss \$0x0,%xmm1,%xmm0
|
||||
#pass
|
||||
|
|
|
|||
|
|
@ -104,4 +104,107 @@ foo:
|
|||
roundss $0x0,(%rcx),%xmm0
|
||||
roundss $0x0,%xmm1,%xmm0
|
||||
|
||||
.intel_syntax noprefix
|
||||
blendpd xmm0,XMMWORD PTR [rcx],0x0
|
||||
blendpd xmm0,xmm1,0x0
|
||||
blendps xmm0,XMMWORD PTR [rcx],0x0
|
||||
blendps xmm0,xmm1,0x0
|
||||
blendvpd xmm0,XMMWORD PTR [rcx],xmm0
|
||||
blendvpd xmm0,xmm1,xmm0
|
||||
blendvps xmm0,XMMWORD PTR [rcx],xmm0
|
||||
blendvps xmm0,xmm1,xmm0
|
||||
dppd xmm0,XMMWORD PTR [rcx],0x0
|
||||
dppd xmm0,xmm1,0x0
|
||||
dpps xmm0,XMMWORD PTR [rcx],0x0
|
||||
dpps xmm0,xmm1,0x0
|
||||
extractps rcx,xmm0,0x0
|
||||
extractps ecx,xmm0,0x0
|
||||
extractps DWORD PTR [rcx],xmm0,0x0
|
||||
insertps xmm0,xmm1,0x0
|
||||
insertps xmm0,DWORD PTR [rcx],0x0
|
||||
movntdqa xmm0,XMMWORD PTR [rcx]
|
||||
mpsadbw xmm0,XMMWORD PTR [rcx],0x0
|
||||
mpsadbw xmm0,xmm1,0x0
|
||||
packusdw xmm0,XMMWORD PTR [rcx]
|
||||
packusdw xmm0,xmm1
|
||||
pblendvb xmm0,XMMWORD PTR [rcx],xmm0
|
||||
pblendvb xmm0,xmm1,xmm0
|
||||
pblendw xmm0,XMMWORD PTR [rcx],0x0
|
||||
pblendw xmm0,xmm1,0x0
|
||||
pcmpeqq xmm0,xmm1
|
||||
pcmpeqq xmm0,XMMWORD PTR [rcx]
|
||||
pextrb rcx,xmm0,0x0
|
||||
pextrb ecx,xmm0,0x0
|
||||
pextrb BYTE PTR [rcx],xmm0,0x0
|
||||
pextrd ecx,xmm0,0x0
|
||||
pextrd DWORD PTR [rcx],xmm0,0x0
|
||||
pextrq rcx,xmm0,0x0
|
||||
pextrq QWORD PTR [rcx],xmm0,0x0
|
||||
pextrw rcx,xmm0,0x0
|
||||
pextrw ecx,xmm0,0x0
|
||||
pextrw WORD PTR [rcx],xmm0,0x0
|
||||
phminposuw xmm0,xmm1
|
||||
phminposuw xmm0,XMMWORD PTR [rcx]
|
||||
pinsrb xmm0,BYTE PTR [rcx],0x0
|
||||
pinsrb xmm0,ecx,0x0
|
||||
pinsrb xmm0,rcx,0x0
|
||||
pinsrd xmm0,DWORD PTR [rcx],0x0
|
||||
pinsrd xmm0,ecx,0x0
|
||||
pinsrq xmm0,QWORD PTR [rcx],0x0
|
||||
pinsrq xmm0,rcx,0x0
|
||||
pmaxsb xmm0,xmm1
|
||||
pmaxsb xmm0,XMMWORD PTR [rcx]
|
||||
pmaxsd xmm0,xmm1
|
||||
pmaxsd xmm0,XMMWORD PTR [rcx]
|
||||
pmaxud xmm0,xmm1
|
||||
pmaxud xmm0,XMMWORD PTR [rcx]
|
||||
pmaxuw xmm0,xmm1
|
||||
pmaxuw xmm0,XMMWORD PTR [rcx]
|
||||
pminsb xmm0,xmm1
|
||||
pminsb xmm0,XMMWORD PTR [rcx]
|
||||
pminsd xmm0,xmm1
|
||||
pminsd xmm0,XMMWORD PTR [rcx]
|
||||
pminud xmm0,xmm1
|
||||
pminud xmm0,XMMWORD PTR [rcx]
|
||||
pminuw xmm0,xmm1
|
||||
pminuw xmm0,XMMWORD PTR [rcx]
|
||||
pmovsxbw xmm0,xmm1
|
||||
pmovsxbw xmm0,QWORD PTR [rcx]
|
||||
pmovsxbd xmm0,xmm1
|
||||
pmovsxbd xmm0,DWORD PTR [rcx]
|
||||
pmovsxbq xmm0,xmm1
|
||||
pmovsxbq xmm0,WORD PTR [rcx]
|
||||
pmovsxwd xmm0,xmm1
|
||||
pmovsxwd xmm0,QWORD PTR [rcx]
|
||||
pmovsxwq xmm0,xmm1
|
||||
pmovsxwq xmm0,DWORD PTR [rcx]
|
||||
pmovsxdq xmm0,xmm1
|
||||
pmovsxdq xmm0,QWORD PTR [rcx]
|
||||
pmovzxbw xmm0,xmm1
|
||||
pmovzxbw xmm0,QWORD PTR [rcx]
|
||||
pmovzxbd xmm0,xmm1
|
||||
pmovzxbd xmm0,DWORD PTR [rcx]
|
||||
pmovzxbq xmm0,xmm1
|
||||
pmovzxbq xmm0,WORD PTR [rcx]
|
||||
pmovzxwd xmm0,xmm1
|
||||
pmovzxwd xmm0,QWORD PTR [rcx]
|
||||
pmovzxwq xmm0,xmm1
|
||||
pmovzxwq xmm0,DWORD PTR [rcx]
|
||||
pmovzxdq xmm0,xmm1
|
||||
pmovzxdq xmm0,QWORD PTR [rcx]
|
||||
pmuldq xmm0,xmm1
|
||||
pmuldq xmm0,XMMWORD PTR [rcx]
|
||||
pmulld xmm0,xmm1
|
||||
pmulld xmm0,XMMWORD PTR [rcx]
|
||||
ptest xmm0,xmm1
|
||||
ptest xmm0,XMMWORD PTR [rcx]
|
||||
roundpd xmm0,XMMWORD PTR [rcx],0x0
|
||||
roundpd xmm0,xmm1,0x0
|
||||
roundps xmm0,XMMWORD PTR [rcx],0x0
|
||||
roundps xmm0,xmm1,0x0
|
||||
roundsd xmm0,QWORD PTR [rcx],0x0
|
||||
roundsd xmm0,xmm1,0x0
|
||||
roundss xmm0,DWORD PTR [rcx],0x0
|
||||
roundss xmm0,xmm1,0x0
|
||||
|
||||
.p2align 4,0
|
||||
|
|
|
|||
|
|
@ -0,0 +1,82 @@
|
|||
#objdump: -dwMintel
|
||||
#name: x86-64 SSE4.2 (Intel disassembly)
|
||||
#source: x86-64-sse4_2.s
|
||||
|
||||
.*: file format .*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
0+000 <foo>:
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f0 d9 crc32 rbx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f1 d9 crc32 rbx,rcx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 19 crc32 ebx,BYTE PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 19 crc32 ebx,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 19 crc32 ebx,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f1 19 crc32 rbx,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f0 d9 crc32 rbx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f1 d9 crc32 rbx,rcx
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 01 pcmpgtq xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri xmm0,XMMWORD PTR \[rcx\],0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri xmm0,xmm1,0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm xmm0,XMMWORD PTR \[rcx\],0x3
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 c1 03 pcmpistrm xmm0,xmm1,0x3
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 19 popcnt rbx,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 19 popcnt rbx,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 d9 popcnt rbx,rcx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 d9 popcnt rbx,rcx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f0 d9 crc32 rbx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f1 d9 crc32 rbx,rcx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 19 crc32 ebx,BYTE PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 19 crc32 ebx,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 19 crc32 ebx,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f1 19 crc32 rbx,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32 ebx,cl
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f0 d9 crc32 rbx,cl
|
||||
[ ]*[a-f0-9]+: 66 f2 0f 38 f1 d9 crc32 ebx,cx
|
||||
[ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32 ebx,ecx
|
||||
[ ]*[a-f0-9]+: f2 48 0f 38 f1 d9 crc32 rbx,rcx
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 01 pcmpgtq xmm0,XMMWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq xmm0,xmm1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 01 00 pcmpestri xmm0,XMMWORD PTR \[rcx\],0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 61 c1 00 pcmpestri xmm0,xmm1,0x0
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 01 01 pcmpestrm xmm0,XMMWORD PTR \[rcx\],0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 60 c1 01 pcmpestrm xmm0,xmm1,0x1
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 01 02 pcmpistri xmm0,XMMWORD PTR \[rcx\],0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 63 c1 02 pcmpistri xmm0,xmm1,0x2
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 01 03 pcmpistrm xmm0,XMMWORD PTR \[rcx\],0x3
|
||||
[ ]*[a-f0-9]+: 66 0f 3a 62 c1 03 pcmpistrm xmm0,xmm1,0x3
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 19 popcnt rbx,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 19 popcnt bx,WORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 0f b8 19 popcnt ebx,DWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 19 popcnt rbx,QWORD PTR \[rcx\]
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 d9 popcnt rbx,rcx
|
||||
[ ]*[a-f0-9]+: 66 f3 0f b8 d9 popcnt bx,cx
|
||||
[ ]*[a-f0-9]+: f3 0f b8 d9 popcnt ebx,ecx
|
||||
[ ]*[a-f0-9]+: f3 48 0f b8 d9 popcnt rbx,rcx
|
||||
#pass
|
||||
|
|
@ -39,4 +39,42 @@ foo:
|
|||
popcntl %ecx,%ebx
|
||||
popcntq %rcx,%rbx
|
||||
|
||||
.intel_syntax noprefix
|
||||
crc32 ebx,cl
|
||||
crc32 rbx,cl
|
||||
crc32 ebx,cx
|
||||
crc32 ebx,ecx
|
||||
crc32 rbx,rcx
|
||||
crc32 ebx,BYTE PTR [rcx]
|
||||
crc32 ebx,WORD PTR [rcx]
|
||||
crc32 ebx,DWORD PTR [rcx]
|
||||
crc32 rbx,QWORD PTR [rcx]
|
||||
crc32 ebx,cl
|
||||
crc32 rbx,cl
|
||||
crc32 ebx,cx
|
||||
crc32 ebx,ecx
|
||||
crc32 rbx,rcx
|
||||
pcmpgtq xmm0,XMMWORD PTR [rcx]
|
||||
pcmpgtq xmm0,xmm1
|
||||
pcmpestri xmm0,XMMWORD PTR [rcx],0x0
|
||||
pcmpestri xmm0,xmm1,0x0
|
||||
pcmpestrm xmm0,XMMWORD PTR [rcx],0x1
|
||||
pcmpestrm xmm0,xmm1,0x1
|
||||
pcmpistri xmm0,XMMWORD PTR [rcx],0x2
|
||||
pcmpistri xmm0,xmm1,0x2
|
||||
pcmpistrm xmm0,XMMWORD PTR [rcx],0x3
|
||||
pcmpistrm xmm0,xmm1,0x3
|
||||
popcnt bx,WORD PTR [rcx]
|
||||
popcnt ebx,DWORD PTR [rcx]
|
||||
popcnt rbx,QWORD PTR [rcx]
|
||||
popcnt bx,WORD PTR [rcx]
|
||||
popcnt ebx,DWORD PTR [rcx]
|
||||
popcnt rbx,QWORD PTR [rcx]
|
||||
popcnt bx,cx
|
||||
popcnt ebx,ecx
|
||||
popcnt rbx,rcx
|
||||
popcnt bx,cx
|
||||
popcnt ebx,ecx
|
||||
popcnt rbx,rcx
|
||||
|
||||
.p2align 4,0
|
||||
|
|
|
|||
|
|
@ -1,3 +1,9 @@
|
|||
2007-08-09 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
|
||||
pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
|
||||
* i386-tbl.h: Regenerated.
|
||||
|
||||
2007-08-03 James E. Wilson <wilson@specifix.com>
|
||||
|
||||
* ia64-gen.c: (main): Add missing newline to copyright message.
|
||||
|
|
|
|||
|
|
@ -1387,24 +1387,24 @@ pminsb, 2, 0x660f3838, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf
|
|||
pminsd, 2, 0x660f3839, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pminud, 2, 0x660f383b, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pminuw, 2, 0x660f383a, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxbw, 2, 0x660f3820, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxbw, 2, 0x660f3820, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxbd, 2, 0x660f3821, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxbq, 2, 0x660f3822, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxwd, 2, 0x660f3823, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxwd, 2, 0x660f3823, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxwq, 2, 0x660f3824, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxdq, 2, 0x660f3825, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxbw, 2, 0x660f3830, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovsxdq, 2, 0x660f3825, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxbw, 2, 0x660f3830, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxbd, 2, 0x660f3831, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxbq, 2, 0x660f3832, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxwd, 2, 0x660f3833, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxwd, 2, 0x660f3833, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxwq, 2, 0x660f3834, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxdq, 2, 0x660f3835, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmovzxdq, 2, 0x660f3835, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmuldq, 2, 0x660f3828, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
pmulld, 2, 0x660f3840, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
ptest, 2, 0x660f3817, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
roundpd, 3, 0x660f3a09, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Imm8, BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
roundps, 3, 0x660f3a08, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Imm8, BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
roundsd, 3, 0x660f3a0b, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Imm8, BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
roundsd, 3, 0x660f3a0b, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { Imm8, BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
roundss, 3, 0x660f3a0a, None, CpuSSE4_1, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { Imm8, BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
|
||||
|
||||
// Streaming SIMD extensions 4.2 Instructions.
|
||||
|
|
|
|||
|
|
@ -3947,7 +3947,7 @@ const template i386_optab[] =
|
|||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovsxbw", 2, 0x660f3820, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovsxbd", 2, 0x660f3821, None, CpuSSE4_1,
|
||||
|
|
@ -3959,7 +3959,7 @@ const template i386_optab[] =
|
|||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovsxwd", 2, 0x660f3823, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovsxwq", 2, 0x660f3824, None, CpuSSE4_1,
|
||||
|
|
@ -3967,11 +3967,11 @@ const template i386_optab[] =
|
|||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovsxdq", 2, 0x660f3825, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovzxbw", 2, 0x660f3830, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovzxbd", 2, 0x660f3831, None, CpuSSE4_1,
|
||||
|
|
@ -3983,7 +3983,7 @@ const template i386_optab[] =
|
|||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovzxwd", 2, 0x660f3833, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovzxwq", 2, 0x660f3834, None, CpuSSE4_1,
|
||||
|
|
@ -3991,7 +3991,7 @@ const template i386_optab[] =
|
|||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmovzxdq", 2, 0x660f3835, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "pmuldq", 2, 0x660f3828, None, CpuSSE4_1,
|
||||
|
|
@ -4017,7 +4017,7 @@ const template i386_optab[] =
|
|||
BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
{ "roundsd", 3, 0x660f3a0b, None, CpuSSE4_1,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf,
|
||||
Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
|
||||
{ Imm8,
|
||||
BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM,
|
||||
RegXMM } },
|
||||
|
|
|
|||
Loading…
Reference in New Issue