Remove _S version of ARM MSR/MRS special registers
2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S special registers. * testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special registers. * testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise. * testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise. * testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
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@ -1,3 +1,13 @@
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2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
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special registers.
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* testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
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registers.
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* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
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* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
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* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
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2016-08-24 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (cpu_arch): Add .ptwrite.
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@ -18806,8 +18806,8 @@ static const struct asm_psr v7m_psrs[] =
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{"ipsr", 5 }, {"IPSR", 5 },
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{"epsr", 6 }, {"EPSR", 6 },
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{"iepsr", 7 }, {"IEPSR", 7 },
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{"msp", 8 }, {"MSP", 8 }, {"msp_s", 8 }, {"MSP_S", 8 },
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{"psp", 9 }, {"PSP", 9 }, {"psp_s", 9 }, {"PSP_S", 9 },
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{"msp", 8 }, {"MSP", 8 },
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{"psp", 9 }, {"PSP", 9 },
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{"primask", 16}, {"PRIMASK", 16},
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{"basepri", 17}, {"BASEPRI", 17},
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{"basepri_max", 18}, {"BASEPRI_MAX", 18},
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@ -7,26 +7,18 @@
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Disassembly of section .text:
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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@ -7,26 +7,18 @@
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Disassembly of section .text:
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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@ -1,25 +1,17 @@
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T:
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msr MSP, r0
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msr MSP_S, r0
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msr MSP_NS, r0
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msr PSP, r0
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msr PSP_S, r0
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msr PSP_NS, r0
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msr msp, r0
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msr msp_s, r0
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msr msp_ns, r0
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msr psp, r0
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msr psp_s, r0
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msr psp_ns, r0
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mrs r0, MSP
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mrs r0, MSP_S
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mrs r0, MSP_NS
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mrs r0, PSP
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mrs r0, PSP_S
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mrs r0, PSP_NS
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mrs r0, msp
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mrs r0, msp_s
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mrs r0, msp_ns
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mrs r0, psp
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mrs r0, psp_s
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mrs r0, psp_ns
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@ -7,26 +7,18 @@
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Disassembly of section .text:
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8808 msr MSP, r0
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0+.* <[^>]*> f380 8888 msr MSP_NS, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8809 msr PSP, r0
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0+.* <[^>]*> f380 8889 msr PSP_NS, r0
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8008 mrs r0, MSP
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0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8009 mrs r0, PSP
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0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
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