Remove _S version of ARM MSR/MRS special registers

2016-08-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
	special registers.
	* testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
	registers.
	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
This commit is contained in:
Thomas Preud'homme 2016-08-25 09:44:09 +01:00
parent 754653a7c0
commit c4dd0ba27f
6 changed files with 12 additions and 34 deletions

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@ -1,3 +1,13 @@
2016-08-25 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (v7m_psrs): Remove msp_s, MSP_S, psp_s and PSP_S
special registers.
* testsuite/gas/arm/archv8m-cmse-msr.s: Remove test for above special
registers.
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
2016-08-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .ptwrite.

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@ -18806,8 +18806,8 @@ static const struct asm_psr v7m_psrs[] =
{"ipsr", 5 }, {"IPSR", 5 },
{"epsr", 6 }, {"EPSR", 6 },
{"iepsr", 7 }, {"IEPSR", 7 },
{"msp", 8 }, {"MSP", 8 }, {"msp_s", 8 }, {"MSP_S", 8 },
{"psp", 9 }, {"PSP", 9 }, {"psp_s", 9 }, {"PSP_S", 9 },
{"msp", 8 }, {"MSP", 8 },
{"psp", 9 }, {"PSP", 9 },
{"primask", 16}, {"PRIMASK", 16},
{"basepri", 17}, {"BASEPRI", 17},
{"basepri_max", 18}, {"BASEPRI_MAX", 18},

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@ -7,26 +7,18 @@
Disassembly of section .text:
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS

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@ -7,26 +7,18 @@
Disassembly of section .text:
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS

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@ -1,25 +1,17 @@
T:
msr MSP, r0
msr MSP_S, r0
msr MSP_NS, r0
msr PSP, r0
msr PSP_S, r0
msr PSP_NS, r0
msr msp, r0
msr msp_s, r0
msr msp_ns, r0
msr psp, r0
msr psp_s, r0
msr psp_ns, r0
mrs r0, MSP
mrs r0, MSP_S
mrs r0, MSP_NS
mrs r0, PSP
mrs r0, PSP_S
mrs r0, PSP_NS
mrs r0, msp
mrs r0, msp_s
mrs r0, msp_ns
mrs r0, psp
mrs r0, psp_s
mrs r0, psp_ns

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@ -7,26 +7,18 @@
Disassembly of section .text:
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8808 msr MSP, r0
0+.* <[^>]*> f380 8888 msr MSP_NS, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8809 msr PSP, r0
0+.* <[^>]*> f380 8889 msr PSP_NS, r0
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8008 mrs r0, MSP
0+.* <[^>]*> f3ef 8088 mrs r0, MSP_NS
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8009 mrs r0, PSP
0+.* <[^>]*> f3ef 8089 mrs r0, PSP_NS