Test extended shifts, mul64/mulu64 insns.
This commit is contained in:
David Edelsohn
parent
3a5e9b6e86
commit
c4ec94c9d6
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@ -37,6 +37,8 @@ j.s
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j.d
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math.s
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math.d
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mul64.s
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mul64.d
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sshift.s
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sshift.d
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Things-to-lose:
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@ -111,12 +111,18 @@ if [istarget arc*-*-*] then {
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# run_dump_test "sr"
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# Host extension instructions
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test_template_insn host math mul64 20
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test_template_insn host math mulu64 21
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run_dump_test "mul64"
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test_template_insn host math asl 16
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test_template_insn host math asr 18
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test_template_insn host math lsr 17
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test_template_insn host math ror 19
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# Graphics extension instructions
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test_template_insn graphics math mul64 20
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test_template_insn graphics math mulu64 21
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#run_dump_test "mul64" - .cpu field wrong
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test_template_insn graphics math asl 16
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test_template_insn graphics math asr 18
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test_template_insn graphics math lsr 17
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test_template_insn graphics math ror 19
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test_template_insn graphics math padc 25
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test_template_insn graphics math padd 24
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test_template_insn graphics math pand 28
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@ -0,0 +1,46 @@
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#objdump: -dr
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#name: mul64
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# Test the mul64/mulu64 insn.
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.*: +file format elf32-.*arc
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Disassembly of section .text:
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00000000 a7e08400 mul64 r1,r2
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00000004 afe18800 mulu64 r3,r4
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00000008 a7e0fe00 mul64 r1,0
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0000000c a7ff8400 mul64 0,r2
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00000010 a7e0ffff mul64 r1,511
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00000014 a7ff85ff mul64 511,r2
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00000018 a7e0feff mul64 r1,255
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0000001c a7ff84ff mul64 255,r2
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00000020 a7e0ff00 mul64 r1,256
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00000024 a7ff8500 mul64 256,r2
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00000028 afe0fc00 mulu64 r1,256
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00000030 afff0400 mulu64 511,r2
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00000038 a7e0fc00 mul64 r1,256
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00000040 a7ff0400 mul64 -257,r2
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00000048 afe1fc00 mulu64 r3,512
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00000050 afe27fff mulu64 r4,511
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00000054 a7ff0a00 mul64 1111638594,r5
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0000005c a7ff7c00 mul64 305419896,305419896
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00000064 a7e07c00 mul64 r0,0
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RELOC: 00000068 R_ARC_32 foo
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0000006c aff07c00 mulu64 r32,0
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RELOC: 00000070 R_ARC_32 foo
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00000074 a7e00200 mul64 r0,r1
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00000078 a7e30e01 mul64.eq r6,r7
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0000007c afe61a02 mulu64.ne r12,r13
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00000080 a7e00300 mul64.f r0,r1
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00000084 a7e17a01 mul64.f r2,1
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00000088 a7fe8601 mul64.f 1,r3
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0000008c a7fe8800 mul64.f 0,r4
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00000090 afe2fd00 mulu64.f r5,512
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00000098 afe37d00 mulu64.f r6,512
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000000a0 afe39100 mulu64.f r7,r8
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000000a4 afe00301 mulu64.eq.f r0,r1
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000000a8 afe17d02 mulu64.ne.f r2,0
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000000b0 afff070b mulu64.lt.f 0,r3
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000000b8 afe27d09 mulu64.gt.f r4,512
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000000c0 afff0b0c mulu64.le.f 512,r5
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000000c8 afff7d0a mulu64.ge.f 512,512
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@ -0,0 +1,52 @@
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# mul64 test
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.cpu host
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# reg,reg
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mul64 r1,r2
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mulu64 r3,r4
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# shimm values
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mul64 r1,0
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mul64 0,r2
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mul64 r1,-1
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mul64 -1,r2
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mul64 r1,255
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mul64 255,r2
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mul64 r1,-256
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mul64 -256,r2
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mulu64 r1,256
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mulu64 511,r2
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# limm values
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mul64 r1,256
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mul64 -257,r2
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mulu64 r3,512
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mulu64 r4,-1
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mul64 0x42424242,r5
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mul64 0x12345678,0x12345678
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# symbols
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mul64 r0,foo
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mulu64 r32,foo
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# conditional execution
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mul64.al r0,r1
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mul64.eq r6,r7
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mulu64.ne r12,r13
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# flag setting
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mul64.f r0,r1
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mul64.f r2,1
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mul64.f 1,r3
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mul64.f 0,r4
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mulu64.f r5,512
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mulu64.f r6,512
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mulu64.f r7,r8
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# conditional execution + flag setting
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mulu64.eq.f r0,r1
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mulu64.ne.f r2,0
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mulu64.lt.f 0,r3
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mulu64.gt.f r4,512
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mulu64.le.f 512,r5
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mulu64.ge.f 512,512
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