Make ppc476 testcases more robust
* testsuite/ld-powerpc/ppc476-shared.lnk: Align .bss. * testsuite/ld-powerpc/ppc476-shared.d: Adjust. * testsuite/ld-powerpc/ppc476-shared2.d: Adjust.
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@ -1,3 +1,9 @@
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2017-07-07 Alan Modra <amodra@gmail.com>
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* testsuite/ld-powerpc/ppc476-shared.lnk: Align .bss.
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* testsuite/ld-powerpc/ppc476-shared.d: Adjust.
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* testsuite/ld-powerpc/ppc476-shared2.d: Adjust.
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2017-07-07 Alan Modra <amodra@gmail.com>
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* Makefile.am (eelf64_s390.c): Depend on emultempl/s390.em.
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@ -23,7 +23,7 @@ Disassembly of section \.text:
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\.\.\.
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3fff0: (42 9f 00 05|05 00 9f 42) bcl .*
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3fff4: (7d 28 02 a6|a6 02 28 7d) mflr r9
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3fff8: (3d 29 00 00|00 00 29 3d) addis r9,r9,0
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3fff8: (3d 29 00 01|01 00 29 3d) addis r9,r9,1
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3fff[8a]: R_PPC_REL16_HA \.bss\+0x[46]
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3fffc: (48 00 00 34|34 00 00 48) b 40030 .*
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40000: (3c 60 00 00|00 00 60 3c) lis r3,0
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@ -41,7 +41,7 @@ Disassembly of section \.text:
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40024: (4b fe ff dc|dc ff fe 4b) b 30000 .*
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40028: (48 00 00 02|02 00 00 48) ba 0 .*
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4002c: (48 00 00 02|02 00 00 48) ba 0 .*
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40030: (39 29 01 50|50 01 29 39) addi r9,r9,336
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40030: (39 29 00 0c|0c 00 29 39) addi r9,r9,12
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4003[02]: R_PPC_REL16_LO \.bss\+0x3[ce]
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40034: (4b ff ff cc|cc ff ff 4b) b 40000 .*
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40038: (48 00 00 02|02 00 00 48) ba 0 .*
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@ -2,5 +2,5 @@ SECTIONS
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{
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. = 0xfffc;
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.text : { *(.text) }
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.bss : { *(.bss) }
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.bss : ALIGN (0x10000) { *(.bss) }
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}
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@ -8,9 +8,9 @@
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DYNAMIC RELOCATION RECORDS
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OFFSET TYPE VALUE
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0001000[02] R_PPC_ADDR16_LO \.text\+0x00040144
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0002000[02] R_PPC_ADDR16_LO \.text\+0x00040144
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0003000[02] R_PPC_ADDR16_LO \.text\+0x00040144
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0004000[02] R_PPC_ADDR16_HA \.text\+0x00040144
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0004001[02] R_PPC_ADDR16_HA \.text\+0x00040144
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0004002[02] R_PPC_ADDR16_HA \.text\+0x00040144
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0001000[02] R_PPC_ADDR16_LO \.text\+0x00050000
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0002000[02] R_PPC_ADDR16_LO \.text\+0x00050000
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0003000[02] R_PPC_ADDR16_LO \.text\+0x00050000
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0004000[02] R_PPC_ADDR16_HA \.text\+0x00050000
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0004001[02] R_PPC_ADDR16_HA \.text\+0x00050000
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0004002[02] R_PPC_ADDR16_HA \.text\+0x00050000
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