For the Thumb BLX reloc round the relocation up rather than down.
This commit is contained in:
Nick Clifton
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6ff96af674
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c62e1cc30f
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@ -1,3 +1,9 @@
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2002-05-23 Nick Clifton <nickc@cambridge.redhat.com>
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* elf32-arm.h (elf32_arm_final_link_relocate): For the Thumb
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BLX reloc round the relocation up rather than down.
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* coff-arm.c (coff_arm_relocate_section): Likewise.
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2002-05-21 H.J. Lu (hjl@gnu.org)
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* linker.c (_bfd_generic_link_add_one_symbol): Allow multiple
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@ -1701,21 +1701,23 @@ coff_arm_relocate_section (output_bfd, info, input_bfd, input_section,
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|| signed_check < reloc_signed_min)
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overflow = true;
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/* For the BLX(1) instruction remove bit 0 of the adjusted offset.
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Bit 0 can only be set if the upper insn is at a half-word boundary,
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since the destination address, an ARM instruction, must always be
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on a word boundary. The semantics of the BLX (1) instruction,
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however, are that bit 0 in the offset must always be 0, and the
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corresponding bit 1 in the target address will be set from bit
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1 of the source address. */
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if ((x & 0x18000000) == 0x08000000)
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relocation &= ~0x2;
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/* Put the relocation into the correct bits. */
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/* Put the relocation into the correct bits.
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For a BLX instruction, make sure that the relocation is rounded up
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to a word boundary. This follows the semantics of the instruction
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which specifies that bit 1 of the target address will come from bit
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1 of the base address. */
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if (bfd_big_endian (input_bfd))
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relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
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{
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if ((x & 0x1800) == 0x0800 && (relocation & 0x02))
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relocation += 2;
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relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
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}
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else
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relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
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{
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if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02))
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relocation += 2;
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relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
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}
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/* Add the relocation to the correct bits of X. */
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x = ((x & ~howto->dst_mask) | relocation);
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@ -1471,22 +1471,19 @@ elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
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if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
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overflow = true;
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#ifndef OLD_ARM_ABI
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if (r_type == R_ARM_THM_XPC22
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&& ((lower_insn & 0x1800) == 0x0800))
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/* For a BLX instruction, make sure that the relocation is rounded up
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to a word boundary. This follows the semantics of the instruction
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which specifies that bit 1 of the target address will come from bit
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1 of the base address. */
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relocation = (relocation + 2) & ~ 3;
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#endif
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/* Put RELOCATION back into the insn. */
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upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) | ((relocation >> 12) & 0x7ff);
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lower_insn = (lower_insn & ~(bfd_vma) 0x7ff) | ((relocation >> 1) & 0x7ff);
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#ifndef OLD_ARM_ABI
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if (r_type == R_ARM_THM_XPC22
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&& ((lower_insn & 0x1800) == 0x0800))
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/* Remove bit zero of the adjusted offset. Bit zero can only be
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set if the upper insn is at a half-word boundary, since the
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destination address, an ARM instruction, must always be on a
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word boundary. The semantics of the BLX (1) instruction, however,
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are that bit zero in the offset must always be zero, and the
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corresponding bit one in the target address will be set from bit
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one of the source address. */
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lower_insn &= ~1;
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#endif
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/* Put the relocated value back in the object file: */
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bfd_put_16 (input_bfd, upper_insn, hit_data);
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bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
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@ -1,3 +1,8 @@
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2002-05-23 Nick Clifton <nickc@cambridge.redhat.com>
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* config/tc-arm.c (md_apply_fix3): For the Thumb BLX reloc
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round the relocation up rather than down.
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2002-05-23 Nick Clifton <nickc@cambridge.redhat.com>
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* config/obj-coff.c (obj_coff_section): Silently ignore an 'a'
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@ -2227,7 +2227,7 @@ symbol_locate (symbolP, name, segment, valu, frag)
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S_SET_SEGMENT (symbolP, segment);
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S_SET_VALUE (symbolP, valu);
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symbol_clear_list_pointers(symbolP);
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symbol_clear_list_pointers (symbolP);
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symbol_set_frag (symbolP, frag);
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@ -6963,7 +6963,7 @@ vfp_sp_reg_list (str, pos)
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/* Sanity check -- should have raised a parse error above. */
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if (count == 0 || count > 32)
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abort();
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abort ();
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/* Final test -- the registers must be consecutive. */
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while (count--)
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@ -7076,7 +7076,7 @@ vfp_dp_reg_list (str)
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/* Sanity check -- should have raised a parse error above. */
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if (count == 0 || count > 16)
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abort();
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abort ();
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/* Final test -- the registers must be consecutive. */
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while (count--)
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@ -7093,7 +7093,7 @@ vfp_dp_reg_list (str)
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}
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static void
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vfp_sp_ldstm(str, ldstm_type)
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vfp_sp_ldstm (str, ldstm_type)
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char *str;
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enum vfp_ldstm_type ldstm_type;
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{
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@ -7130,7 +7130,7 @@ vfp_sp_ldstm(str, ldstm_type)
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}
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static void
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vfp_dp_ldstm(str, ldstm_type)
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vfp_dp_ldstm (str, ldstm_type)
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char *str;
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enum vfp_ldstm_type ldstm_type;
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{
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@ -9939,6 +9939,7 @@ md_apply_fix3 (fixP, valP, seg)
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value = fixP->fx_offset;
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#endif
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value += diff;
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if ((value & ~0x3fffff) && ((value & ~0x3fffff) != ~0x3fffff))
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("branch with link out of range"));
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@ -9946,14 +9947,11 @@ md_apply_fix3 (fixP, valP, seg)
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newval = (newval & 0xf800) | ((value & 0x7fffff) >> 12);
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newval2 = (newval2 & 0xf800) | ((value & 0xfff) >> 1);
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if (fixP->fx_r_type == BFD_RELOC_THUMB_PCREL_BLX)
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/* Remove bit zero of the adjusted offset. Bit zero can only be
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set if the upper insn is at a half-word boundary, since the
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destination address, an ARM instruction, must always be on a
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word boundary. The semantics of the BLX (1) instruction, however,
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are that bit zero in the offset must always be zero, and the
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corresponding bit one in the target address will be set from bit
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one of the source address. */
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newval2 &= ~1;
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/* For a BLX instruction, make sure that the relocation is rounded up
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to a word boundary. This follows the semantics of the instruction
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which specifies that bit 1 of the target address will come from bit
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1 of the base address. */
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newval2 = (newval2 + 1) & ~ 1;
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md_number_to_chars (buf, newval, THUMB_SIZE);
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md_number_to_chars (buf + THUMB_SIZE, newval2, THUMB_SIZE);
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}
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