Add gas and ld support for openrisc

This commit is contained in:
Nick Clifton 2001-05-02 18:14:31 +00:00
parent d1b2b2dcb9
commit c7e4034828
28 changed files with 1897 additions and 466 deletions

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@ -1,3 +1,9 @@
2001-05-02 Johan Rydberg <jrydberg@opencores.org>
* elf32-openrisc.c (openrisc_elf_howto_table): Do not complain
about overflow in R_OPENRISC_LO_16_IN_INSN and
R_OPENRISC_HI_16_IN_INSN.Index: bfd/elf32-openrisc.c
2001-04-30 H.J. Lu <hjl@gnu.org>
* elf.c (_bfd_elf_link_hash_hide_symbol): Set dynindx to -1

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@ -94,29 +94,29 @@ static reloc_howto_type openrisc_elf_howto_table[] =
HOWTO (R_OPENRISC_LO_16_IN_INSN, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_OPENRISC_LO_16_IN_INSN", /* name */
false, /* partial_inplace */
0x0000ffff, /* src_mask */
0, /* src_mask */
0x0000ffff, /* dst_mask */
false), /* pcrel_offset */
HOWTO (R_OPENRISC_HI_16_IN_INSN, /* type */
16, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
1, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_OPENRISC_HI_16_IN_INSN", /* name */
false, /* partial_inplace */
0x0000ffff, /* src_mask */
0, /* src_mask */
0x0000ffff, /* dst_mask */
false), /* pcrel_offset */

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@ -1,3 +1,14 @@
2001-05-02 Johan Rydberg <jrydberg@opencores.org>
* config/tc-openrisc.c: New file.
* config/tc-openrisc.h: Likewise.
* Makefile.am: Add OpenRISC target.
* Makefile.in: Regenerated.
* configure.in (openrisc-*-*): Add target.
* configure: Regenerated.
2001-05-02 Nick Clifton <nickc@cambridge.redhat.com>
* config/tc-arm.c (arm_frag_align_code): Change error message to

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@ -63,6 +63,7 @@ CPU_TYPES = \
mn10200 \
mn10300 \
ns32k \
openrisc \
pdp11 \
pj \
ppc \
@ -246,6 +247,7 @@ TARGET_CPU_CFILES = \
config/tc-mn10200.c \
config/tc-mn10300.c \
config/tc-ns32k.c \
config/tc-openrisc.c \
config/tc-pdp11.c \
config/tc-pj.c \
config/tc-ppc.c \
@ -288,6 +290,7 @@ TARGET_CPU_HFILES = \
config/tc-mn10200.h \
config/tc-mn10300.h \
config/tc-ns32k.h \
config/tc-openrisc.h \
config/tc-pdp11.h \
config/tc-pj.h \
config/tc-ppc.h \
@ -1176,6 +1179,12 @@ DEPTC_ns32k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h $(INCDIR)/opcode/ns32k.h \
$(INCDIR)/obstack.h
DEPTC_openrisc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/openrisc-desc.h \
$(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/openrisc-opc.h \
cgen.h
DEPTC_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/pdp11.h
DEPTC_pdp11_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-pdp11.h \
@ -1519,6 +1528,10 @@ DEPOBJ_ns32k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/aout/aout64.h
DEPOBJ_openrisc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/aout/aout64.h
DEPOBJ_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
$(INCDIR)/obstack.h
@ -1805,6 +1818,9 @@ DEP_ns32k_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-ns32k.h \
DEP_ns32k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h
DEP_openrisc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h
DEP_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h
DEP_pdp11_coff = $(srcdir)/config/obj-coff.h $(srcdir)/config/tc-pdp11.h \

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@ -174,6 +174,7 @@ CPU_TYPES = \
mn10200 \
mn10300 \
ns32k \
openrisc \
pdp11 \
pj \
ppc \
@ -363,6 +364,7 @@ TARGET_CPU_CFILES = \
config/tc-mn10200.c \
config/tc-mn10300.c \
config/tc-ns32k.c \
config/tc-openrisc.c \
config/tc-pdp11.c \
config/tc-pj.c \
config/tc-ppc.c \
@ -406,6 +408,7 @@ TARGET_CPU_HFILES = \
config/tc-mn10200.h \
config/tc-mn10300.h \
config/tc-ns32k.h \
config/tc-openrisc.h \
config/tc-pdp11.h \
config/tc-pj.h \
config/tc-ppc.h \
@ -945,6 +948,13 @@ DEPTC_ns32k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h $(INCDIR)/opcode/ns32k.h \
$(INCDIR)/obstack.h
DEPTC_openrisc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/symcat.h $(srcdir)/../opcodes/openrisc-desc.h \
$(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/openrisc-opc.h \
cgen.h
DEPTC_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/opcode/pdp11.h
@ -1386,6 +1396,11 @@ DEPOBJ_ns32k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/aout/aout64.h
DEPOBJ_openrisc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h subsegs.h \
$(INCDIR)/obstack.h $(INCDIR)/aout/aout64.h
DEPOBJ_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h $(INCDIR)/aout/aout64.h \
$(INCDIR)/obstack.h
@ -1769,6 +1784,10 @@ DEP_ns32k_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-ns32k.h
DEP_openrisc_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-openrisc.h
DEP_pdp11_aout = $(srcdir)/config/obj-aout.h $(srcdir)/config/tc-pdp11.h \
$(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h

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@ -1279,6 +1279,17 @@ add_to_lit_pool ()
== inst.reloc.exp.X_add_number)
&& literals[lit_count].exp.X_unsigned == inst.reloc.exp.X_unsigned)
break;
if (literals[lit_count].exp.X_op == inst.reloc.exp.X_op
&& inst.reloc.exp.X_op == O_symbol
&& literals[lit_count].exp.X_add_number
== inst.reloc.exp.X_add_number
&& literals[lit_count].exp.X_add_symbol
== inst.reloc.exp.X_add_symbol
&& literals[lit_count].exp.X_op_symbol
== inst.reloc.exp.X_op_symbol)
break;
lit_count++;
}

505
gas/config/tc-openrisc.c Normal file
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@ -0,0 +1,505 @@
/* tc-openrisc.c -- Assembler for the OpenRISC family.
Copyright (C) 2001 Free Software Foundation.
Contributed by Johan Rydberg, jrydberg@opencores.org
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include <ctype.h>
#include "as.h"
#include "subsegs.h"
#include "symcat.h"
#include "opcodes/openrisc-desc.h"
#include "opcodes/openrisc-opc.h"
#include "cgen.h"
/* Structure to hold all of the different components describing
an individual instruction. */
typedef struct openrisc_insn openrisc_insn;
struct openrisc_insn
{
const CGEN_INSN * insn;
const CGEN_INSN * orig_insn;
CGEN_FIELDS fields;
#if CGEN_INT_INSN_P
CGEN_INSN_INT buffer [1];
#define INSN_VALUE(buf) (*(buf))
#else
unsigned char buffer [CGEN_MAX_INSN_SIZE];
#define INSN_VALUE(buf) (buf)
#endif
char * addr;
fragS * frag;
int num_fixups;
fixS * fixups [GAS_CGEN_MAX_FIXUPS];
int indices [MAX_OPERAND_INSTANCES];
};
const char comment_chars[] = "#";
const char line_comment_chars[] = "#";
const char line_separator_chars[] = ";";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
#define OPENRISC_SHORTOPTS "m:"
const char * md_shortopts = OPENRISC_SHORTOPTS;
struct option md_longopts[] =
{
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
unsigned long openrisc_machine = 0; /* default */
int
md_parse_option (c, arg)
int c ATTRIBUTE_UNUSED;
char * arg ATTRIBUTE_UNUSED;
{
return 0;
}
void
md_show_usage (stream)
FILE * stream ATTRIBUTE_UNUSED;
{
}
static void
ignore_pseudo (val)
int val ATTRIBUTE_UNUSED;
{
discard_rest_of_line ();
}
const char openrisc_comment_chars [] = ";#";
/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
{
{ "word", cons, 4 },
{ "proc", ignore_pseudo, 0 },
{ "endproc", ignore_pseudo, 0 },
{ NULL, NULL, 0 }
};
void
md_begin ()
{
/* Initialize the `cgen' interface. */
/* Set the machine number and endian. */
gas_cgen_cpu_desc = openrisc_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
CGEN_CPU_OPEN_ENDIAN,
CGEN_ENDIAN_BIG,
CGEN_CPU_OPEN_END);
openrisc_cgen_init_asm (gas_cgen_cpu_desc);
/* This is a callback from cgen to gas to parse operands. */
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
}
void
md_assemble (str)
char * str;
{
static int last_insn_had_delay_slot = 0;
openrisc_insn insn;
char * errmsg;
/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
insn.insn = openrisc_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
if (!insn.insn)
{
as_bad (errmsg);
return;
}
/* Doesn't really matter what we pass for RELAX_P here. */
gas_cgen_finish_insn (insn.insn, insn.buffer,
CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
#if 0 /* Currently disabled */
/* Warn about invalid insns in delay slots. */
if (last_insn_had_delay_slot
&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_NOT_IN_DELAY_SLOT))
as_warn (_("Instruction %s not allowed in a delay slot."),
CGEN_INSN_NAME (insn.insn));
#endif
last_insn_had_delay_slot
= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
}
/* The syntax in the manual says constants begin with '#'.
We just ignore it. */
void
md_operand (expressionP)
expressionS * expressionP;
{
if (* input_line_pointer == '#')
{
input_line_pointer ++;
expression (expressionP);
}
}
valueT
md_section_align (segment, size)
segT segment;
valueT size;
{
int align = bfd_get_section_alignment (stdoutput, segment);
return ((size + (1 << align) - 1) & (-1 << align));
}
symbolS *
md_undefined_symbol (name)
char * name ATTRIBUTE_UNUSED;
{
return 0;
}
/* Interface to relax_segment. */
/* FIXME: Look through this. */
const relax_typeS md_relax_table[] =
{
/* The fields are:
1) most positive reach of this state,
2) most negative reach of this state,
3) how many bytes this mode will add to the size of the current frag
4) which index into the table to try if we can't fit into this one. */
/* The first entry must be unused because an `rlx_more' value of zero ends
each list. */
{1, 1, 0, 0},
/* The displacement used by GAS is from the end of the 2 byte insn,
so we subtract 2 from the following. */
/* 16 bit insn, 8 bit disp -> 10 bit range.
This doesn't handle a branch in the right slot at the border:
the "& -4" isn't taken into account. It's not important enough to
complicate things over it, so we subtract an extra 2 (or + 2 in -ve
case). */
{511 - 2 - 2, -512 - 2 + 2, 0, 2 },
/* 32 bit insn, 24 bit disp -> 26 bit range. */
{0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
/* Same thing, but with leading nop for alignment. */
{0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
};
long
openrisc_relax_frag (segment, fragP, stretch)
segT segment;
fragS * fragP;
long stretch;
{
/* Address of branch insn. */
long address = fragP->fr_address + fragP->fr_fix - 2;
long growth = 0;
/* Keep 32 bit insns aligned on 32 bit boundaries. */
if (fragP->fr_subtype == 2)
{
if ((address & 3) != 0)
{
fragP->fr_subtype = 3;
growth = 2;
}
}
else if (fragP->fr_subtype == 3)
{
if ((address & 3) == 0)
{
fragP->fr_subtype = 2;
growth = -2;
}
}
else
{
growth = relax_frag (segment, fragP, stretch);
/* Long jump on odd halfword boundary? */
if (fragP->fr_subtype == 2 && (address & 3) != 0)
{
fragP->fr_subtype = 3;
growth += 2;
}
}
return growth;
}
/* Return an initial guess of the length by which a fragment must grow to
hold a branch to reach its destination.
Also updates fr_type/fr_subtype as necessary.
Called just before doing relaxation.
Any symbol that is now undefined will not become defined.
The guess for fr_var is ACTUALLY the growth beyond fr_fix.
Whatever we do to grow fr_fix or fr_var contributes to our returned value.
Although it may not be explicit in the frag, pretend fr_var starts with a
0 value. */
int
md_estimate_size_before_relax (fragP, segment)
fragS * fragP;
segT segment;
{
int old_fr_fix = fragP->fr_fix;
/* The only thing we have to handle here are symbols outside of the
current segment. They may be undefined or in a different segment in
which case linker scripts may place them anywhere.
However, we can't finish the fragment here and emit the reloc as insn
alignment requirements may move the insn about. */
if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
{
/* The symbol is undefined in this segment.
Change the relaxation subtype to the max allowable and leave
all further handling to md_convert_frag. */
fragP->fr_subtype = 2;
{
const CGEN_INSN * insn;
int i;
/* Update the recorded insn.
Fortunately we don't have to look very far.
FIXME: Change this to record in the instruction the next higher
relaxable insn to use. */
for (i = 0, insn = fragP->fr_cgen.insn; i < 4; i++, insn++)
{
if ((strcmp (CGEN_INSN_MNEMONIC (insn),
CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
== 0)
&& CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX))
break;
}
if (i == 4)
abort ();
fragP->fr_cgen.insn = insn;
return 2;
}
}
return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
}
/* *fragP has been relaxed to its final size, and now needs to have
the bytes inside it modified to conform to the new size.
Called after relaxation is finished.
fragP->fr_type == rs_machine_dependent.
fragP->fr_subtype is the subtype of what the address relaxed to. */
void
md_convert_frag (abfd, sec, fragP)
bfd * abfd ATTRIBUTE_UNUSED;
segT sec ATTRIBUTE_UNUSED;
fragS * fragP ATTRIBUTE_UNUSED;
{
/* FIXME */
}
/* Functions concerning relocs. */
/* The location from which a PC relative jump should be calculated,
given a PC relative reloc. */
long
md_pcrel_from_section (fixP, sec)
fixS * fixP;
segT sec;
{
if (fixP->fx_addsy != (symbolS *) NULL
&& (! S_IS_DEFINED (fixP->fx_addsy)
|| S_GET_SEGMENT (fixP->fx_addsy) != sec))
{
/* The symbol is undefined (or is defined but not in this section).
Let the linker figure it out. */
return 0;
}
return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
}
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
Returns BFD_RELOC_NONE if no reloc type can be found.
*FIXP may be modified if desired. */
bfd_reloc_code_real_type
md_cgen_lookup_reloc (insn, operand, fixP)
const CGEN_INSN * insn ATTRIBUTE_UNUSED;
const CGEN_OPERAND * operand;
fixS * fixP;
{
bfd_reloc_code_real_type type;
switch (operand->type)
{
case OPENRISC_OPERAND_ABS_26:
fixP->fx_pcrel = 0;
type = BFD_RELOC_OPENRISC_ABS_26;
goto emit;
case OPENRISC_OPERAND_DISP_26:
fixP->fx_pcrel = 1;
type = BFD_RELOC_OPENRISC_REL_26;
goto emit;
case OPENRISC_OPERAND_HI16:
type = BFD_RELOC_HI16;
goto emit;
case OPENRISC_OPERAND_LO16:
type = BFD_RELOC_LO16;
goto emit;
emit:
return type;
default : /* avoid -Wall warning */
break;
}
return BFD_RELOC_NONE;
}
/* See whether we need to force a relocation into the output file.
This is used to force out switch and PC relative relocations when
relaxing. */
int
openrisc_force_relocation (fix)
fixS * fix ATTRIBUTE_UNUSED;
{
if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 1;
return 0;
}
/* Write a value out to the object file, using the appropriate endianness. */
void
md_number_to_chars (buf, val, n)
char * buf;
valueT val;
int n;
{
number_to_chars_bigendian (buf, val, n);
}
/* Turn a string in input_line_pointer into a floating point constant of type
type, and store the appropriate bytes in *litP. The number of LITTLENUMS
emitted is stored in *sizeP . An error message is returned, or NULL on OK.
*/
/* Equal to MAX_PRECISION in atof-ieee.c */
#define MAX_LITTLENUMS 6
char *
md_atof (type, litP, sizeP)
char type;
char * litP;
int * sizeP;
{
int i;
int prec;
LITTLENUM_TYPE words [MAX_LITTLENUMS];
char * t;
char * atof_ieee ();
switch (type)
{
case 'f':
case 'F':
case 's':
case 'S':
prec = 2;
break;
case 'd':
case 'D':
case 'r':
case 'R':
prec = 4;
break;
/* FIXME: Some targets allow other format chars for bigger sizes here. */
default:
* sizeP = 0;
return _("Bad call to md_atof()");
}
t = atof_ieee (input_line_pointer, type, words);
if (t)
input_line_pointer = t;
* sizeP = prec * sizeof (LITTLENUM_TYPE);
for (i = 0; i < prec; i++)
{
md_number_to_chars (litP, (valueT) words[i],
sizeof (LITTLENUM_TYPE));
litP += sizeof (LITTLENUM_TYPE);
}
return 0;
}
boolean
openrisc_fix_adjustable (fixP)
fixS * fixP;
{
if (fixP->fx_addsy == NULL)
return 1;
/* We need the symbol name for the VTABLE entries */
if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 0;
return 1;
}

74
gas/config/tc-openrisc.h Normal file
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@ -0,0 +1,74 @@
/* tc-openrisc.h -- Header file for tc-openrisc.c.
Copyright (C) 2001 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TC_OPENRISC
#ifndef BFD_ASSEMBLER
/* leading space so will compile with cc */
# error OPENRISC support requires BFD_ASSEMBLER
#endif
#define LISTING_HEADER "OpenRISC GAS "
/* The target BFD architecture. */
#define TARGET_ARCH bfd_arch_openrisc
extern unsigned long openrisc_machine;
#define TARGET_MACH (openrisc_machine)
#define TARGET_FORMAT "elf32-openrisc"
#define TARGET_BYTES_BIG_ENDIAN 1
extern const char openrisc_comment_chars [];
#define tc_comment_chars openrisc_comment_chars
/* Call md_pcrel_from_section, not md_pcrel_from. */
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
/* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1
#define DIFF_EXPR_OK 1 /* .-foo gets turned into PC relative relocs */
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
#define MD_APPLY_FIX3
#define md_apply_fix3 gas_cgen_md_apply_fix3
extern boolean openrisc_fix_adjustable PARAMS ((struct fix *));
#define obj_fix_adjustable(fixP) openrisc_fix_adjustable (fixP)
/* When relaxing, we need to emit various relocs we otherwise wouldn't. */
extern int openrisc_force_relocation PARAMS ((struct fix *));
#define TC_FORCE_RELOCATION(fix) openrisc_force_relocation (fix)
#define TC_HANDLES_FX_DONE
#define tc_gen_reloc gas_cgen_tc_gen_reloc
/* Call md_pcrel_from_section(), not md_pcrel_from(). */
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
/* For 8 vs 16 vs 32 bit branch selection. */
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table

468
gas/configure vendored

File diff suppressed because it is too large Load Diff

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@ -358,6 +358,7 @@ changequote([,])dnl
;;
mn10200-*-*) fmt=elf bfd_gas=yes ;;
mn10300-*-*) fmt=elf bfd_gas=yes ;;
openrisc-*-*) fmt=elf bfd_gas=yes ;;
pj*) fmt=elf ;;
ppc-*-pe | ppc-*-cygwin* | ppc-*-winnt*)
fmt=coff em=pe ;;
@ -526,7 +527,7 @@ changequote([,])dnl
# Any other special object files needed ?
case ${cpu_type} in
fr30 | m32r)
fr30 | m32r | openrisc)
using_cgen=yes
;;

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@ -1,3 +1,15 @@
2001-05-02 Johan Rydberg <jrydberg@opencores.org>
* gas/openrisc/addi.s: New file.
* gas/openrisc/addi.d: Likewise.
* gas/openrisc/allinsn.exp: Likewise.
* gas/openrisc/allinsn.s: Likewise.
* gas/openrisc/allinsn.d: Likewise.
* gas/openrisc/lohi.s: Likewise.
* gas/openrisc/lohi.d: Likewise.
* gas/openrisc/store.s: Likewise.
* gas/openrisc/store.d: Likewise.
2001-04-05 Hans-Peter Nilsson <hp@axis.com>
* gas/cris/rd-dw2-1.d, gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d,

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@ -0,0 +1,10 @@
#as:
#objdump: -dr
#name: addi
.*: +file format .*
Disassembly of section .text:
00000000 <l_addi>:
0: 94 22 ff ff l.addi r1,r2,-1

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@ -0,0 +1,4 @@
.text
.global l_addi
l_addi:
l.addi r1, r2, -1

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@ -0,0 +1,201 @@
#as:
#objdump: -dr
#name: allinsn
.*: +file format .*
Disassembly of section .text:
00000000 <l_j>:
0: 00 00 00 00 l.j 0 <l_j>
0: R_OPENRISC_INSN_ABS_26 .text
00000004 <l_jal>:
4: 04 00 00 00 l.jal 0 <l_j>
4: R_OPENRISC_INSN_ABS_26 .text
00000008 <l_jr>:
8: 14 00 00 00 l.jr r0
0000000c <l_jalr>:
c: 14 20 00 00 l.jalr r0
00000010 <l_bal>:
10: 0b ff ff fc l.bal 0 <l_j>
00000014 <l_bnf>:
14: 0f ff ff fb l.bnf 0 <l_j>
00000018 <l_bf>:
18: 13 ff ff fa l.bf 0 <l_j>
0000001c <l_brk>:
1c: 17 00 00 00 l.brk 0x0
00000020 <l_rfe>:
20: 14 40 00 00 l.rfe r0
00000024 <l_sys>:
24: 16 00 00 00 l.sys 0x0
00000028 <l_nop>:
28: 15 00 00 00 l.nop
0000002c <l_movhi>:
2c: 18 00 00 00 l.movhi r0,0
00000030 <l_mfsr>:
30: 1c 00 00 00 l.mfsr r0,r0
00000034 <l_mtsr>:
34: 40 00 00 00 l.mtsr r0,r0
00000038 <l_lw>:
38: 80 00 00 00 l.lw r0,0\(r0\)
0000003c <l_lbz>:
3c: 84 00 00 00 l.lbz r0,0\(r0\)
00000040 <l_lbs>:
40: 88 00 00 00 l.lbs r0,0\(r0\)
00000044 <l_lhz>:
44: 8c 00 00 00 l.lhz r0,0\(r0\)
00000048 <l_lhs>:
48: 90 00 00 00 l.lhs r0,0\(r0\)
0000004c <l_sw>:
4c: d4 00 00 00 l.sw 0\(r0\),r0
00000050 <l_sb>:
50: d8 00 00 00 l.sb 0\(r0\),r0
00000054 <l_sh>:
54: dc 00 00 00 l.sh 0\(r0\),r0
00000058 <l_sll>:
58: e0 00 00 08 l.sll r0,r0,r0
0000005c <l_slli>:
5c: b4 00 00 00 l.slli r0,r0,0x0
00000060 <l_srl>:
60: e0 00 00 28 l.srl r0,r0,r0
00000064 <l_srli>:
64: b4 00 00 20 l.srli r0,r0,0x0
00000068 <l_sra>:
68: e0 00 00 48 l.sra r0,r0,r0
0000006c <l_srai>:
6c: b4 00 00 40 l.srai r0,r0,0x0
00000070 <l_ror>:
70: e0 00 00 88 l.ror r0,r0,r0
00000074 <l_rori>:
74: b4 00 00 80 l.rori r0,r0,0x0
00000078 <l_add>:
78: e0 00 00 00 l.add r0,r0,r0
0000007c <l_addi>:
7c: 94 00 00 00 l.addi r0,r0,0
00000080 <l_sub>:
80: e0 00 00 02 l.sub r0,r0,r0
00000084 <l_subi>:
84: 9c 00 00 00 l.subi r0,r0,0
00000088 <l_and>:
88: e0 00 00 03 l.and r0,r0,r0
0000008c <l_andi>:
8c: a0 00 00 00 l.andi r0,r0,0
00000090 <l_or>:
90: e0 00 00 04 l.or r0,r0,r0
00000094 <l_ori>:
94: a4 00 00 00 l.ori r0,r0,0
00000098 <l_xor>:
98: e0 00 00 05 l.xor r0,r0,r0
0000009c <l_xori>:
9c: a8 00 00 00 l.xori r0,r0,0
000000a0 <l_mul>:
a0: e0 00 00 06 l.mul r0,r0,r0
000000a4 <l_muli>:
a4: ac 00 00 00 l.muli r0,r0,0
000000a8 <l_div>:
a8: e0 00 00 09 l.div r0,r0,r0
000000ac <l_divu>:
ac: e0 00 00 0a l.divu r0,r0,r0
000000b0 <l_sfgts>:
b0: e4 c0 00 00 l.sfgts r0,r0
000000b4 <l_sfgtu>:
b4: e4 40 00 00 l.sfgtu r0,r0
000000b8 <l_sfges>:
b8: e4 e0 00 00 l.sfges r0,r0
000000bc <l_sfgeu>:
bc: e4 60 00 00 l.sfgeu r0,r0
000000c0 <l_sflts>:
c0: e5 00 00 00 l.sflts r0,r0
000000c4 <l_sfltu>:
c4: e4 80 00 00 l.sfltu r0,r0
000000c8 <l_sfles>:
c8: e5 20 00 00 l.sfles r0,r0
000000cc <l_sfleu>:
cc: e4 a0 00 00 l.sfleu r0,r0
000000d0 <l_sfgtsi>:
d0: b8 c0 00 00 l.sfgtsi r0,0
000000d4 <l_sfgtui>:
d4: b8 40 00 00 l.sfgtui r0,0x0
000000d8 <l_sfgesi>:
d8: b8 e0 00 00 l.sfgesi r0,0
000000dc <l_sfgeui>:
dc: b8 60 00 00 l.sfgeui r0,0x0
000000e0 <l_sfltsi>:
e0: b9 00 00 00 l.sfltsi r0,0
000000e4 <l_sfltui>:
e4: b8 80 00 00 l.sfltui r0,0x0
000000e8 <l_sflesi>:
e8: b9 20 00 00 l.sflesi r0,0
000000ec <l_sfleui>:
ec: b8 a0 00 00 l.sfleui r0,0x0
000000f0 <l_sfeq>:
f0: e4 00 00 00 l.sfeq r0,r0
000000f4 <l_sfeqi>:
f4: b8 00 00 00 l.sfeqi r0,0
000000f8 <l_sfne>:
f8: e4 20 00 00 l.sfne r0,r0
000000fc <l_sfnei>:
fc: b8 20 00 00 l.sfnei r0,0

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@ -0,0 +1,8 @@
# OpenRISC assembler testsuite.
if [istarget openrisc*-*-*] {
run_dump_test "allinsn"
run_dump_test "addi"
run_dump_test "lohi"
run_dump_test "store"
}

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@ -0,0 +1,260 @@
.data
foodata: .word 42
.text
footext:
.text
.global l_j
l_j:
l.j footext
.text
.global l_jal
l_jal:
l.jal footext
.text
.global l_jr
l_jr:
l.jr r0
.text
.global l_jalr
l_jalr:
l.jalr r0
.text
.global l_bal
l_bal:
l.bal footext
.text
.global l_bnf
l_bnf:
l.bnf footext
.text
.global l_bf
l_bf:
l.bf footext
.text
.global l_brk
l_brk:
l.brk 0
.text
.global l_rfe
l_rfe:
l.rfe r0
.text
.global l_sys
l_sys:
l.sys 0
.text
.global l_nop
l_nop:
l.nop
.text
.global l_movhi
l_movhi:
l.movhi r0,0
.text
.global l_mfsr
l_mfsr:
l.mfsr r0,r0
.text
.global l_mtsr
l_mtsr:
l.mtsr r0,r0
.text
.global l_lw
l_lw:
l.lw r0,0(r0)
.text
.global l_lbz
l_lbz:
l.lbz r0,0(r0)
.text
.global l_lbs
l_lbs:
l.lbs r0,0(r0)
.text
.global l_lhz
l_lhz:
l.lhz r0,0(r0)
.text
.global l_lhs
l_lhs:
l.lhs r0,0(r0)
.text
.global l_sw
l_sw:
l.sw 0(r0),r0
.text
.global l_sb
l_sb:
l.sb 0(r0),r0
.text
.global l_sh
l_sh:
l.sh 0(r0),r0
.text
.global l_sll
l_sll:
l.sll r0,r0,r0
.text
.global l_slli
l_slli:
l.slli r0,r0,0
.text
.global l_srl
l_srl:
l.srl r0,r0,r0
.text
.global l_srli
l_srli:
l.srli r0,r0,0
.text
.global l_sra
l_sra:
l.sra r0,r0,r0
.text
.global l_srai
l_srai:
l.srai r0,r0,0
.text
.global l_ror
l_ror:
l.ror r0,r0,r0
.text
.global l_rori
l_rori:
l.rori r0,r0,0
.text
.global l_add
l_add:
l.add r0,r0,r0
.text
.global l_addi
l_addi:
l.addi r0,r0,0
.text
.global l_sub
l_sub:
l.sub r0,r0,r0
.text
.global l_subi
l_subi:
l.subi r0,r0,0
.text
.global l_and
l_and:
l.and r0,r0,r0
.text
.global l_andi
l_andi:
l.andi r0,r0,0
.text
.global l_or
l_or:
l.or r0,r0,r0
.text
.global l_ori
l_ori:
l.ori r0,r0,0
.text
.global l_xor
l_xor:
l.xor r0,r0,r0
.text
.global l_xori
l_xori:
l.xori r0,r0,0
.text
.global l_mul
l_mul:
l.mul r0,r0,r0
.text
.global l_muli
l_muli:
l.muli r0,r0,0
.text
.global l_div
l_div:
l.div r0,r0,r0
.text
.global l_divu
l_divu:
l.divu r0,r0,r0
.text
.global l_sfgts
l_sfgts:
l.sfgts r0,r0
.text
.global l_sfgtu
l_sfgtu:
l.sfgtu r0,r0
.text
.global l_sfges
l_sfges:
l.sfges r0,r0
.text
.global l_sfgeu
l_sfgeu:
l.sfgeu r0,r0
.text
.global l_sflts
l_sflts:
l.sflts r0,r0
.text
.global l_sfltu
l_sfltu:
l.sfltu r0,r0
.text
.global l_sfles
l_sfles:
l.sfles r0,r0
.text
.global l_sfleu
l_sfleu:
l.sfleu r0,r0
.text
.global l_sfgtsi
l_sfgtsi:
l.sfgtsi r0,0
.text
.global l_sfgtui
l_sfgtui:
l.sfgtui r0,0
.text
.global l_sfgesi
l_sfgesi:
l.sfgesi r0,0
.text
.global l_sfgeui
l_sfgeui:
l.sfgeui r0,0
.text
.global l_sfltsi
l_sfltsi:
l.sfltsi r0,0
.text
.global l_sfltui
l_sfltui:
l.sfltui r0,0
.text
.global l_sflesi
l_sflesi:
l.sflesi r0,0
.text
.global l_sfleui
l_sfleui:
l.sfleui r0,0
.text
.global l_sfeq
l_sfeq:
l.sfeq r0,r0
.text
.global l_sfeqi
l_sfeqi:
l.sfeqi r0,0
.text
.global l_sfne
l_sfne:
l.sfne r0,r0
.text
.global l_sfnei
l_sfnei:
l.sfnei r0,0

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@ -0,0 +1,13 @@
#as:
#objdump: -dr
#name: lohi
.*: +file format .*
Disassembly of section .text:
00000000 <l_lo>:
0: 94 21 be ef l.addi r1,r1,-16657
00000004 <l_hi>:
4: 18 20 de ad l.movhi r1,-8531

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@ -0,0 +1,7 @@
.text
.global l_lo
l_lo:
l.addi r1, r1, lo(0xdeadbeef)
.global l_hi
l_hi:
l.movhi r1, hi(0xdeadbeef)

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@ -0,0 +1,13 @@
#as:
#objdump: -dr
#name: store
.*: +file format .*
Disassembly of section .text:
00000000 <l_sw>:
0: d7 e1 0f fc l.sw -4\(r1\),r1
00000004 <l_lw>:
4: 80 21 ff 9c l.lw r1,-100\(r1\)

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@ -0,0 +1,7 @@
.text
.global l_sw
l_sw:
l.sw -4(r1), r1
.global l_lw
l_lw:
l.lw r1, -100(r1)

View File

@ -1,3 +1,17 @@
2001-05-02 Johan Rydberg <jrydberg@opencores.org>
* emulparams/elf32openrisc.sh: New file.
* Makefile.am: Add OpenRISC target.
* Makefile.in: Regenerated.
* configure.tgt: Add openrisc-*-* mapping.
2001-05-02 Nick Clifton <nickc@redhat.com>
* emultempl/aix.em: Replace buystring with xstrdup.
* emultempl/beos.em: Replace buystring with xstrdup.
2001-05-02 H.J. Lu <hjl@gnu.org>
* ldfile.c: Include "libiberty.h".

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@ -155,6 +155,7 @@ ALL_EMULATIONS = \
eelf32lppc.o \
eelf32lppcsim.o \
eelf32mcore.o \
eelf32openrisc.o \
eelf32ppc.o \
eelf32ppclinux.o \
eelf32ppcsim.o \
@ -482,6 +483,9 @@ eelf32lppcsim.c: $(srcdir)/emulparams/elf32lppcsim.sh \
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lsmip "$(tdir_elf32lsmip)"
eelf32openrisc.c: $(srcdir)/emulparams/elf32openrisc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32openrisc "$(tdir_openrisc)"
eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc "$(tdir_elf32ppc)"

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@ -158,19 +158,49 @@ HOSTING_LIBS = @HOSTING_LIBS@
HOSTING_EMU = -m $(EMUL)
# Setup the testing framework, if you have one
EXPECT = `if [ -f $$r/../expect/expect ] ; then echo $$r/../expect/expect ; else echo expect ; fi`
EXPECT = `if [ -f $$r/../expect/expect ] ; \
then echo $$r/../expect/expect ; \
else echo expect ; fi`
RUNTEST = `if [ -f $${srcroot}/../dejagnu/runtest ] ; then echo $${srcroot}/../dejagnu/runtest ; else echo runtest ; fi`
RUNTEST = `if [ -f $${srcroot}/../dejagnu/runtest ] ; \
then echo $${srcroot}/../dejagnu/runtest ; \
else echo runtest ; fi`
RUNTESTFLAGS =
CC_FOR_TARGET = ` if [ -f $$r/../gcc/xgcc ] ; then if [ -f $$r/../newlib/Makefile ] ; then echo $$r/../gcc/xgcc -B$$r/../gcc/ -idirafter $$r/../newlib/targ-include -idirafter $${srcroot}/../newlib/libc/include -nostdinc; else echo $$r/../gcc/xgcc -B$$r/../gcc/; fi; else if [ "@host@" = "@target@" ] ; then echo $(CC); else echo gcc | sed '$(transform)'; fi; fi`
CC_FOR_TARGET = ` \
if [ -f $$r/../gcc/xgcc ] ; then \
if [ -f $$r/../newlib/Makefile ] ; then \
echo $$r/../gcc/xgcc -B$$r/../gcc/ -idirafter $$r/../newlib/targ-include -idirafter $${srcroot}/../newlib/libc/include -nostdinc; \
else \
echo $$r/../gcc/xgcc -B$$r/../gcc/; \
fi; \
else \
if [ "@host@" = "@target@" ] ; then \
echo $(CC); \
else \
echo gcc | sed '$(transform)'; \
fi; \
fi`
CXX = gcc
CXX_FOR_TARGET = ` if [ -f $$r/../gcc/xgcc ] ; then if [ -f $$r/../newlib/Makefile ] ; then echo $$r/../gcc/xgcc -B$$r/../gcc/ -idirafter $$r/../newlib/targ-include -idirafter $${srcroot}/../newlib/libc/include -nostdinc; else echo $$r/../gcc/xgcc -B$$r/../gcc/; fi; else if [ "@host@" = "@target@" ] ; then echo $(CXX); else echo gcc | sed '$(transform)'; fi; fi`
CXX_FOR_TARGET = ` \
if [ -f $$r/../gcc/xgcc ] ; then \
if [ -f $$r/../newlib/Makefile ] ; then \
echo $$r/../gcc/xgcc -B$$r/../gcc/ -idirafter $$r/../newlib/targ-include -idirafter $${srcroot}/../newlib/libc/include -nostdinc; \
else \
echo $$r/../gcc/xgcc -B$$r/../gcc/; \
fi; \
else \
if [ "@host@" = "@target@" ] ; then \
echo $(CXX); \
else \
echo gcc | sed '$(transform)'; \
fi; \
fi`
noinst_PROGRAMS = ld-new
@ -183,25 +213,186 @@ INCLUDES = -D_GNU_SOURCE -I. -I$(srcdir) -I../bfd -I$(BFDDIR) -I$(INCDIR) -I$(to
BFDLIB = ../bfd/libbfd.la
LIBIBERTY = ../libiberty/libiberty.a
ALL_EMULATIONS = ea29k.o eaixppc.o eaixrs6.o ealpha.o earcelf.o earm_epoc_pe.o earmaoutb.o earmaoutl.o earmcoff.o earmelf.o earmelf_linux.o earmelf_oabi.o earmnbsd.o earmpe.o eavr1200.o eavr23xx.o eavr4433.o eavr44x4.o eavr85xx.o eavrmega103.o eavrmega161.o eavrmega603.o ecoff_sparc.o ecrisaout.o ecriself.o ecrislinux.o ed10velf.o ed30v_e.o ed30v_o.o ed30velf.o edelta68.o eebmon29k.o eelf32_i960.o eelf32_i860.o eelf32_sparc.o eelf32b4300.o eelf32bmip.o eelf32bmipn32.o eelf32btsmip.o eelf32ltsmip.o eelf32ebmip.o eelf32elmip.o eelf32fr30.o eelf32i370.o eelf32l4300.o eelf32lmip.o eelf32lppc.o eelf32lppcsim.o eelf32mcore.o eelf32ppc.o eelf32ppclinux.o eelf32ppcsim.o eelf_i386.o eelf_i386_be.o eelf_i386_chaos.o eelf_s390.o egld960.o egld960coff.o eh8300.o eh8300h.o eh8300s.o eh8500.o eh8500b.o eh8500c.o eh8500m.o eh8500s.o ehp300bsd.o ehp3hpux.o ehppaelf.o ehppalinux.o ei386aout.o ei386beos.o ei386bsd.o ei386coff.o ei386go32.o ei386linux.o ei386lynx.o ei386mach.o ei386moss.o ei386msdos.o ei386nbsd.o ei386nw.o ei386pe.o ei386pe_posix.o elnk960.o em68hc11elf.o em68hc11elfb.o em68hc12elf.o em68hc12elfb.o em68k4knbsd.o em68kaout.o em68kaux.o em68kcoff.o em68kelf.o em68klinux.o em68klynx.o em68knbsd.o em68kpsos.o em88kbcs.o emcorepe.o emipsbig.o emipsbsd.o emipsidt.o emipsidtl.o emipslit.o emipslnews.o emipspe.o enews.o ens32knbsd.o epc532macha.o epdp11.o epjelf.o epjlelf.o eppcmacos.o eppcnw.o eppcpe.o eriscix.o esa29200.o esh.o eshelf.o eshelf_linux.o eshlelf_linux.o eshl.o eshlelf.o eshpe.o esparcaout.o esparclinux.o esparclynx.o esparcnbsd.o est2000.o esun3.o esun4.o etic30aout.o etic30coff.o etic54xcoff.o etic80coff.o evanilla.o evax.o evsta.o ew65.o ez8001.o ez8002.o
ALL_EMULATIONS = \
ea29k.o \
eaixppc.o \
eaixrs6.o \
ealpha.o \
earcelf.o \
earm_epoc_pe.o \
earmaoutb.o \
earmaoutl.o \
earmcoff.o \
earmelf.o \
earmelf_linux.o \
earmelf_oabi.o \
earmnbsd.o \
earmpe.o \
eavr1200.o \
eavr23xx.o \
eavr4433.o \
eavr44x4.o \
eavr85xx.o \
eavrmega103.o \
eavrmega161.o \
eavrmega603.o \
ecoff_sparc.o \
ecrisaout.o \
ecriself.o \
ecrislinux.o \
ed10velf.o \
ed30v_e.o \
ed30v_o.o \
ed30velf.o \
edelta68.o \
eebmon29k.o \
eelf32_i960.o \
eelf32_i860.o \
eelf32_sparc.o \
eelf32b4300.o \
eelf32bmip.o \
eelf32bmipn32.o \
eelf32btsmip.o \
eelf32ltsmip.o \
eelf32ebmip.o \
eelf32elmip.o \
eelf32fr30.o \
eelf32i370.o \
eelf32l4300.o \
eelf32lmip.o \
eelf32lppc.o \
eelf32lppcsim.o \
eelf32mcore.o \
eelf32openrisc.o \
eelf32ppc.o \
eelf32ppclinux.o \
eelf32ppcsim.o \
eelf_i386.o \
eelf_i386_be.o \
eelf_i386_chaos.o \
eelf_s390.o \
egld960.o \
egld960coff.o \
eh8300.o \
eh8300h.o \
eh8300s.o \
eh8500.o \
eh8500b.o \
eh8500c.o \
eh8500m.o \
eh8500s.o \
ehp300bsd.o \
ehp3hpux.o \
ehppaelf.o \
ehppalinux.o \
ei386aout.o \
ei386beos.o \
ei386bsd.o \
ei386coff.o \
ei386go32.o \
ei386linux.o \
ei386lynx.o \
ei386mach.o \
ei386moss.o \
ei386msdos.o \
ei386nbsd.o \
ei386nw.o \
ei386pe.o \
ei386pe_posix.o \
elnk960.o \
em68hc11elf.o \
em68hc11elfb.o \
em68hc12elf.o \
em68hc12elfb.o \
em68k4knbsd.o \
em68kaout.o \
em68kaux.o \
em68kcoff.o \
em68kelf.o \
em68klinux.o \
em68klynx.o \
em68knbsd.o \
em68kpsos.o \
em88kbcs.o \
emcorepe.o \
emipsbig.o \
emipsbsd.o \
emipsidt.o \
emipsidtl.o \
emipslit.o \
emipslnews.o \
emipspe.o \
enews.o \
ens32knbsd.o \
epc532macha.o \
epdp11.o \
epjelf.o \
epjlelf.o \
eppcmacos.o \
eppcnw.o \
eppcpe.o \
eriscix.o \
esa29200.o \
esh.o \
eshelf.o \
eshelf_linux.o \
eshlelf_linux.o \
eshl.o \
eshlelf.o \
eshpe.o \
esparcaout.o \
esparclinux.o \
esparclynx.o \
esparcnbsd.o \
est2000.o \
esun3.o \
esun4.o \
etic30aout.o \
etic30coff.o \
etic54xcoff.o \
etic80coff.o \
evanilla.o \
evax.o \
evsta.o \
ew65.o \
ez8001.o \
ez8002.o
ALL_64_EMULATIONS = eelf64_aix.o eelf64_ia64.o eelf_x86_64.o eelf64_s390.o eelf64_sparc.o eelf64alpha.o eelf64bmip.o eelf64btsmip.o eelf64ltsmip.o eelf64hppa.o
ALL_64_EMULATIONS = \
eelf64_aix.o \
eelf64_ia64.o \
eelf_x86_64.o \
eelf64_s390.o \
eelf64_sparc.o \
eelf64alpha.o \
eelf64bmip.o \
eelf64btsmip.o \
eelf64ltsmip.o \
eelf64hppa.o
ALL_EMUL_EXTRA_OFILES = deffilep.o pe-dll.o
ALL_EMUL_EXTRA_OFILES = \
deffilep.o \
pe-dll.o
CFILES = ldctor.c ldemul.c ldexp.c ldfile.c ldlang.c ldmain.c ldmisc.c ldver.c ldwrite.c lexsup.c mri.c ldcref.c pe-dll.c
CFILES = ldctor.c ldemul.c ldexp.c ldfile.c ldlang.c \
ldmain.c ldmisc.c ldver.c ldwrite.c lexsup.c \
mri.c ldcref.c pe-dll.c
HFILES = ld.h ldctor.h ldemul.h ldexp.h ldfile.h ldlang.h ldlex.h ldmain.h ldmisc.h ldver.h ldwrite.h mri.h deffile.h pe-dll.h
HFILES = ld.h ldctor.h ldemul.h ldexp.h ldfile.h \
ldlang.h ldlex.h ldmain.h ldmisc.h ldver.h \
ldwrite.h mri.h deffile.h pe-dll.h
GENERATED_CFILES = ldgram.c ldlex.c deffilep.c
GENERATED_HFILES = ldgram.h ldemul-list.h deffilep.h
OFILES = ldgram.o ldlex.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o ${EMULATION_OFILES} ${EMUL_EXTRA_OFILES}
OFILES = ldgram.o ldlex.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o \
ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o \
ldfile.o ldcref.o ${EMULATION_OFILES} ${EMUL_EXTRA_OFILES}
STAGESTUFF = *.o ldscripts/* e*.c
@ -220,7 +411,8 @@ GEN_DEPENDS = $(srcdir)/genscripts.sh stringify.sed
# We need this for automake to use YLWRAP.
EXTRA_ld_new_SOURCES = deffilep.y
ld_new_SOURCES = ldgram.y ldlex.l lexsup.c ldlang.c mri.c ldctor.c ldmain.c ldwrite.c ldexp.c ldemul.c ldver.c ldmisc.c ldfile.c ldcref.c
ld_new_SOURCES = ldgram.y ldlex.l lexsup.c ldlang.c mri.c ldctor.c ldmain.c \
ldwrite.c ldexp.c ldemul.c ldver.c ldmisc.c ldfile.c ldcref.c
ld_new_DEPENDENCIES = $(EMULATION_OFILES) $(EMUL_EXTRA_OFILES) $(BFDLIB) $(LIBIBERTY) $(INTLDEPS)
ld_new_LDADD = $(EMULATION_OFILES) $(EMUL_EXTRA_OFILES) $(BFDLIB) $(LIBIBERTY) $(INTLLIBS)
@ -230,7 +422,8 @@ TESTBFDLIB = @TESTBFDLIB@
MAINTAINERCLEANFILES = ldver.texi
MOSTLYCLEANFILES = $(STAGESTUFF) ld1$(EXEEXT) ld2$(EXEEXT) ld3$(EXEEXT) ldemul-list.h crtbegin.o crtend.o ld.log ld.sum
MOSTLYCLEANFILES = $(STAGESTUFF) ld1$(EXEEXT) ld2$(EXEEXT) ld3$(EXEEXT) \
ldemul-list.h crtbegin.o crtend.o ld.log ld.sum
CLEANFILES = dep.sed DEP DEPA DEP1 DEP2
@ -1004,6 +1197,9 @@ eelf32lppcsim.c: $(srcdir)/emulparams/elf32lppcsim.sh \
eelf32lsmip.c: $(srcdir)/emulparams/elf32lsmip.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32lsmip "$(tdir_elf32lsmip)"
eelf32openrisc.c: $(srcdir)/emulparams/elf32openrisc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32openrisc "$(tdir_openrisc)"
eelf32ppc.c: $(srcdir)/emulparams/elf32ppc.sh \
$(srcdir)/emultempl/elf32.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32ppc "$(tdir_elf32ppc)"

450
ld/configure vendored

File diff suppressed because it is too large Load Diff

View File

@ -304,6 +304,7 @@ alpha*-*-netbsd*) targ_emul=elf64alpha ;;
z8k-*-coff) targ_emul=z8002; targ_extra_emuls=z8001 ;;
ns32k-pc532-mach* | ns32k-pc532-ux*) targ_emul=pc532macha ;;
ns32k-pc532-netbsd* | ns32k-pc532-lites*) targ_emul=ns32knbsd ;;
openrisc-*-*) targ_emul=elf32openrisc ;;
powerpc-*-freebsd*) targ_emul=elf32ppc;
targ_extra_emuls=elf32ppcsim;
targ_extra_libpath=elf32ppc;

10
ld/emulparams/elf32openrisc.sh Executable file
View File

@ -0,0 +1,10 @@
MACHINE=
SCRIPT_NAME=elf
OUTPUT_FORMAT="elf32-openrisc"
TEXT_START_ADDR=0x10000
ARCH=openrisc
MAXPAGESIZE=0x1000
ENTRY=_start
EMBEDDED=yes
NOP=0x15000000

View File

@ -857,7 +857,7 @@ gld${EMULATION_NAME}_read_file (filename, import)
n = ((struct export_symbol_list *)
xmalloc (sizeof (struct export_symbol_list)));
n->next = export_symbols;
n->name = buystring (symname);
n->name = xstrdup (symname);
n->syscall = syscall;
export_symbols = n;
}

View File

@ -739,7 +739,7 @@ gld${EMULATION_NAME}_place_orphan (file, s)
/* Look up the output section. The Microsoft specs say sections names in
image files never contain a '\$'. Fortunately, lang_..._lookup creates
the section if it doesn't exist. */
output_secname = buystring (secname);
output_secname = xstrdup (secname);
ps = strchr (output_secname + 1, '\$');
*ps = 0;
os = lang_output_section_statement_lookup (output_secname);