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MIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership 

Limit the `SD ra, offset(sp)' instruction (I64/SDRASP major/minor
opcode) to the MIPS III rather than MIPS I ISA.  This is a 64-bit
instruction requiring a 64-bit ISA.  This bug has been there since
forever.

	opcodes/
	* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
	than I1 for the SP-relative "sd"/$ra entry (SDRASP minor
	opcode).

	gas/
	* testsuite/gas/mips/mips16-sdrasp.d: New test.
	* testsuite/gas/mips/mips16-sdrasp.l: New stderr output.
	* testsuite/gas/mips/mips16-sdrasp.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new test.
This commit is contained in:
Maciej W. Rozycki 2016-12-20 01:50:24 +00:00
parent 95f6ac8822
commit c97dda72b9
7 changed files with 27 additions and 1 deletions
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7
gas/ChangeLog
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@ -1,3 +1,10 @@
2016-12-20 Maciej W. Rozycki <macro@imgtec.com>
* testsuite/gas/mips/mips16-sdrasp.d: New test.
* testsuite/gas/mips/mips16-sdrasp.l: New stderr output.
* testsuite/gas/mips/mips16-sdrasp.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
2016-12-20 Maciej W. Rozycki <macro@imgtec.com>
* testsuite/gas/mips/mips.exp: Limit remaining tests that

1
gas/testsuite/gas/mips/mips.exp
View File

@ -1313,6 +1313,7 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16-intermix"
run_dump_test "mips16-extend"
run_dump_test "mips16-sprel-swap"
run_dump_test "mips16-sdrasp"
run_dump_test "mips16-branch-unextended-1"
run_dump_test "mips16-branch-unextended-2"

3
gas/testsuite/gas/mips/mips16-sdrasp.d Normal file
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@ -0,0 +1,3 @@
#name: MIPS16 SDRASP opcode with 32-bit ISA
#as: -32 -march=mips1
#error-output: mips16-sdrasp.l

2
gas/testsuite/gas/mips/mips16-sdrasp.l Normal file
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@ -0,0 +1,2 @@
.*: Assembler messages:
.*:3: Error: opcode not supported on this processor: mips1 \(mips1\) `sd \$31,0\(\$29\)'

7
gas/testsuite/gas/mips/mips16-sdrasp.s Normal file
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@ -0,0 +1,7 @@
.set mips16
foo:
sd $31, 0($29)
# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
.align 4, 0
.space 16

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2016-12-20 Maciej W. Rozycki <macro@imgtec.com>
* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
than I1 for the SP-relative "sd"/$ra entry (SDRASP minor
opcode).
2016-12-20 Andrew Waterman <andrew@sifive.com>
* riscv-opc.c (riscv_opcodes): Rename the "*.sc" instructions to

2
opcodes/mips16-opc.c
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@ -322,7 +322,7 @@ const struct mips_opcode mips16_opcodes[] =
{"sb", "y,5(x)", 0xc000, 0xf800, RD_1|RD_3, 0, I1, 0, 0 },
{"sd", "y,D(x)", 0x7800, 0xf800, RD_1|RD_3, 0, I3, 0, 0 },
{"sd", "y,D(S)", 0xf900, 0xff00, RD_1, RD_SP, I3, 0, 0 },
{"sd", "R,C(S)", 0xfa00, 0xff00, 0, RD_31|RD_SP, I1, 0, 0 },
{"sd", "R,C(S)", 0xfa00, 0xff00, 0, RD_31|RD_SP, I3, 0, 0 },
{"sh", "y,H(x)", 0xc800, 0xf800, RD_1|RD_3, 0, I1, 0, 0 },
{"sllv", "y,x", 0xe804, 0xf81f, MOD_1|RD_2, 0, I1, 0, 0 },
{"sll", "x,w,<", 0x3000, 0xf803, WR_1|RD_2, 0, I1, 0, 0 },