2001-01-01 Philip Blundell <philb@gnu.org>

* gas/arm/adrl.s, gas/arm/pic.s, gas/arm/msr-bad.s: New tests.
	* gas/arm/arm.exp: Run them.
	* gas/arm/adrl.d, gas/arm/pic.d: Expected results for above.
	* gas/arm/arm6.s: Also test uppercase `CPSR' and `SPSR'.
This commit is contained in:
Phil Blundell 2001-01-01 13:43:06 +00:00
parent a735d1cdb9
commit ca6489f958
8 changed files with 83 additions and 0 deletions

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@ -1,3 +1,10 @@
2001-01-01 Philip Blundell <philb@gnu.org>
* gas/arm/adrl.s, gas/arm/pic.s, gas/arm/msr-bad.s: New tests.
* gas/arm/arm.exp: Run them.
* gas/arm/adrl.d, gas/arm/pic.d: Expected results for above.
* gas/arm/arm6.s: Also test uppercase `CPSR' and `SPSR'.
2000-12-22 H.J. Lu <hjl@gnu.org>
* gas/i386/intel.s: Replace "nop" with ".p2align 4,0".

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@ -0,0 +1,18 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: ADRL
# Test the `ADRL' pseudo-op
.*: +file format .*arm.*
Disassembly of section .text:
...
0x00002000 e24f0008 sub r0, pc, #8 ; 0x8
0x00002004 e2400c20 sub r0, r0, #8192 ; 0x2000
0x00002008 e28f0018 add r0, pc, #24 ; 0x18
0x0000200c e2800c20 add r0, r0, #8192 ; 0x2000
0x00002010 e24f0018 sub r0, pc, #24 ; 0x18
0x00002014 e1a00000 nop \(mov r0,r0\)
0x00002018 e28f0000 add r0, pc, #0 ; 0x0
0x0000201c e1a00000 nop \(mov r0,r0\)
...

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@ test ADRL pseudo-op
.text
.align 0
1:
.space 8192
2:
adrl r0, 1b
adrl r0, 1f
adrl r0, 2b
adrl r0, 2f
2:
.space 8200
1:

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@ -7,6 +7,7 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions"
gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions"
gas_test_error "msr-bad.s" "" "MSR with bad immediate operand"
gas_test "arm7dm.s" "" $stdoptlist "Arm 7DM instructions"
@ -23,6 +24,12 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
gas_test "float.s" "" $stdoptlist "Core floating point instructions"
run_dump_test "xscale"
run_dump_test "adrl"
if {[istarget *-*-elf*] || [istarget *-*-linux*]} then {
run_dump_test "pic"
}
}
# Not all arm targets are bi-endian, so only run this test on ones

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@ -9,3 +9,11 @@
msr spsr_flg, r8
msr spsr_all, r9
mrs r8, CPSR
mrs r2, SPSR
msr CPSR, r1
msrne CPSR_flg, #0xf0000000
msr SPSR_flg, r8
msr SPSR_all, r9

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@ -0,0 +1,2 @@
@ illegal set of CPSR from immediate value
msr cpsr, #0

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#objdump: -dr --prefix-addresses --show-raw-insn
#name: PIC
# Test generation of PIC
.*: +file format .*arm.*
Disassembly of section .text:
0x00000000 ebfffffe bl 0x00000000
0: R_ARM_PC24 foo
0x00000004 ebfffffe bl 0x00000004
4: R_ARM_PLT32 foo
\.\.\.
8: R_ARM_ABS32 sym
c: R_ARM_GOT32 sym
10: R_ARM_GOTOFF sym
14: R_ARM_GOTPC _GLOBAL_OFFSET_TABLE_

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@ -0,0 +1,11 @@
@ Test file for ARM ELF PIC
.text
.align 0
bl foo
bl foo(PLT)
.word sym
.word sym(GOT)
.word sym(GOTOFF)
1:
.word _GLOBAL_OFFSET_TABLE_ - 1b