Initial versions of sparc64 port.
Some stuff can be removed when sparc-tdep.c is upgraded.
This commit is contained in:
David Edelsohn
parent
8f4b91429e
commit
cb747ec55b
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@ -15,6 +15,10 @@
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Do-first:
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if ( echo $* | grep keep\-v9 > /dev/null ) ; then
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keep_these_too="sp64-tdep.c remote-sp64sim.c"
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fi
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# All files listed between the "Things-to-keep:" line and the
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# "Files-to-sed:" line will be kept. All other files will be removed.
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# Directories listed in this section will have their own Sanitize
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@ -0,0 +1,420 @@
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/* Remote debugging interface for SPARC64 Simulator.
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Copyright 1992 Free Software Foundation, Inc.
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Contributed by Cygnus Support. Hacked from Steve Chamberlain's Z8000 work
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by Doug Evans. (dje@cygnus.com).
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include "wait.h"
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#include "value.h"
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#include <string.h>
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#include <ctype.h>
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#include <fcntl.h>
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#include <signal.h>
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#include <setjmp.h>
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#include <errno.h>
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#include "terminal.h"
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#include "target.h"
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#include "gdbcore.h"
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#include "sp64sim.h"
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/* Naming conventions:
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simif_xxx are internal objects that describe top level interfaces to the
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simulator (simif for SIMulator InterFace).
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sim_xxx are external counterparts to the simif_xxx objects that must be
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provided by the simulator. */
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/* Forward data declarations */
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extern struct target_ops simif_ops;
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int simif_verbose = 0; /* available to the simulator to use */
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static int program_loaded = 0;
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static void dump_mem ();
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static void
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simif_fetch_register (regno)
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int regno;
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{
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if (regno == -1)
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{
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if (simif_verbose)
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printf_filtered ("simif_fetch_register: %d\n", regno);
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for (regno = 0; regno < 16; regno++)
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simif_fetch_register (regno);
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}
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else
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{
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char buf[MAX_REGISTER_RAW_SIZE];
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sim_fetch_register (regno, buf);
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supply_register (regno, buf);
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if (simif_verbose)
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{
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printf_filtered ("simif_fetch_register: %d", regno);
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dump_mem (buf, sizeof (REGISTER_TYPE));
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}
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}
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}
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static void
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simif_store_register (regno)
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int regno;
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{
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if (regno == -1)
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{
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if (simif_verbose)
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printf_filtered ("simif_store_register: %d\n", regno);
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for (regno = 0; regno < 16; regno++)
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simif_store_register (regno);
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}
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else
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{
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char value[sizeof (REGISTER_TYPE)];
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read_register_gen (regno, value);
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SWAP_TARGET_AND_HOST (value, sizeof (REGISTER_TYPE));
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sim_store_register (regno, value);
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if (simif_verbose)
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{
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printf_filtered ("simif_store_register: %d", regno);
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dump_mem (value, sizeof (REGISTER_TYPE));
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}
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}
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}
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static void
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simif_kill (arg,from_tty)
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char *arg;
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int from_tty;
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{
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if (simif_verbose)
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printf_filtered ("simif_kill: arg \"%s\"\n", arg);
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sim_kill (); /* close fd's, remove mappings */
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inferior_pid = 0;
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}
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/* Download a file specified in 'args', to the sim. */
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static void
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simif_load (args, fromtty)
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char *args;
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int fromtty;
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{
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bfd *abfd;
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if (simif_verbose)
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printf_filtered ("simif_load: args \"%s\"\n", args);
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inferior_pid = 0;
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program_loaded = 0;
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/* FIXME: a.out should be a config parm and/or an arg. */
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abfd = bfd_openr (args,"a.out-sunos-big");
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if (!abfd)
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error ("Unable to open file %s.", args);
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if (bfd_check_format (abfd, bfd_object) ==0)
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error ("File is not an object file.");
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if (sim_load (abfd, args) != 0)
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return;
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program_loaded = 1;
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/* It is sim_load()'s job to set this. */
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/*sim_set_pc (abfd->start_address); - can't do 'cus we use RMTVaddr */
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}
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/* This is called not only when we first attach, but also when the
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user types "run" after having attached. */
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static void
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simif_create_inferior (exec_file, args, env)
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char *exec_file;
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char *args;
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char **env;
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{
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int len,entry_pt;
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char *arg_buf,**argv;
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if (! program_loaded)
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error ("No program loaded.");
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if (simif_verbose)
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printf_filtered ("simif_create_inferior: exec_file \"%s\", args \"%s\"\n",
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exec_file, args);
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if (exec_file == 0 || exec_bfd == 0)
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error ("No exec file specified.");
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entry_pt = (int) bfd_get_start_address (exec_bfd);
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simif_kill (NULL, NULL);
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remove_breakpoints ();
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init_wait_for_inferior ();
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len = 5 + strlen (exec_file) + 1 + strlen (args) + 1 + /*slop*/ 10;
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arg_buf = (char *) alloca (len);
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arg_buf[0] = '\0';
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strcat (arg_buf, exec_file);
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strcat (arg_buf, " ");
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strcat (arg_buf, args);
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argv = buildargv (arg_buf);
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make_cleanup (freeargv, (char *) argv);
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sim_set_args (argv, env);
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inferior_pid = 42;
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insert_breakpoints (); /* Needed to get correct instruction in cache */
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proceed (entry_pt, -1, 0);
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}
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/* Called when selecting the simulator. EG: (gdb) target sim name.
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NAME unused at present. */
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static void
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simif_open (name, from_tty)
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char *name;
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int from_tty;
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{
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if (simif_verbose)
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printf_filtered ("simif_open: name \"%s\"\n", name);
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if (sim_init (name) != 0)
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{
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error ("Unable to initialize simulator (insufficient memory?).");
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return;
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}
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push_target (&simif_ops);
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target_fetch_registers (-1);
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printf_filtered ("Connected to the simulator.\n");
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}
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/* Close out all files and local state before this target loses control. */
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static void
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simif_close (quitting)
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int quitting;
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{
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if (simif_verbose)
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printf_filtered ("simif_close: quitting %d\n", quitting);
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program_loaded = 0;
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/* FIXME: Need to call sim_close() to close all files and
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delete all mappings. */
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}
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/* Terminate the open connection to the remote debugger.
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Use this when you want to detach and do something else
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with your gdb. */
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static void
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simif_detach (args,from_tty)
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char *args;
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int from_tty;
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{
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if (simif_verbose)
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printf_filtered ("simif_detach: args \"%s\"\n", args);
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pop_target (); /* calls simif_close to do the real work */
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if (from_tty)
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printf_filtered ("Ending simulator %s debugging\n", target_shortname);
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}
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/* Tell the remote machine to resume. */
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/* FIXME: What are A and B? */
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static void
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simif_resume (a,b)
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{
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if (simif_verbose)
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printf_filtered ("simif_resume: %d/%d\n", a, b);
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sim_resume (a, b);
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}
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/* Wait until the remote machine stops, then return,
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storing status in STATUS just as `wait' would. */
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static int
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simif_wait (status)
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WAITTYPE *status;
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{
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if (simif_verbose)
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printf_filtered ("simif_wait: ");
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#if 1
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*status = sim_stop_signal ();
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#else
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WSETSTOP (*status, sim_stop_signal ());
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#endif
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if (simif_verbose)
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printf_filtered ("status %d\n", *status);
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return 0;
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}
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/* Get ready to modify the registers array. On machines which store
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individual registers, this doesn't need to do anything. On machines
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which store all the registers in one fell swoop, this makes sure
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that registers contains all the registers from the program being
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debugged. */
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static void
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simif_prepare_to_store ()
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{
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/* Do nothing, since we can store individual regs */
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}
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static int
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simif_xfer_inferior_memory (memaddr, myaddr, len, write, target)
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CORE_ADDR memaddr;
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char *myaddr;
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int len;
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int write;
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struct target_ops *target; /* ignored */
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{
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if (simif_verbose)
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{
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printf_filtered ("simif_xfer_inferior_memory: myaddr 0x%x, memaddr 0x%x, len %d, write %d\n",
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myaddr, memaddr, len, write);
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if (simif_verbose && write)
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dump_mem(myaddr, len);
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}
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if (! program_loaded)
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error ("No program loaded.");
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if (write)
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{
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len = sim_write (memaddr, myaddr, len);
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}
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else
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{
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len = sim_read (memaddr, myaddr, len);
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if (simif_verbose && len > 0)
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dump_mem(myaddr, len);
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}
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return len;
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}
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static void
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simif_files_info ()
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{
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char *file = "nothing";
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if (exec_bfd)
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file = bfd_get_filename (exec_bfd);
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if (simif_verbose)
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printf_filtered ("simif_files_info: file \"%s\"\n", file);
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if (exec_bfd)
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printf_filtered ("\tAttached to %s running program %s\n",
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target_shortname, file);
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}
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/* Clear the sims notion of what the break points are */
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static void
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simif_mourn ()
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{
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if (simif_verbose)
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printf_filtered ("simif_mourn:\n");
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remove_breakpoints ();
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generic_mourn_inferior ();
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}
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/* Define the target subroutine names */
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struct target_ops simif_ops =
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{
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"sim", "SPARC64 Simulator",
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"Use the SPARC64 Simulator",
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simif_open, simif_close,
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0, simif_detach, simif_resume, simif_wait, /* attach */
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simif_fetch_register, simif_store_register,
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simif_prepare_to_store,
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simif_xfer_inferior_memory,
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simif_files_info,
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0, 0, /* Breakpoints */
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0, 0, 0, 0, 0, /* Terminal handling */
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simif_kill, /* FIXME, kill */
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simif_load,
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0, /* lookup_symbol */
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simif_create_inferior, /* create_inferior */
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simif_mourn, /* mourn_inferior FIXME */
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0, /* can_run */
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0, /* notice_signals */
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process_stratum, 0, /* next */
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1, 1, 1, 1, 1, /* all mem, mem, stack, regs, exec */
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0, 0, /* Section pointers */
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OPS_MAGIC, /* Always the last thing */
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};
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static void
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simif_snoop ()
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{
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simif_verbose = ! simif_verbose;
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if (simif_verbose)
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printf_filtered ("Snoop enabled\n");
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else
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printf_filtered ("Snoop disabled\n");
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}
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/***********************************************************************/
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void
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_initialize_remote_sim ()
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{
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add_target (&simif_ops);
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add_com ("snoop", class_obscure, simif_snoop,
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"Show what commands are going to the simulator");
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}
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static void
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dump_mem (buf, len)
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char *buf;
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int len;
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{
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if (len <= 8)
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{
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if (len == 8 || len == 4)
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{
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long l[2];
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memcpy (l, buf, len);
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printf_filtered ("\t0x%x", l[0]);
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printf_filtered (len == 8 ? " 0x%x\n" : "\n", l[1]);
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}
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else
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{
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int i;
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printf_filtered ("\t");
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for (i = 0; i < len; i++)
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printf_filtered ("0x%x ", buf[i]);
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printf_filtered ("\n");
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}
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}
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}
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@ -0,0 +1,314 @@
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/* Target-dependent code for the SPARC 64 for GDB, the GNU debugger.
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Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
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Contributed by Doug Evans (dje@cygnus.com).
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||||
|
||||
This file is part of GDB.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
|
||||
|
||||
#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "obstack.h"
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#include "target.h"
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#include "ieee-float.h"
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/*#include "symfile.h" /* for objfiles.h */
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/*#include "objfiles.h" /* for find_pc_section */
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/* This file contains replacements and additions to sparc-tdep.c only.
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Some of this code has been written for a day when we can merge at least
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some of this with sparc-tdep.c. Macro TARGET_SPARC64 exists to allow some
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code to potentially be used by both. */
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#define TARGET_SPARC64 1 /* later make a config parm or some such */
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/* From infrun.c */
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extern int stop_after_trap;
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/* Branches with prediction are treated like their non-predicting cousins. */
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/* FIXME: What about floating point branches? */
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typedef enum
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{
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Error, not_branch, bicc, bicca, ba, baa, ticc, ta, done_retry
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} branch_type;
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/* Simulate single-step ptrace call for sun4. Code written by Gary
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Beihl (beihl@mcc.com). */
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/* npc4 and next_pc describe the situation at the time that the
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step-breakpoint was set, not necessary the current value of NPC_REGNUM. */
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static CORE_ADDR next_pc, npc4, target;
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static int brknpc4, brktrg;
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typedef char binsn_quantum[BREAKPOINT_MAX];
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static binsn_quantum break_mem[3];
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/* Non-zero if we just simulated a single-step ptrace call. This is
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needed because we cannot remove the breakpoints in the inferior
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process until after the `wait' in `wait_for_inferior'. Used for
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||||
sun4. */
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||||
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||||
int one_stepped;
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||||
/* sparc64_single_step() is called just before we want to resume the inferior,
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if we want to single-step it but there is no hardware or kernel single-step
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support (as on all SPARCs). We find all the possible targets of the
|
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coming instruction and breakpoint them.
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||||
single_step is also called just after the inferior stops. If we had
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set up a simulated single-step, we undo our damage. */
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||||
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||||
/* FIXME: When the code is releasable, sparc's single step could become this
|
||||
one, removing the duplication. */
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||||
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void
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sparc64_single_step (ignore)
|
||||
int ignore; /* pid, but we don't need it */
|
||||
{
|
||||
branch_type br, isbranch();
|
||||
CORE_ADDR pc;
|
||||
long pc_instruction;
|
||||
|
||||
if (!one_stepped)
|
||||
{
|
||||
/* Always set breakpoint for NPC. */
|
||||
next_pc = read_register (NPC_REGNUM);
|
||||
npc4 = next_pc + 4; /* branch not taken */
|
||||
|
||||
target_insert_breakpoint (next_pc, break_mem[0]);
|
||||
/* printf ("set break at %x\n",next_pc); */
|
||||
|
||||
pc = read_register (PC_REGNUM);
|
||||
pc_instruction = read_memory_integer (pc, sizeof(pc_instruction));
|
||||
br = isbranch (pc_instruction, pc, &target);
|
||||
brknpc4 = brktrg = 0;
|
||||
|
||||
if (br == bicca)
|
||||
{
|
||||
/* Conditional annulled branch will either end up at
|
||||
npc (if taken) or at npc+4 (if not taken).
|
||||
Trap npc+4. */
|
||||
brknpc4 = 1;
|
||||
target_insert_breakpoint (npc4, break_mem[1]);
|
||||
}
|
||||
else if ((br == baa && target != next_pc)
|
||||
|| (TARGET_SPARC64 && br == done_retry))
|
||||
{
|
||||
/* Unconditional annulled branch will always end up at
|
||||
the target. */
|
||||
brktrg = 1;
|
||||
target_insert_breakpoint (target, break_mem[2]);
|
||||
}
|
||||
|
||||
/* We are ready to let it go */
|
||||
one_stepped = 1;
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Remove breakpoints */
|
||||
target_remove_breakpoint (next_pc, break_mem[0]);
|
||||
|
||||
if (brknpc4)
|
||||
target_remove_breakpoint (npc4, break_mem[1]);
|
||||
|
||||
if (brktrg)
|
||||
target_remove_breakpoint (target, break_mem[2]);
|
||||
|
||||
one_stepped = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* FIXME: sparc64_frame_chain() is temporary. sparc_frame_chain() can
|
||||
be fixed to support both of us. */
|
||||
|
||||
#define FRAME_SAVED_L0 0 /* Byte offset from SP */
|
||||
#define FRAME_SAVED_I0 (8*REGISTER_RAW_SIZE (0)) /* Byte offset from SP */
|
||||
|
||||
CORE_ADDR
|
||||
sparc64_frame_chain (thisframe)
|
||||
FRAME thisframe;
|
||||
{
|
||||
REGISTER_TYPE retval;
|
||||
int err;
|
||||
CORE_ADDR addr;
|
||||
|
||||
addr = thisframe->frame + FRAME_SAVED_I0 +
|
||||
REGISTER_RAW_SIZE (0) * (FP_REGNUM - I0_REGNUM);
|
||||
err = target_read_memory (addr, (char *) &retval, sizeof (REGISTER_TYPE));
|
||||
if (err)
|
||||
return 0;
|
||||
SWAP_TARGET_AND_HOST (&retval, sizeof (retval));
|
||||
return retval;
|
||||
}
|
||||
|
||||
CORE_ADDR
|
||||
sparc64_extract_struct_value_address (regbuf)
|
||||
char regbuf[REGISTER_BYTES];
|
||||
{
|
||||
CORE_ADDR addr;
|
||||
|
||||
/* FIXME: We assume a non-leaf function. */
|
||||
addr = read_register (I0_REGNUM);
|
||||
return addr;
|
||||
}
|
||||
|
||||
/* Find the pc saved in frame FRAME. */
|
||||
/* FIXME: This function can be removed when sparc_frame_saved_pc
|
||||
handles us too. */
|
||||
|
||||
CORE_ADDR
|
||||
sparc64_frame_saved_pc (frame)
|
||||
FRAME frame;
|
||||
{
|
||||
int err;
|
||||
REGISTER_TYPE retval;
|
||||
CORE_ADDR addr,prev_pc;
|
||||
|
||||
if (get_current_frame () == frame) /* FIXME, debug check. Remove >=gdb-4.6 */
|
||||
{
|
||||
if (read_register (SP_REGNUM) != frame->bottom) abort();
|
||||
}
|
||||
|
||||
addr = frame->bottom + FRAME_SAVED_I0 +
|
||||
REGISTER_RAW_SIZE (0) * (I7_REGNUM - I0_REGNUM);
|
||||
err = target_read_memory (addr, (char *) &retval, sizeof (REGISTER_TYPE));
|
||||
if (err)
|
||||
return 0;
|
||||
SWAP_TARGET_AND_HOST (&retval, sizeof (retval));
|
||||
|
||||
/* CORE_ADDR isn't always the same size as REGISTER_TYPE, so convert. */
|
||||
|
||||
prev_pc = (CORE_ADDR) retval;
|
||||
return PC_ADJUST (prev_pc);
|
||||
}
|
||||
|
||||
/* Check instruction at ADDR to see if it is an annulled branch or other
|
||||
instruction whose npc isn't pc+4 (eg: trap, done, retry).
|
||||
All other instructions will go to NPC or will trap.
|
||||
Set *TARGET if we find a candidate branch; set to zero if not. */
|
||||
|
||||
branch_type
|
||||
isbranch (instruction, addr, target)
|
||||
long instruction;
|
||||
CORE_ADDR addr, *target;
|
||||
{
|
||||
branch_type val = not_branch;
|
||||
long int offset; /* Must be signed for sign-extend. */
|
||||
union
|
||||
{
|
||||
unsigned long int code;
|
||||
struct
|
||||
{
|
||||
unsigned int op:2;
|
||||
unsigned int a:1;
|
||||
unsigned int cond:4;
|
||||
unsigned int op2:3;
|
||||
unsigned int disp22:22;
|
||||
} b;
|
||||
struct
|
||||
{
|
||||
unsigned int op:2;
|
||||
unsigned int a:1;
|
||||
unsigned int cond:4;
|
||||
unsigned int op2:3;
|
||||
unsigned int cc:2;
|
||||
unsigned int p:1;
|
||||
unsigned int disp19:19;
|
||||
} bp;
|
||||
struct
|
||||
{
|
||||
unsigned int op:2;
|
||||
unsigned int a:1;
|
||||
unsigned int zero:1;
|
||||
unsigned int rcond:3;
|
||||
unsigned int op2:3;
|
||||
unsigned int disp16hi:2;
|
||||
unsigned int p:1;
|
||||
unsigned int rs1:5;
|
||||
unsigned int disp16lo:14;
|
||||
} bpr;
|
||||
struct
|
||||
{
|
||||
unsigned int op:2;
|
||||
unsigned int fcn:5;
|
||||
unsigned int op3:6;
|
||||
unsigned int reserved:19;
|
||||
} dr;
|
||||
} insn;
|
||||
|
||||
*target = 0;
|
||||
insn.code = instruction;
|
||||
|
||||
if (insn.b.op == 0
|
||||
&& (insn.b.op2 == 1 || insn.b.op2 == 2 || insn.b.op2 ==3
|
||||
|| insn.b.op2 == 5 || insn.b.op2 == 6))
|
||||
{
|
||||
if (insn.b.cond == 8)
|
||||
val = insn.b.a ? baa : ba;
|
||||
else
|
||||
val = insn.b.a ? bicca : bicc;
|
||||
switch (insn.b.op2)
|
||||
{
|
||||
case 1: /* bpcc */
|
||||
offset = 4 * ((int) (insn.bp.disp19 << 13) >> 13);
|
||||
break;
|
||||
case 2: /* bicc */
|
||||
offset = 4 * ((int) (insn.b.disp22 << 10) >> 10);
|
||||
break;
|
||||
case 3: /* bpr */
|
||||
offset = 4 * ((int) ((insn.bpr.disp16hi << 10)
|
||||
|| (insn.bpr.disp16lo << 18)) >> 13);
|
||||
break;
|
||||
case 5: /* fbpfcc */
|
||||
offset = 4 * ((int) (insn.bp.disp19 << 13) >> 13);
|
||||
break;
|
||||
case 6: /* fbfcc */
|
||||
offset = 4 * ((int) (insn.b.disp22 << 10) >> 10);
|
||||
break;
|
||||
}
|
||||
*target = addr + offset;
|
||||
}
|
||||
else if (insn.dr.op == 2 && insn.dr.op3 == 62)
|
||||
{
|
||||
if (insn.dr.fcn == 0)
|
||||
{
|
||||
/* done */
|
||||
*target = read_register (TNPC_REGNUM);
|
||||
val = done_retry;
|
||||
}
|
||||
else if (insn.dr.fcn == 1)
|
||||
{
|
||||
/* retry */
|
||||
*target = read_register (TPC_REGNUM);
|
||||
val = done_retry;
|
||||
}
|
||||
}
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
/* We try to support 32 bit and 64 bit pointers.
|
||||
We are called when the Shade target is selected by shadeif.c. */
|
||||
|
||||
int target_ptr_bit = 64; /* default */
|
||||
|
||||
void
|
||||
set_target_ptr_bit(ptr_bit)
|
||||
int ptr_bit;
|
||||
{
|
||||
target_ptr_bit = ptr_bit;
|
||||
}
|
||||
Loading…
Reference in New Issue