[AArch64] Rename +bitperm to +sve2-bitperm

After some discussion, we've decided to rename the +bitperm feature
flag to +sve2-bitperm, so that it's consistent with the other SVE2
feature flags.  The associated internal macros already used
"SVE2_BITPERM", so only the feature flag itself needs to change.

2019-07-19  Richard Sandiford  <richard.sandiford@arm.com>

gas/
	* doc/c-aarch64.texi: Remame the +bitperm extension to +sve2-bitperm.
	* config/tc-aarch64.c (aarch64_features): Likewise.
	* testsuite/gas/aarch64/illegal-sve2-aes.d: Update accordingly.
	* testsuite/gas/aarch64/illegal-sve2-sha3.d: Likewise.
	* testsuite/gas/aarch64/illegal-sve2-sm4.d: Likewise.
	* testsuite/gas/aarch64/illegal-sve2.d: Likewise.
	* testsuite/gas/aarch64/sve2.d: Likewise.
This commit is contained in:
Richard Sandiford 2019-07-19 12:18:02 +01:00
parent c213164ad2
commit ccbdd22fb9
8 changed files with 17 additions and 7 deletions

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@ -1,3 +1,13 @@
2019-07-19 Richard Sandiford <richard.sandiford@arm.com>
* doc/c-aarch64.texi: Remame the +bitperm extension to +sve2-bitperm.
* config/tc-aarch64.c (aarch64_features): Likewise.
* testsuite/gas/aarch64/illegal-sve2-aes.d: Update accordingly.
* testsuite/gas/aarch64/illegal-sve2-sha3.d: Likewise.
* testsuite/gas/aarch64/illegal-sve2-sm4.d: Likewise.
* testsuite/gas/aarch64/illegal-sve2.d: Likewise.
* testsuite/gas/aarch64/sve2.d: Likewise.
2019-07-19 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",

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@ -8963,7 +8963,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
{"sve2-sha3", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_SHA3, 0),
AARCH64_FEATURE (AARCH64_FEATURE_SVE2
| AARCH64_FEATURE_SHA3, 0)},
{"bitperm", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_BITPERM, 0),
{"sve2-bitperm", AARCH64_FEATURE (AARCH64_FEATURE_SVE2_BITPERM, 0),
AARCH64_FEATURE (AARCH64_FEATURE_SVE2, 0)},
{NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE},
};

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@ -198,7 +198,7 @@ automatically cause those extensions to be disabled.
@tab Enable Transactional Memory Extensions.
@item @code{sve2} @tab ARMv8-A @tab No
@tab Enable the SVE2 Extension.
@item @code{bitperm} @tab ARMv8-A @tab No
@item @code{sve2-bitperm} @tab ARMv8-A @tab No
@tab Enable SVE2 BITPERM Extension.
@item @code{sve2-sm4} @tab ARMv8-A @tab No
@tab Enable SVE2 SM4 Extension.

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@ -1,5 +1,5 @@
#name: Missing SVE2 AES argument
#as: -march=armv8-a+sve2+sve2-sm4+sve2-sha3+bitperm
#as: -march=armv8-a+sve2+sve2-sm4+sve2-sha3+sve2-bitperm
#source: sve2.s
#error: [^ :]+: Assembler messages:
#error: [^ :]+:[0-9]+: Error: selected processor does not support `aesd z17\.b,z17\.b,z21\.b'

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@ -1,5 +1,5 @@
#name: Missing SVE2 SHA3 argument
#as: -march=armv8-a+sve2+sve2-sm4+sve2-aes+bitperm
#as: -march=armv8-a+sve2+sve2-sm4+sve2-aes+sve2-bitperm
#source: sve2.s
#error: [^ :]+: Assembler messages:
#error: [^ :]+:[0-9]+: Error: selected processor does not support `rax1 z17\.d,z21\.d,z27\.d'

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@ -1,5 +1,5 @@
#name: Missing SVE2 SM4 argument
#as: -march=armv8-a+sve2+sve2-sha3+sve2-aes+bitperm
#as: -march=armv8-a+sve2+sve2-sha3+sve2-aes+sve2-bitperm
#source: sve2.s
#error: [^ :]+: Assembler messages:
#error: [^ :]+:[0-9]+: Error: selected processor does not support `sm4e z17\.s,z17\.s,z21\.s'

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@ -1,4 +1,4 @@
#name: Illegal SVE2
#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+bitperm
#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+sve2-bitperm
#source: illegal-sve2.s
#error_output: illegal-sve2.l

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@ -1,4 +1,4 @@
#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+bitperm
#as: -march=armv8-a+sve2+sve2-aes+sve2-sm4+sve2-sha3+sve2-bitperm
#objdump: -dr
[^:]+: file format .*