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binutils-gdb
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pentium updates

This commit is contained in:
Ken Raeburn 1995-10-06 01:43:38 +00:00
parent 4d2ba393c1
commit cd22144a90
2 changed files with 39 additions and 4 deletions
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19
include/opcode/ChangeLog
View File

@ -1,5 +1,24 @@
Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
* i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
and register cr4.
Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
* m68k.h: Change comment: split type P into types 0, 1 and 2.
Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
* sparc.h (sparc_{encode,decode}_prefetch): Declare.
Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
* sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
* m68kmri.h: Remove.
* m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
declarations. Remove F_ALIAS and flag field of struct
m68k_opcode. Change arch field of struct m68k_opcode to unsigned

24
include/opcode/i386.h
View File

@ -15,7 +15,7 @@ GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
static const template i386_optab[] = {
@ -101,6 +101,8 @@ static const template i386_optab[] = {
{"sahf", 0, 0x9e, _, NoModrm, { 0, 0, 0} },
{"pushf", 0, 0x9c, _, NoModrm|Data32, { 0, 0, 0} },
{"popf", 0, 0x9d, _, NoModrm|Data32, { 0, 0, 0} },
{"pushfl", 0, 0x9c, _, NoModrm|Data32, { 0, 0, 0} },
{"popfl", 0, 0x9d, _, NoModrm|Data32, { 0, 0, 0} },
{"pushfw", 0, 0x9c, _, NoModrm|Data16, { 0, 0, 0} },
{"popfw", 0, 0x9d, _, NoModrm|Data16, { 0, 0, 0} },
{"stc", 0, 0xf9, _, NoModrm, { 0, 0, 0} },
@ -280,8 +282,10 @@ static const template i386_optab[] = {
{"lret", 1, 0xca, _, NoModrm|Data32, { Imm16, 0, 0} },
{"lretw", 0, 0xcb, _, NoModrm|Data16, { 0, 0, 0} },
{"lretw", 1, 0xca, _, NoModrm|Data16, { Imm16, 0, 0} },
{"enter", 2, 0xc8, _, NoModrm, { Imm16, Imm8, 0} },
{"leave", 0, 0xc9, _, NoModrm, { 0, 0, 0} },
{"enter", 2, 0xc8, _, NoModrm|Data32, { Imm16, Imm8, 0} },
{"leave", 0, 0xc9, _, NoModrm|Data32, { 0, 0, 0} },
{"enterw", 2, 0xc8, _, NoModrm|Data16, { Imm16, Imm8, 0} },
{"leavew", 0, 0xc9, _, NoModrm|Data16, { 0, 0, 0} },
/* conditional jumps */
{"jo", 1, 0x70, _, Jump, { Disp, 0, 0} },
@ -444,7 +448,7 @@ static const template i386_optab[] = {
{"into", 0, 0xce, _, NoModrm, { 0, 0, 0} },
{"iret", 0, 0xcf, _, NoModrm|Data32, { 0, 0, 0} },
{"iretw", 0, 0xcf, _, NoModrm|Data16, { 0, 0, 0} },
/* i386sl (and i486sl?) only */
/* i386sl, i486sl, later 486, and Pentium */
{"rsm", 0, 0x0faa, _, NoModrm,{ 0, 0, 0} },
{"boundl", 2, 0x62, _, Modrm|Data32, { Reg32, Mem, 0} },
@ -744,6 +748,15 @@ static const template i386_optab[] = {
{"wbinvd", 0, 0x0f09, _, NoModrm, { 0, 0, 0} },
{"invlpg", 1, 0x0f01, 7, Modrm, { Mem, 0, 0} },
/* 586 and late 486 extensions */
{"cpuid", 0, 0x0fa2, _, NoModrm, { 0, 0, 0} },
/* Pentium extensions */
{"wrmsr", 0, 0x0f30, _, NoModrm, { 0, 0, 0} },
{"rdtsc", 0, 0x0f31, _, NoModrm, { 0, 0, 0} },
{"rdmsr", 0, 0x0f32, _, NoModrm, { 0, 0, 0} },
{"cmpxchg8b", 1, 0x0fc7, _, Modrm, { Mem, 0, 0} },
{"", 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */
};
#undef _
@ -769,9 +782,12 @@ static const reg_entry i386_regtab[] = {
{"ds", SReg2, 3}, {"fs", SReg3, 4}, {"gs", SReg3, 5},
/* control registers */
{"cr0", Control, 0}, {"cr2", Control, 2}, {"cr3", Control, 3},
{"cr4", Control, 4},
/* debug registers */
{"db0", Debug, 0}, {"db1", Debug, 1}, {"db2", Debug, 2},
{"db3", Debug, 3}, {"db6", Debug, 6}, {"db7", Debug, 7},
{"dr0", Debug, 0}, {"dr1", Debug, 1}, {"dr2", Debug, 2},
{"dr3", Debug, 3}, {"dr6", Debug, 6}, {"dr7", Debug, 7},
/* test registers */
{"tr6", Test, 6}, {"tr7", Test, 7},
/* float registers */