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This patch adds support for the SSBB and PSSBB speculation barrier instructions to the AArch64 assembler and disassembler. 

For more details see: https://static.docs.arm.com/ddi0596/a/DDI_0596_ARM_a64_instruction_set_architecture.pdf

opcodes	* aarch64-tbl.h (aarch64_opcode_table): Add entry for
	ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas	* testsuite/gas/aarch64/system.s: Add test for ssbb
	and pssbb.
	* testsuite/gas/aarch64/system.d: Update accordingly
	and remove explicit addresses.
This commit is contained in:
Nick Clifton 2018-07-12 15:46:17 +01:00
parent 45a28947f3
commit cde3679eb5
8 changed files with 1399 additions and 1370 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
gas/ChangeLog
View File

@ -1,3 +1,10 @@
2018-07-12 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/system.s: Add test for ssbb
and pssbb.
* testsuite/gas/aarch64/system.d: Update accordingly
and remove explicit addresses.
2018-07-11 Tamar Christina <tamar.christina@arm.com>
PR binutils/23192

728
gas/testsuite/gas/aarch64/system.d
View File

@ -5,366 +5,368 @@
Disassembly of section \.text:
0+ <.*>:
0: d6bf03e0 drps
4: d503201f nop
8: d503203f yield
c: d503205f wfe
10: d503207f wfi
14: d503209f sev
18: d50320bf sevl
1c: d503201f nop
20: d503203f yield
24: d503205f wfe
28: d503207f wfi
2c: d503209f sev
30: d50320bf sevl
34: d50320df hint #0x6
38: d50320ff (hint #0x7|xpaclri)
3c: d503211f (hint #0x8|pacia1716)
40: d503213f hint #0x9
44: d503215f (hint #0xa|pacib1716)
48: d503217f hint #0xb
4c: d503219f (hint #0xc|autia1716)
50: d50321bf hint #0xd
54: d50321df (hint #0xe|autib1716)
58: d50321ff hint #0xf
5c: d503221f (hint #0x10|esb)
60: d503223f (hint #0x11|psb csync)
64: d503225f hint #0x12
68: d503227f hint #0x13
6c: d503229f (hint #0x14|csdb)
70: d50322bf hint #0x15
74: d50322df hint #0x16
78: d50322ff hint #0x17
7c: d503231f (hint #0x18|paciaz)
80: d503233f (hint #0x19|paciasp)
84: d503235f (hint #0x1a|pacibz)
88: d503237f (hint #0x1b|pacibsp)
8c: d503239f (hint #0x1c|autiaz)
90: d50323bf (hint #0x1d|autiasp)
94: d50323df (hint #0x1e|autibz)
98: d50323ff (hint #0x1f|autibsp)
9c: d503241f hint #0x20
a0: d503243f hint #0x21
a4: d503245f hint #0x22
a8: d503247f hint #0x23
ac: d503249f hint #0x24
b0: d50324bf hint #0x25
b4: d50324df hint #0x26
b8: d50324ff hint #0x27
bc: d503251f hint #0x28
c0: d503253f hint #0x29
c4: d503255f hint #0x2a
c8: d503257f hint #0x2b
cc: d503259f hint #0x2c
d0: d50325bf hint #0x2d
d4: d50325df hint #0x2e
d8: d50325ff hint #0x2f
dc: d503261f hint #0x30
e0: d503263f hint #0x31
e4: d503265f hint #0x32
e8: d503267f hint #0x33
ec: d503269f hint #0x34
f0: d50326bf hint #0x35
f4: d50326df hint #0x36
f8: d50326ff hint #0x37
fc: d503271f hint #0x38
100: d503273f hint #0x39
104: d503275f hint #0x3a
108: d503277f hint #0x3b
10c: d503279f hint #0x3c
110: d50327bf hint #0x3d
114: d50327df hint #0x3e
118: d50327ff hint #0x3f
11c: d503281f hint #0x40
120: d503283f hint #0x41
124: d503285f hint #0x42
128: d503287f hint #0x43
12c: d503289f hint #0x44
130: d50328bf hint #0x45
134: d50328df hint #0x46
138: d50328ff hint #0x47
13c: d503291f hint #0x48
140: d503293f hint #0x49
144: d503295f hint #0x4a
148: d503297f hint #0x4b
14c: d503299f hint #0x4c
150: d50329bf hint #0x4d
154: d50329df hint #0x4e
158: d50329ff hint #0x4f
15c: d5032a1f hint #0x50
160: d5032a3f hint #0x51
164: d5032a5f hint #0x52
168: d5032a7f hint #0x53
16c: d5032a9f hint #0x54
170: d5032abf hint #0x55
174: d5032adf hint #0x56
178: d5032aff hint #0x57
17c: d5032b1f hint #0x58
180: d5032b3f hint #0x59
184: d5032b5f hint #0x5a
188: d5032b7f hint #0x5b
18c: d5032b9f hint #0x5c
190: d5032bbf hint #0x5d
194: d5032bdf hint #0x5e
198: d5032bff hint #0x5f
19c: d5032c1f hint #0x60
1a0: d5032c3f hint #0x61
1a4: d5032c5f hint #0x62
1a8: d5032c7f hint #0x63
1ac: d5032c9f hint #0x64
1b0: d5032cbf hint #0x65
1b4: d5032cdf hint #0x66
1b8: d5032cff hint #0x67
1bc: d5032d1f hint #0x68
1c0: d5032d3f hint #0x69
1c4: d5032d5f hint #0x6a
1c8: d5032d7f hint #0x6b
1cc: d5032d9f hint #0x6c
1d0: d5032dbf hint #0x6d
1d4: d5032ddf hint #0x6e
1d8: d5032dff hint #0x6f
1dc: d5032e1f hint #0x70
1e0: d5032e3f hint #0x71
1e4: d5032e5f hint #0x72
1e8: d5032e7f hint #0x73
1ec: d5032e9f hint #0x74
1f0: d5032ebf hint #0x75
1f4: d5032edf hint #0x76
1f8: d5032eff hint #0x77
1fc: d5032f1f hint #0x78
200: d5032f3f hint #0x79
204: d5032f5f hint #0x7a
208: d5032f7f hint #0x7b
20c: d5032f9f hint #0x7c
210: d5032fbf hint #0x7d
214: d5032fdf hint #0x7e
218: d5032fff hint #0x7f
21c: d52bf7e7 sysl x7, #3, C15, C7, #7
220: d503309f dsb #0x00
224: d503319f dsb oshld
228: d503329f dsb oshst
22c: d503339f dsb osh
230: d503349f dsb #0x04
234: d503359f dsb nshld
238: d503369f dsb nshst
23c: d503379f dsb nsh
240: d503389f dsb #0x08
244: d503399f dsb ishld
248: d5033a9f dsb ishst
24c: d5033b9f dsb ish
250: d5033c9f dsb #0x0c
254: d5033d9f dsb ld
258: d5033e9f dsb st
25c: d5033f9f dsb sy
260: d50330bf dmb #0x00
264: d50331bf dmb oshld
268: d50332bf dmb oshst
26c: d50333bf dmb osh
270: d50334bf dmb #0x04
274: d50335bf dmb nshld
278: d50336bf dmb nshst
27c: d50337bf dmb nsh
280: d50338bf dmb #0x08
284: d50339bf dmb ishld
288: d5033abf dmb ishst
28c: d5033bbf dmb ish
290: d5033cbf dmb #0x0c
294: d5033dbf dmb ld
298: d5033ebf dmb st
29c: d5033fbf dmb sy
2a0: d50330df isb #0x0
2a4: d50331df isb #0x1
2a8: d50332df isb #0x2
2ac: d50333df isb #0x3
2b0: d50334df isb #0x4
2b4: d50335df isb #0x5
2b8: d50336df isb #0x6
2bc: d50337df isb #0x7
2c0: d50338df isb #0x8
2c4: d50339df isb #0x9
2c8: d5033adf isb #0xa
2cc: d5033bdf isb #0xb
2d0: d5033cdf isb #0xc
2d4: d5033ddf isb #0xd
2d8: d5033edf isb #0xe
2dc: d5033fdf isb
2e0: d5033fdf isb
2e4: d8000000 prfm pldl1keep, 0 <LABEL1>
2e4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
2e8: f8af6be0 prfm pldl1keep, \[sp, x15\]
2ec: f8be58e0 prfm pldl1keep, \[x7, w30, uxtw #3\]
2f0: f9800c60 prfm pldl1keep, \[x3, #24\]
2f4: d8000001 prfm pldl1strm, 0 <LABEL1>
2f4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
2f8: f8af6be1 prfm pldl1strm, \[sp, x15\]
2fc: f8be58e1 prfm pldl1strm, \[x7, w30, uxtw #3\]
300: f9800c61 prfm pldl1strm, \[x3, #24\]
304: d8000002 prfm pldl2keep, 0 <LABEL1>
304: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
308: f8af6be2 prfm pldl2keep, \[sp, x15\]
30c: f8be58e2 prfm pldl2keep, \[x7, w30, uxtw #3\]
310: f9800c62 prfm pldl2keep, \[x3, #24\]
314: d8000003 prfm pldl2strm, 0 <LABEL1>
314: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
318: f8af6be3 prfm pldl2strm, \[sp, x15\]
31c: f8be58e3 prfm pldl2strm, \[x7, w30, uxtw #3\]
320: f9800c63 prfm pldl2strm, \[x3, #24\]
324: d8000004 prfm pldl3keep, 0 <LABEL1>
324: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
328: f8af6be4 prfm pldl3keep, \[sp, x15\]
32c: f8be58e4 prfm pldl3keep, \[x7, w30, uxtw #3\]
330: f9800c64 prfm pldl3keep, \[x3, #24\]
334: d8000005 prfm pldl3strm, 0 <LABEL1>
334: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
338: f8af6be5 prfm pldl3strm, \[sp, x15\]
33c: f8be58e5 prfm pldl3strm, \[x7, w30, uxtw #3\]
340: f9800c65 prfm pldl3strm, \[x3, #24\]
344: d8000006 prfm #0x06, 0 <LABEL1>
344: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
348: f8af6be6 prfm #0x06, \[sp, x15\]
34c: f8be58e6 prfm #0x06, \[x7, w30, uxtw #3\]
350: f9800c66 prfm #0x06, \[x3, #24\]
354: d8000007 prfm #0x07, 0 <LABEL1>
354: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
358: f8af6be7 prfm #0x07, \[sp, x15\]
35c: f8be58e7 prfm #0x07, \[x7, w30, uxtw #3\]
360: f9800c67 prfm #0x07, \[x3, #24\]
364: d8000008 prfm plil1keep, 0 <LABEL1>
364: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
368: f8af6be8 prfm plil1keep, \[sp, x15\]
36c: f8be58e8 prfm plil1keep, \[x7, w30, uxtw #3\]
370: f9800c68 prfm plil1keep, \[x3, #24\]
374: d8000009 prfm plil1strm, 0 <LABEL1>
374: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
378: f8af6be9 prfm plil1strm, \[sp, x15\]
37c: f8be58e9 prfm plil1strm, \[x7, w30, uxtw #3\]
380: f9800c69 prfm plil1strm, \[x3, #24\]
384: d800000a prfm plil2keep, 0 <LABEL1>
384: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
388: f8af6bea prfm plil2keep, \[sp, x15\]
38c: f8be58ea prfm plil2keep, \[x7, w30, uxtw #3\]
390: f9800c6a prfm plil2keep, \[x3, #24\]
394: d800000b prfm plil2strm, 0 <LABEL1>
394: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
398: f8af6beb prfm plil2strm, \[sp, x15\]
39c: f8be58eb prfm plil2strm, \[x7, w30, uxtw #3\]
3a0: f9800c6b prfm plil2strm, \[x3, #24\]
3a4: d800000c prfm plil3keep, 0 <LABEL1>
3a4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
3a8: f8af6bec prfm plil3keep, \[sp, x15\]
3ac: f8be58ec prfm plil3keep, \[x7, w30, uxtw #3\]
3b0: f9800c6c prfm plil3keep, \[x3, #24\]
3b4: d800000d prfm plil3strm, 0 <LABEL1>
3b4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
3b8: f8af6bed prfm plil3strm, \[sp, x15\]
3bc: f8be58ed prfm plil3strm, \[x7, w30, uxtw #3\]
3c0: f9800c6d prfm plil3strm, \[x3, #24\]
3c4: d800000e prfm #0x0e, 0 <LABEL1>
3c4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
3c8: f8af6bee prfm #0x0e, \[sp, x15\]
3cc: f8be58ee prfm #0x0e, \[x7, w30, uxtw #3\]
3d0: f9800c6e prfm #0x0e, \[x3, #24\]
3d4: d800000f prfm #0x0f, 0 <LABEL1>
3d4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
3d8: f8af6bef prfm #0x0f, \[sp, x15\]
3dc: f8be58ef prfm #0x0f, \[x7, w30, uxtw #3\]
3e0: f9800c6f prfm #0x0f, \[x3, #24\]
3e4: d8000010 prfm pstl1keep, 0 <LABEL1>
3e4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
3e8: f8af6bf0 prfm pstl1keep, \[sp, x15\]
3ec: f8be58f0 prfm pstl1keep, \[x7, w30, uxtw #3\]
3f0: f9800c70 prfm pstl1keep, \[x3, #24\]
3f4: d8000011 prfm pstl1strm, 0 <LABEL1>
3f4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
3f8: f8af6bf1 prfm pstl1strm, \[sp, x15\]
3fc: f8be58f1 prfm pstl1strm, \[x7, w30, uxtw #3\]
400: f9800c71 prfm pstl1strm, \[x3, #24\]
404: d8000012 prfm pstl2keep, 0 <LABEL1>
404: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
408: f8af6bf2 prfm pstl2keep, \[sp, x15\]
40c: f8be58f2 prfm pstl2keep, \[x7, w30, uxtw #3\]
410: f9800c72 prfm pstl2keep, \[x3, #24\]
414: d8000013 prfm pstl2strm, 0 <LABEL1>
414: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
418: f8af6bf3 prfm pstl2strm, \[sp, x15\]
41c: f8be58f3 prfm pstl2strm, \[x7, w30, uxtw #3\]
420: f9800c73 prfm pstl2strm, \[x3, #24\]
424: d8000014 prfm pstl3keep, 0 <LABEL1>
424: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
428: f8af6bf4 prfm pstl3keep, \[sp, x15\]
42c: f8be58f4 prfm pstl3keep, \[x7, w30, uxtw #3\]
430: f9800c74 prfm pstl3keep, \[x3, #24\]
434: d8000015 prfm pstl3strm, 0 <LABEL1>
434: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
438: f8af6bf5 prfm pstl3strm, \[sp, x15\]
43c: f8be58f5 prfm pstl3strm, \[x7, w30, uxtw #3\]
440: f9800c75 prfm pstl3strm, \[x3, #24\]
444: d8000016 prfm #0x16, 0 <LABEL1>
444: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
448: f8af6bf6 prfm #0x16, \[sp, x15\]
44c: f8be58f6 prfm #0x16, \[x7, w30, uxtw #3\]
450: f9800c76 prfm #0x16, \[x3, #24\]
454: d8000017 prfm #0x17, 0 <LABEL1>
454: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
458: f8af6bf7 prfm #0x17, \[sp, x15\]
45c: f8be58f7 prfm #0x17, \[x7, w30, uxtw #3\]
460: f9800c77 prfm #0x17, \[x3, #24\]
464: d8000018 prfm #0x18, 0 <LABEL1>
464: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
468: f8af6bf8 prfm #0x18, \[sp, x15\]
46c: f8be58f8 prfm #0x18, \[x7, w30, uxtw #3\]
470: f9800c78 prfm #0x18, \[x3, #24\]
474: d8000019 prfm #0x19, 0 <LABEL1>
474: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
478: f8af6bf9 prfm #0x19, \[sp, x15\]
47c: f8be58f9 prfm #0x19, \[x7, w30, uxtw #3\]
480: f9800c79 prfm #0x19, \[x3, #24\]
484: d800001a prfm #0x1a, 0 <LABEL1>
484: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
488: f8af6bfa prfm #0x1a, \[sp, x15\]
48c: f8be58fa prfm #0x1a, \[x7, w30, uxtw #3\]
490: f9800c7a prfm #0x1a, \[x3, #24\]
494: d800001b prfm #0x1b, 0 <LABEL1>
494: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
498: f8af6bfb prfm #0x1b, \[sp, x15\]
49c: f8be58fb prfm #0x1b, \[x7, w30, uxtw #3\]
4a0: f9800c7b prfm #0x1b, \[x3, #24\]
4a4: d800001c prfm #0x1c, 0 <LABEL1>
4a4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
4a8: f8af6bfc prfm #0x1c, \[sp, x15\]
4ac: f8be58fc prfm #0x1c, \[x7, w30, uxtw #3\]
4b0: f9800c7c prfm #0x1c, \[x3, #24\]
4b4: d800001d prfm #0x1d, 0 <LABEL1>
4b4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
4b8: f8af6bfd prfm #0x1d, \[sp, x15\]
4bc: f8be58fd prfm #0x1d, \[x7, w30, uxtw #3\]
4c0: f9800c7d prfm #0x1d, \[x3, #24\]
4c4: d800001e prfm #0x1e, 0 <LABEL1>
4c4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
4c8: f8af6bfe prfm #0x1e, \[sp, x15\]
4cc: f8be58fe prfm #0x1e, \[x7, w30, uxtw #3\]
4d0: f9800c7e prfm #0x1e, \[x3, #24\]
4d4: d800001f prfm #0x1f, 0 <LABEL1>
4d4: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
4d8: f8af6bff prfm #0x1f, \[sp, x15\]
4dc: f8be58ff prfm #0x1f, \[x7, w30, uxtw #3\]
4e0: f9800c7f prfm #0x1f, \[x3, #24\]
4e4: f9800c60 prfm pldl1keep, \[x3, #24\]
4e8: f9800c61 prfm pldl1strm, \[x3, #24\]
4ec: f9800c62 prfm pldl2keep, \[x3, #24\]
4f0: f9800c63 prfm pldl2strm, \[x3, #24\]
4f4: f9800c64 prfm pldl3keep, \[x3, #24\]
4f8: f9800c65 prfm pldl3strm, \[x3, #24\]
4fc: f9800c68 prfm plil1keep, \[x3, #24\]
500: f9800c69 prfm plil1strm, \[x3, #24\]
504: f9800c6a prfm plil2keep, \[x3, #24\]
508: f9800c6b prfm plil2strm, \[x3, #24\]
50c: f9800c6c prfm plil3keep, \[x3, #24\]
510: f9800c6d prfm plil3strm, \[x3, #24\]
514: f9800c70 prfm pstl1keep, \[x3, #24\]
518: f9800c71 prfm pstl1strm, \[x3, #24\]
51c: f9800c72 prfm pstl2keep, \[x3, #24\]
520: f9800c73 prfm pstl2strm, \[x3, #24\]
524: f9800c74 prfm pstl3keep, \[x3, #24\]
528: f9800c75 prfm pstl3strm, \[x3, #24\]
.*: d6bf03e0 drps
.*: d503201f nop
.*: d503203f yield
.*: d503205f wfe
.*: d503207f wfi
.*: d503209f sev
.*: d50320bf sevl
.*: d503201f nop
.*: d503203f yield
.*: d503205f wfe
.*: d503207f wfi
.*: d503209f sev
.*: d50320bf sevl
.*: d50320df hint #0x6
.*: d50320ff (hint #0x7|xpaclri)
.*: d503211f (hint #0x8|pacia1716)
.*: d503213f hint #0x9
.*: d503215f (hint #0xa|pacib1716)
.*: d503217f hint #0xb
.*: d503219f (hint #0xc|autia1716)
.*: d50321bf hint #0xd
.*: d50321df (hint #0xe|autib1716)
.*: d50321ff hint #0xf
.*: d503221f (hint #0x10|esb)
.*: d503223f (hint #0x11|psb csync)
.*: d503225f hint #0x12
.*: d503227f hint #0x13
.*: d503229f (hint #0x14|csdb)
.*: d50322bf hint #0x15
.*: d50322df hint #0x16
.*: d50322ff hint #0x17
.*: d503231f (hint #0x18|paciaz)
.*: d503233f (hint #0x19|paciasp)
.*: d503235f (hint #0x1a|pacibz)
.*: d503237f (hint #0x1b|pacibsp)
.*: d503239f (hint #0x1c|autiaz)
.*: d50323bf (hint #0x1d|autiasp)
.*: d50323df (hint #0x1e|autibz)
.*: d50323ff (hint #0x1f|autibsp)
.*: d503241f hint #0x20
.*: d503243f hint #0x21
.*: d503245f hint #0x22
.*: d503247f hint #0x23
.*: d503249f hint #0x24
.*: d50324bf hint #0x25
.*: d50324df hint #0x26
.*: d50324ff hint #0x27
.*: d503251f hint #0x28
.*: d503253f hint #0x29
.*: d503255f hint #0x2a
.*: d503257f hint #0x2b
.*: d503259f hint #0x2c
.*: d50325bf hint #0x2d
.*: d50325df hint #0x2e
.*: d50325ff hint #0x2f
.*: d503261f hint #0x30
.*: d503263f hint #0x31
.*: d503265f hint #0x32
.*: d503267f hint #0x33
.*: d503269f hint #0x34
.*: d50326bf hint #0x35
.*: d50326df hint #0x36
.*: d50326ff hint #0x37
.*: d503271f hint #0x38
.*: d503273f hint #0x39
.*: d503275f hint #0x3a
.*: d503277f hint #0x3b
.*: d503279f hint #0x3c
.*: d50327bf hint #0x3d
.*: d50327df hint #0x3e
.*: d50327ff hint #0x3f
.*: d503281f hint #0x40
.*: d503283f hint #0x41
.*: d503285f hint #0x42
.*: d503287f hint #0x43
.*: d503289f hint #0x44
.*: d50328bf hint #0x45
.*: d50328df hint #0x46
.*: d50328ff hint #0x47
.*: d503291f hint #0x48
.*: d503293f hint #0x49
.*: d503295f hint #0x4a
.*: d503297f hint #0x4b
.*: d503299f hint #0x4c
.*: d50329bf hint #0x4d
.*: d50329df hint #0x4e
.*: d50329ff hint #0x4f
.*: d5032a1f hint #0x50
.*: d5032a3f hint #0x51
.*: d5032a5f hint #0x52
.*: d5032a7f hint #0x53
.*: d5032a9f hint #0x54
.*: d5032abf hint #0x55
.*: d5032adf hint #0x56
.*: d5032aff hint #0x57
.*: d5032b1f hint #0x58
.*: d5032b3f hint #0x59
.*: d5032b5f hint #0x5a
.*: d5032b7f hint #0x5b
.*: d5032b9f hint #0x5c
.*: d5032bbf hint #0x5d
.*: d5032bdf hint #0x5e
.*: d5032bff hint #0x5f
.*: d5032c1f hint #0x60
.*: d5032c3f hint #0x61
.*: d5032c5f hint #0x62
.*: d5032c7f hint #0x63
.*: d5032c9f hint #0x64
.*: d5032cbf hint #0x65
.*: d5032cdf hint #0x66
.*: d5032cff hint #0x67
.*: d5032d1f hint #0x68
.*: d5032d3f hint #0x69
.*: d5032d5f hint #0x6a
.*: d5032d7f hint #0x6b
.*: d5032d9f hint #0x6c
.*: d5032dbf hint #0x6d
.*: d5032ddf hint #0x6e
.*: d5032dff hint #0x6f
.*: d5032e1f hint #0x70
.*: d5032e3f hint #0x71
.*: d5032e5f hint #0x72
.*: d5032e7f hint #0x73
.*: d5032e9f hint #0x74
.*: d5032ebf hint #0x75
.*: d5032edf hint #0x76
.*: d5032eff hint #0x77
.*: d5032f1f hint #0x78
.*: d5032f3f hint #0x79
.*: d5032f5f hint #0x7a
.*: d5032f7f hint #0x7b
.*: d5032f9f hint #0x7c
.*: d5032fbf hint #0x7d
.*: d5032fdf hint #0x7e
.*: d5032fff hint #0x7f
.*: d52bf7e7 sysl x7, #3, C15, C7, #7
.*: d503309f ssbb
.*: d503319f dsb oshld
.*: d503329f dsb oshst
.*: d503339f dsb osh
.*: d503349f pssbb
.*: d503359f dsb nshld
.*: d503369f dsb nshst
.*: d503379f dsb nsh
.*: d503389f dsb #0x08
.*: d503399f dsb ishld
.*: d5033a9f dsb ishst
.*: d5033b9f dsb ish
.*: d5033c9f dsb #0x0c
.*: d5033d9f dsb ld
.*: d5033e9f dsb st
.*: d5033f9f dsb sy
.*: d50330bf dmb #0x00
.*: d50331bf dmb oshld
.*: d50332bf dmb oshst
.*: d50333bf dmb osh
.*: d50334bf dmb #0x04
.*: d50335bf dmb nshld
.*: d50336bf dmb nshst
.*: d50337bf dmb nsh
.*: d50338bf dmb #0x08
.*: d50339bf dmb ishld
.*: d5033abf dmb ishst
.*: d5033bbf dmb ish
.*: d5033cbf dmb #0x0c
.*: d5033dbf dmb ld
.*: d5033ebf dmb st
.*: d5033fbf dmb sy
.*: d50330df isb #0x0
.*: d50331df isb #0x1
.*: d50332df isb #0x2
.*: d50333df isb #0x3
.*: d50334df isb #0x4
.*: d50335df isb #0x5
.*: d50336df isb #0x6
.*: d50337df isb #0x7
.*: d50338df isb #0x8
.*: d50339df isb #0x9
.*: d5033adf isb #0xa
.*: d5033bdf isb #0xb
.*: d5033cdf isb #0xc
.*: d5033ddf isb #0xd
.*: d5033edf isb #0xe
.*: d5033fdf isb
.*: d5033fdf isb
.*: d503309f ssbb
.*: d503349f pssbb
.*: d8000000 prfm pldl1keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be0 prfm pldl1keep, \[sp, x15\]
.*: f8be58e0 prfm pldl1keep, \[x7, w30, uxtw #3\]
.*: f9800c60 prfm pldl1keep, \[x3, #24\]
.*: d8000001 prfm pldl1strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be1 prfm pldl1strm, \[sp, x15\]
.*: f8be58e1 prfm pldl1strm, \[x7, w30, uxtw #3\]
.*: f9800c61 prfm pldl1strm, \[x3, #24\]
.*: d8000002 prfm pldl2keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be2 prfm pldl2keep, \[sp, x15\]
.*: f8be58e2 prfm pldl2keep, \[x7, w30, uxtw #3\]
.*: f9800c62 prfm pldl2keep, \[x3, #24\]
.*: d8000003 prfm pldl2strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be3 prfm pldl2strm, \[sp, x15\]
.*: f8be58e3 prfm pldl2strm, \[x7, w30, uxtw #3\]
.*: f9800c63 prfm pldl2strm, \[x3, #24\]
.*: d8000004 prfm pldl3keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be4 prfm pldl3keep, \[sp, x15\]
.*: f8be58e4 prfm pldl3keep, \[x7, w30, uxtw #3\]
.*: f9800c64 prfm pldl3keep, \[x3, #24\]
.*: d8000005 prfm pldl3strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be5 prfm pldl3strm, \[sp, x15\]
.*: f8be58e5 prfm pldl3strm, \[x7, w30, uxtw #3\]
.*: f9800c65 prfm pldl3strm, \[x3, #24\]
.*: d8000006 prfm #0x06, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be6 prfm #0x06, \[sp, x15\]
.*: f8be58e6 prfm #0x06, \[x7, w30, uxtw #3\]
.*: f9800c66 prfm #0x06, \[x3, #24\]
.*: d8000007 prfm #0x07, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be7 prfm #0x07, \[sp, x15\]
.*: f8be58e7 prfm #0x07, \[x7, w30, uxtw #3\]
.*: f9800c67 prfm #0x07, \[x3, #24\]
.*: d8000008 prfm plil1keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be8 prfm plil1keep, \[sp, x15\]
.*: f8be58e8 prfm plil1keep, \[x7, w30, uxtw #3\]
.*: f9800c68 prfm plil1keep, \[x3, #24\]
.*: d8000009 prfm plil1strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6be9 prfm plil1strm, \[sp, x15\]
.*: f8be58e9 prfm plil1strm, \[x7, w30, uxtw #3\]
.*: f9800c69 prfm plil1strm, \[x3, #24\]
.*: d800000a prfm plil2keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bea prfm plil2keep, \[sp, x15\]
.*: f8be58ea prfm plil2keep, \[x7, w30, uxtw #3\]
.*: f9800c6a prfm plil2keep, \[x3, #24\]
.*: d800000b prfm plil2strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6beb prfm plil2strm, \[sp, x15\]
.*: f8be58eb prfm plil2strm, \[x7, w30, uxtw #3\]
.*: f9800c6b prfm plil2strm, \[x3, #24\]
.*: d800000c prfm plil3keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bec prfm plil3keep, \[sp, x15\]
.*: f8be58ec prfm plil3keep, \[x7, w30, uxtw #3\]
.*: f9800c6c prfm plil3keep, \[x3, #24\]
.*: d800000d prfm plil3strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bed prfm plil3strm, \[sp, x15\]
.*: f8be58ed prfm plil3strm, \[x7, w30, uxtw #3\]
.*: f9800c6d prfm plil3strm, \[x3, #24\]
.*: d800000e prfm #0x0e, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bee prfm #0x0e, \[sp, x15\]
.*: f8be58ee prfm #0x0e, \[x7, w30, uxtw #3\]
.*: f9800c6e prfm #0x0e, \[x3, #24\]
.*: d800000f prfm #0x0f, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bef prfm #0x0f, \[sp, x15\]
.*: f8be58ef prfm #0x0f, \[x7, w30, uxtw #3\]
.*: f9800c6f prfm #0x0f, \[x3, #24\]
.*: d8000010 prfm pstl1keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf0 prfm pstl1keep, \[sp, x15\]
.*: f8be58f0 prfm pstl1keep, \[x7, w30, uxtw #3\]
.*: f9800c70 prfm pstl1keep, \[x3, #24\]
.*: d8000011 prfm pstl1strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf1 prfm pstl1strm, \[sp, x15\]
.*: f8be58f1 prfm pstl1strm, \[x7, w30, uxtw #3\]
.*: f9800c71 prfm pstl1strm, \[x3, #24\]
.*: d8000012 prfm pstl2keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf2 prfm pstl2keep, \[sp, x15\]
.*: f8be58f2 prfm pstl2keep, \[x7, w30, uxtw #3\]
.*: f9800c72 prfm pstl2keep, \[x3, #24\]
.*: d8000013 prfm pstl2strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf3 prfm pstl2strm, \[sp, x15\]
.*: f8be58f3 prfm pstl2strm, \[x7, w30, uxtw #3\]
.*: f9800c73 prfm pstl2strm, \[x3, #24\]
.*: d8000014 prfm pstl3keep, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf4 prfm pstl3keep, \[sp, x15\]
.*: f8be58f4 prfm pstl3keep, \[x7, w30, uxtw #3\]
.*: f9800c74 prfm pstl3keep, \[x3, #24\]
.*: d8000015 prfm pstl3strm, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf5 prfm pstl3strm, \[sp, x15\]
.*: f8be58f5 prfm pstl3strm, \[x7, w30, uxtw #3\]
.*: f9800c75 prfm pstl3strm, \[x3, #24\]
.*: d8000016 prfm #0x16, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf6 prfm #0x16, \[sp, x15\]
.*: f8be58f6 prfm #0x16, \[x7, w30, uxtw #3\]
.*: f9800c76 prfm #0x16, \[x3, #24\]
.*: d8000017 prfm #0x17, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf7 prfm #0x17, \[sp, x15\]
.*: f8be58f7 prfm #0x17, \[x7, w30, uxtw #3\]
.*: f9800c77 prfm #0x17, \[x3, #24\]
.*: d8000018 prfm #0x18, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf8 prfm #0x18, \[sp, x15\]
.*: f8be58f8 prfm #0x18, \[x7, w30, uxtw #3\]
.*: f9800c78 prfm #0x18, \[x3, #24\]
.*: d8000019 prfm #0x19, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bf9 prfm #0x19, \[sp, x15\]
.*: f8be58f9 prfm #0x19, \[x7, w30, uxtw #3\]
.*: f9800c79 prfm #0x19, \[x3, #24\]
.*: d800001a prfm #0x1a, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bfa prfm #0x1a, \[sp, x15\]
.*: f8be58fa prfm #0x1a, \[x7, w30, uxtw #3\]
.*: f9800c7a prfm #0x1a, \[x3, #24\]
.*: d800001b prfm #0x1b, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bfb prfm #0x1b, \[sp, x15\]
.*: f8be58fb prfm #0x1b, \[x7, w30, uxtw #3\]
.*: f9800c7b prfm #0x1b, \[x3, #24\]
.*: d800001c prfm #0x1c, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bfc prfm #0x1c, \[sp, x15\]
.*: f8be58fc prfm #0x1c, \[x7, w30, uxtw #3\]
.*: f9800c7c prfm #0x1c, \[x3, #24\]
.*: d800001d prfm #0x1d, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bfd prfm #0x1d, \[sp, x15\]
.*: f8be58fd prfm #0x1d, \[x7, w30, uxtw #3\]
.*: f9800c7d prfm #0x1d, \[x3, #24\]
.*: d800001e prfm #0x1e, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bfe prfm #0x1e, \[sp, x15\]
.*: f8be58fe prfm #0x1e, \[x7, w30, uxtw #3\]
.*: f9800c7e prfm #0x1e, \[x3, #24\]
.*: d800001f prfm #0x1f, 0 <LABEL1>
.*: R_AARCH64_(P32_|)LD_PREL_LO19 LABEL1
.*: f8af6bff prfm #0x1f, \[sp, x15\]
.*: f8be58ff prfm #0x1f, \[x7, w30, uxtw #3\]
.*: f9800c7f prfm #0x1f, \[x3, #24\]
.*: f9800c60 prfm pldl1keep, \[x3, #24\]
.*: f9800c61 prfm pldl1strm, \[x3, #24\]
.*: f9800c62 prfm pldl2keep, \[x3, #24\]
.*: f9800c63 prfm pldl2strm, \[x3, #24\]
.*: f9800c64 prfm pldl3keep, \[x3, #24\]
.*: f9800c65 prfm pldl3strm, \[x3, #24\]
.*: f9800c68 prfm plil1keep, \[x3, #24\]
.*: f9800c69 prfm plil1strm, \[x3, #24\]
.*: f9800c6a prfm plil2keep, \[x3, #24\]
.*: f9800c6b prfm plil2strm, \[x3, #24\]
.*: f9800c6c prfm plil3keep, \[x3, #24\]
.*: f9800c6d prfm plil3strm, \[x3, #24\]
.*: f9800c70 prfm pstl1keep, \[x3, #24\]
.*: f9800c71 prfm pstl1strm, \[x3, #24\]
.*: f9800c72 prfm pstl2keep, \[x3, #24\]
.*: f9800c73 prfm pstl2strm, \[x3, #24\]
.*: f9800c74 prfm pstl3keep, \[x3, #24\]
.*: f9800c75 prfm pstl3strm, \[x3, #24\]

2
gas/testsuite/gas/aarch64/system.s
View File

@ -44,6 +44,8 @@
all_barriers op=isb, from=0, to=15
isb
ssbb
pssbb
//
// PREFETCHS

8
opcodes/ChangeLog
View File

@ -1,3 +1,11 @@
2018-07-12 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Add entry for
ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
2018-07-12 Tamar Christina <tamar.christina@arm.com>
PR binutils/23192

193
opcodes/aarch64-asm-2.c
View File

@ -422,14 +422,14 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1152: /* movz */
value = 1152; /* --> movz. */
break;
case 1192: /* autibsp */
case 1191: /* autibz */
case 1190: /* autiasp */
case 1189: /* autiaz */
case 1188: /* pacibsp */
case 1187: /* pacibz */
case 1186: /* paciasp */
case 1185: /* paciaz */
case 1194: /* autibsp */
case 1193: /* autibz */
case 1192: /* autiasp */
case 1191: /* autiaz */
case 1190: /* pacibsp */
case 1189: /* pacibz */
case 1188: /* paciasp */
case 1187: /* paciaz */
case 1172: /* psb */
case 1171: /* esb */
case 1170: /* autib1716 */
@ -447,131 +447,136 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1158: /* hint */
value = 1158; /* --> hint. */
break;
case 1181: /* tlbi */
case 1180: /* ic */
case 1179: /* dc */
case 1178: /* at */
case 1177: /* sys */
value = 1177; /* --> sys. */
case 1176: /* pssbb */
case 1175: /* ssbb */
case 1174: /* dsb */
value = 1174; /* --> dsb. */
break;
case 1990: /* bic */
case 1240: /* and */
value = 1240; /* --> and. */
case 1183: /* tlbi */
case 1182: /* ic */
case 1181: /* dc */
case 1180: /* at */
case 1179: /* sys */
value = 1179; /* --> sys. */
break;
case 1223: /* mov */
case 1992: /* bic */
case 1242: /* and */
value = 1242; /* --> and. */
break;
case 1227: /* movs */
case 1243: /* ands */
value = 1243; /* --> ands. */
case 1225: /* mov */
case 1244: /* and */
value = 1244; /* --> and. */
break;
case 1991: /* cmple */
case 1278: /* cmpge */
value = 1278; /* --> cmpge. */
case 1229: /* movs */
case 1245: /* ands */
value = 1245; /* --> ands. */
break;
case 1994: /* cmplt */
case 1281: /* cmpgt */
value = 1281; /* --> cmpgt. */
case 1993: /* cmple */
case 1280: /* cmpge */
value = 1280; /* --> cmpge. */
break;
case 1992: /* cmplo */
case 1283: /* cmphi */
value = 1283; /* --> cmphi. */
case 1996: /* cmplt */
case 1283: /* cmpgt */
value = 1283; /* --> cmpgt. */
break;
case 1993: /* cmpls */
case 1286: /* cmphs */
value = 1286; /* --> cmphs. */
case 1994: /* cmplo */
case 1285: /* cmphi */
value = 1285; /* --> cmphi. */
break;
case 1220: /* mov */
case 1308: /* cpy */
value = 1308; /* --> cpy. */
case 1995: /* cmpls */
case 1288: /* cmphs */
value = 1288; /* --> cmphs. */
break;
case 1222: /* mov */
case 1309: /* cpy */
value = 1309; /* --> cpy. */
break;
case 2001: /* fmov */
case 1225: /* mov */
case 1310: /* cpy */
value = 1310; /* --> cpy. */
break;
case 1215: /* mov */
case 1322: /* dup */
value = 1322; /* --> dup. */
case 1224: /* mov */
case 1311: /* cpy */
value = 1311; /* --> cpy. */
break;
case 2003: /* fmov */
case 1227: /* mov */
case 1312: /* cpy */
value = 1312; /* --> cpy. */
break;
case 1217: /* mov */
case 1214: /* mov */
case 1323: /* dup */
value = 1323; /* --> dup. */
break;
case 2000: /* fmov */
case 1219: /* mov */
case 1324: /* dup */
value = 1324; /* --> dup. */
break;
case 1218: /* mov */
case 1325: /* dupm */
value = 1325; /* --> dupm. */
case 1219: /* mov */
case 1216: /* mov */
case 1325: /* dup */
value = 1325; /* --> dup. */
break;
case 1995: /* eon */
case 1327: /* eor */
value = 1327; /* --> eor. */
case 2002: /* fmov */
case 1221: /* mov */
case 1326: /* dup */
value = 1326; /* --> dup. */
break;
case 1228: /* not */
case 1220: /* mov */
case 1327: /* dupm */
value = 1327; /* --> dupm. */
break;
case 1997: /* eon */
case 1329: /* eor */
value = 1329; /* --> eor. */
break;
case 1229: /* nots */
case 1330: /* eors */
value = 1330; /* --> eors. */
case 1230: /* not */
case 1331: /* eor */
value = 1331; /* --> eor. */
break;
case 1996: /* facle */
case 1335: /* facge */
value = 1335; /* --> facge. */
case 1231: /* nots */
case 1332: /* eors */
value = 1332; /* --> eors. */
break;
case 1997: /* faclt */
case 1336: /* facgt */
value = 1336; /* --> facgt. */
case 1998: /* facle */
case 1337: /* facge */
value = 1337; /* --> facge. */
break;
case 1998: /* fcmle */
case 1349: /* fcmge */
value = 1349; /* --> fcmge. */
case 1999: /* faclt */
case 1338: /* facgt */
value = 1338; /* --> facgt. */
break;
case 1999: /* fcmlt */
case 1351: /* fcmgt */
value = 1351; /* --> fcmgt. */
case 2000: /* fcmle */
case 1351: /* fcmge */
value = 1351; /* --> fcmge. */
break;
case 1212: /* fmov */
case 1357: /* fcpy */
value = 1357; /* --> fcpy. */
case 2001: /* fcmlt */
case 1353: /* fcmgt */
value = 1353; /* --> fcmgt. */
break;
case 1211: /* fmov */
case 1380: /* fdup */
value = 1380; /* --> fdup. */
case 1214: /* fmov */
case 1359: /* fcpy */
value = 1359; /* --> fcpy. */
break;
case 1213: /* mov */
case 1711: /* orr */
value = 1711; /* --> orr. */
case 1213: /* fmov */
case 1382: /* fdup */
value = 1382; /* --> fdup. */
break;
case 2002: /* orn */
case 1712: /* orr */
value = 1712; /* --> orr. */
case 1215: /* mov */
case 1713: /* orr */
value = 1713; /* --> orr. */
break;
case 1216: /* mov */
case 2004: /* orn */
case 1714: /* orr */
value = 1714; /* --> orr. */
break;
case 1226: /* movs */
case 1715: /* orrs */
value = 1715; /* --> orrs. */
case 1218: /* mov */
case 1716: /* orr */
value = 1716; /* --> orr. */
break;
case 1221: /* mov */
case 1777: /* sel */
value = 1777; /* --> sel. */
case 1228: /* movs */
case 1717: /* orrs */
value = 1717; /* --> orrs. */
break;
case 1224: /* mov */
case 1778: /* sel */
value = 1778; /* --> sel. */
case 1223: /* mov */
case 1779: /* sel */
value = 1779; /* --> sel. */
break;
case 1226: /* mov */
case 1780: /* sel */
value = 1780; /* --> sel. */
break;
default: return NULL;
}

1809
opcodes/aarch64-dis-2.c
View File

File diff suppressed because it is too large Load Diff

18
opcodes/aarch64-opc-2.c
View File

@ -294,17 +294,17 @@ static const unsigned op_enum_table [] =
385,
407,
409,
1216,
1221,
1214,
1213,
1217,
1224,
1226,
1227,
1218,
1223,
1229,
1216,
1215,
1219,
1226,
1228,
1229,
1225,
1231,
1230,
129,
};

4
opcodes/aarch64-tbl.h
View File

@ -3483,7 +3483,9 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"esb", 0xd503221f, 0xffffffff, ic_system, 0, RAS, OP0 (), {}, F_ALIAS, 0, NULL},
{"psb", 0xd503223f, 0xffffffff, ic_system, 0, STAT_PROFILE, OP1 (BARRIER_PSB), {}, F_ALIAS, 0, NULL},
CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, 0),
CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
CORE_INSN ("ssbb", 0xd503309f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
CORE_INSN ("pssbb", 0xd503349f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
CORE_INSN ("dmb", 0xd50330bf, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, 0),
CORE_INSN ("isb", 0xd50330df, 0xfffff0ff, ic_system, 0, OP1 (BARRIER_ISB), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
CORE_INSN ("sys", 0xd5080000, 0xfff80000, ic_system, 0, OP5 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt), QL_SYS, F_HAS_ALIAS | F_OPD4_OPT | F_DEFAULT (0x1F)),