2004-04-29 Andrew Cagney <cagney@redhat.com>
* mips-tdep.c (struct gdbarch_tdep): Delete mips_fp_register_double. (FP_REGISTER_DOUBLE): Delete macro, replace with test for mips_abi_regsize. (mips_gdbarch_init): Do not set mips_fp_register_double. (mips_dump_tdep): Do not print FP_REGISTER_DOUBLE.
This commit is contained in:
parent
43c41783a8
commit
ceae6e75ad
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@ -1,3 +1,12 @@
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2004-04-29 Andrew Cagney <cagney@redhat.com>
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* mips-tdep.c (struct gdbarch_tdep): Delete
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mips_fp_register_double.
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(FP_REGISTER_DOUBLE): Delete macro, replace with test for
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mips_abi_regsize.
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(mips_gdbarch_init): Do not set mips_fp_register_double.
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(mips_dump_tdep): Do not print FP_REGISTER_DOUBLE.
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2004-04-29 Joel Brobecker <brobecker@gnat.com>
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2004-04-29 Joel Brobecker <brobecker@gnat.com>
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Committed by Andrew Cagney.
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Committed by Andrew Cagney.
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@ -107,8 +107,7 @@ static const char *size_enums[] = {
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};
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};
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/* Some MIPS boards don't support floating point while others only
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/* Some MIPS boards don't support floating point while others only
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support single-precision floating-point operations. See also
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support single-precision floating-point operations. */
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FP_REGISTER_DOUBLE. */
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enum mips_fpu_type
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enum mips_fpu_type
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{
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{
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@ -137,7 +136,6 @@ struct gdbarch_tdep
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enum mips_fpu_type mips_fpu_type;
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enum mips_fpu_type mips_fpu_type;
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int mips_last_arg_regnum;
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int mips_last_arg_regnum;
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int mips_last_fp_arg_regnum;
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int mips_last_fp_arg_regnum;
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int mips_fp_register_double;
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int default_mask_address_p;
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int default_mask_address_p;
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/* Is the target using 64-bit raw integer registers but only
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/* Is the target using 64-bit raw integer registers but only
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storing a left-aligned 32-bit value in each? */
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storing a left-aligned 32-bit value in each? */
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@ -375,11 +373,6 @@ mips2_fp_compat (void)
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return 0;
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return 0;
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}
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}
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/* Indicate that the ABI makes use of double-precision registers
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provided by the FPU (rather than combining pairs of registers to
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form double-precision values). See also MIPS_FPU_TYPE. */
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#define FP_REGISTER_DOUBLE (gdbarch_tdep (current_gdbarch)->mips_fp_register_double)
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/* The amount of space reserved on the stack for registers. This is
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/* The amount of space reserved on the stack for registers. This is
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different to MIPS_ABI_REGSIZE as it determines the alignment of
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different to MIPS_ABI_REGSIZE as it determines the alignment of
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data allocated after the registers have run out. */
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data allocated after the registers have run out. */
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@ -2646,10 +2639,10 @@ return_value_location (struct type *valtype,
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&& ((MIPS_FPU_TYPE == MIPS_FPU_DOUBLE && (len == 4 || len == 8))
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&& ((MIPS_FPU_TYPE == MIPS_FPU_DOUBLE && (len == 4 || len == 8))
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|| (MIPS_FPU_TYPE == MIPS_FPU_SINGLE && len == 4)))
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|| (MIPS_FPU_TYPE == MIPS_FPU_SINGLE && len == 4)))
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{
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{
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if (!FP_REGISTER_DOUBLE && len == 8)
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if (mips_abi_regsize (current_gdbarch) < 8 && len == 8)
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{
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{
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/* We need to break a 64bit float in two 32 bit halves and
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/* We need to break a 64bit float in two 32 bit halves and
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spread them across a floating-point register pair. */
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spread them across a floating-point register pair. */
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lo->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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lo->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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hi->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 0 : 4;
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hi->buf_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 0 : 4;
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lo->reg_offset = ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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lo->reg_offset = ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
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@ -2857,7 +2850,8 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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up before the check to see if there are any FP registers
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up before the check to see if there are any FP registers
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left. Non MIPS_EABI targets also pass the FP in the integer
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left. Non MIPS_EABI targets also pass the FP in the integer
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registers so also round up normal registers. */
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registers so also round up normal registers. */
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if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
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if (mips_abi_regsize (gdbarch) < 8
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&& fp_register_arg_p (typecode, arg_type))
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{
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{
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if ((float_argreg & 1))
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if ((float_argreg & 1))
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float_argreg++;
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float_argreg++;
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@ -2878,7 +2872,7 @@ mips_eabi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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if (fp_register_arg_p (typecode, arg_type)
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if (fp_register_arg_p (typecode, arg_type)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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{
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{
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if (!FP_REGISTER_DOUBLE && len == 8)
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if (mips_abi_regsize (gdbarch) < 8 && len == 8)
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{
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{
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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unsigned long regval;
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unsigned long regval;
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@ -3496,7 +3490,8 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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up before the check to see if there are any FP registers
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up before the check to see if there are any FP registers
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left. O32/O64 targets also pass the FP in the integer
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left. O32/O64 targets also pass the FP in the integer
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registers so also round up normal registers. */
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registers so also round up normal registers. */
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if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
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if (mips_abi_regsize (gdbarch) < 8
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&& fp_register_arg_p (typecode, arg_type))
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{
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{
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if ((float_argreg & 1))
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if ((float_argreg & 1))
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float_argreg++;
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float_argreg++;
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@ -3515,7 +3510,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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if (fp_register_arg_p (typecode, arg_type)
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if (fp_register_arg_p (typecode, arg_type)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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{
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{
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if (!FP_REGISTER_DOUBLE && len == 8)
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if (mips_abi_regsize (gdbarch) < 8 && len == 8)
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{
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{
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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unsigned long regval;
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unsigned long regval;
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@ -3562,7 +3557,7 @@ mips_o32_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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argreg, phex (regval, len));
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write_register (argreg, regval);
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write_register (argreg, regval);
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argreg += FP_REGISTER_DOUBLE ? 1 : 2;
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argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
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}
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}
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/* Reserve space for the FP register. */
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/* Reserve space for the FP register. */
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stack_offset += align_up (len, mips_stack_argsize (gdbarch));
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stack_offset += align_up (len, mips_stack_argsize (gdbarch));
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@ -3948,7 +3943,8 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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up before the check to see if there are any FP registers
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up before the check to see if there are any FP registers
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left. O32/O64 targets also pass the FP in the integer
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left. O32/O64 targets also pass the FP in the integer
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registers so also round up normal registers. */
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registers so also round up normal registers. */
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if (!FP_REGISTER_DOUBLE && fp_register_arg_p (typecode, arg_type))
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if (mips_abi_regsize (gdbarch) < 8
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&& fp_register_arg_p (typecode, arg_type))
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{
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{
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if ((float_argreg & 1))
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if ((float_argreg & 1))
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float_argreg++;
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float_argreg++;
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@ -3967,7 +3963,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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if (fp_register_arg_p (typecode, arg_type)
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if (fp_register_arg_p (typecode, arg_type)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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&& float_argreg <= MIPS_LAST_FP_ARG_REGNUM)
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{
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{
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if (!FP_REGISTER_DOUBLE && len == 8)
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if (mips_abi_regsize (gdbarch) < 8 && len == 8)
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{
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{
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
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unsigned long regval;
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unsigned long regval;
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@ -4014,7 +4010,7 @@ mips_o64_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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fprintf_unfiltered (gdb_stdlog, " - reg=%d val=%s",
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argreg, phex (regval, len));
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argreg, phex (regval, len));
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write_register (argreg, regval);
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write_register (argreg, regval);
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argreg += FP_REGISTER_DOUBLE ? 1 : 2;
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argreg += (mips_abi_regsize (gdbarch) == 8) ? 1 : 2;
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}
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}
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/* Reserve space for the FP register. */
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/* Reserve space for the FP register. */
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stack_offset += align_up (len, mips_stack_argsize (gdbarch));
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stack_offset += align_up (len, mips_stack_argsize (gdbarch));
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@ -5626,7 +5622,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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case MIPS_ABI_O32:
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case MIPS_ABI_O32:
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set_gdbarch_push_dummy_call (gdbarch, mips_o32_push_dummy_call);
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set_gdbarch_push_dummy_call (gdbarch, mips_o32_push_dummy_call);
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set_gdbarch_return_value (gdbarch, mips_o32_return_value);
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set_gdbarch_return_value (gdbarch, mips_o32_return_value);
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tdep->mips_fp_register_double = 0;
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tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
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tdep->default_mask_address_p = 0;
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tdep->default_mask_address_p = 0;
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@ -5640,7 +5635,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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mips_o64_store_return_value);
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mips_o64_store_return_value);
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set_gdbarch_deprecated_extract_return_value (gdbarch,
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set_gdbarch_deprecated_extract_return_value (gdbarch,
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mips_o64_extract_return_value);
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mips_o64_extract_return_value);
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tdep->mips_fp_register_double = 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 4 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 4 - 1;
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tdep->default_mask_address_p = 0;
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tdep->default_mask_address_p = 0;
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@ -5656,7 +5650,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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mips_eabi_store_return_value);
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mips_eabi_store_return_value);
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set_gdbarch_deprecated_extract_return_value (gdbarch,
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set_gdbarch_deprecated_extract_return_value (gdbarch,
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mips_eabi_extract_return_value);
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mips_eabi_extract_return_value);
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tdep->mips_fp_register_double = 0;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->default_mask_address_p = 0;
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tdep->default_mask_address_p = 0;
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@ -5674,7 +5667,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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mips_eabi_store_return_value);
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mips_eabi_store_return_value);
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set_gdbarch_deprecated_extract_return_value (gdbarch,
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set_gdbarch_deprecated_extract_return_value (gdbarch,
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mips_eabi_extract_return_value);
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mips_eabi_extract_return_value);
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tdep->mips_fp_register_double = 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->default_mask_address_p = 0;
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tdep->default_mask_address_p = 0;
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@ -5689,7 +5681,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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case MIPS_ABI_N32:
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case MIPS_ABI_N32:
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set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
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set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
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set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
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set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
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tdep->mips_fp_register_double = 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->default_mask_address_p = 0;
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tdep->default_mask_address_p = 0;
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@ -5700,7 +5691,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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case MIPS_ABI_N64:
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case MIPS_ABI_N64:
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set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
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set_gdbarch_push_dummy_call (gdbarch, mips_n32n64_push_dummy_call);
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set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
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set_gdbarch_return_value (gdbarch, mips_n32n64_return_value);
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tdep->mips_fp_register_double = 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_arg_regnum = A0_REGNUM + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->mips_last_fp_arg_regnum = tdep->regnum->fp0 + 12 + 8 - 1;
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tdep->default_mask_address_p = 0;
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tdep->default_mask_address_p = 0;
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@ -5904,9 +5894,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
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mips_mask_address_p (tdep),
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mips_mask_address_p (tdep),
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tdep->default_mask_address_p);
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tdep->default_mask_address_p);
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}
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}
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fprintf_unfiltered (file,
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"mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n",
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FP_REGISTER_DOUBLE);
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fprintf_unfiltered (file,
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fprintf_unfiltered (file,
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"mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n",
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"mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n",
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MIPS_DEFAULT_FPU_TYPE,
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MIPS_DEFAULT_FPU_TYPE,
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@ -5922,9 +5909,6 @@ mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
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: MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? "single"
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: MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? "single"
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: MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? "double"
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: MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? "double"
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: "???"));
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: "???"));
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fprintf_unfiltered (file,
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"mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n",
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FP_REGISTER_DOUBLE);
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fprintf_unfiltered (file,
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fprintf_unfiltered (file,
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"mips_dump_tdep: mips_stack_argsize() = %d\n",
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"mips_dump_tdep: mips_stack_argsize() = %d\n",
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mips_stack_argsize (current_gdbarch));
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mips_stack_argsize (current_gdbarch));
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