2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
* tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3 byte opcode.
This commit is contained in:
parent
8b40d5948e
commit
cf557b5176
|
@ -1,3 +1,8 @@
|
|||
2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3
|
||||
byte opcode.
|
||||
|
||||
2007-09-08 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* config/tc-i386.c (cpu_flags_check_x64): Renamed to ...
|
||||
|
|
|
@ -4578,11 +4578,11 @@ output_insn (void)
|
|||
/* All opcodes on i386 have either 1 or 2 bytes. SSSE3 and
|
||||
SSE4 instructions have 3 bytes. We may use one more higher
|
||||
byte to specify a prefix the instruction requires. Exclude
|
||||
instructions which are in both SSE4 and ABM. */
|
||||
opc_3b = ((i.tm.cpu_flags.bitfield.cpussse3
|
||||
|| i.tm.cpu_flags.bitfield.cpusse4_1
|
||||
|| i.tm.cpu_flags.bitfield.cpusse4_2)
|
||||
&& !i.tm.cpu_flags.bitfield.cpuabm);
|
||||
instructions which are in both SSE4.2 and ABM. */
|
||||
opc_3b = (i.tm.cpu_flags.bitfield.cpussse3
|
||||
|| i.tm.cpu_flags.bitfield.cpusse4_1
|
||||
|| (i.tm.cpu_flags.bitfield.cpusse4_2
|
||||
&& !i.tm.cpu_flags.bitfield.cpuabm));
|
||||
if (opc_3b)
|
||||
{
|
||||
if (i.tm.base_opcode & 0xff000000)
|
||||
|
|
Loading…
Reference in New Issue