* arm-tdep.c (arm_analyze_prologue): Do not abort parsing when

encountering a load via a non-SP register.
This commit is contained in:
Ulrich Weigand 2011-03-21 17:28:04 +00:00
parent 4a2fbb504b
commit d19f7eee06
2 changed files with 14 additions and 17 deletions

View File

@ -1,3 +1,8 @@
2011-03-21 Ulrich Weigand <ulrich.weigand@linaro.org>
* arm-tdep.c (arm_analyze_prologue): Do not abort parsing when
encountering a load via a non-SP register.
2011-03-21 Ulrich Weigand <uweigand@de.ibm.com>
* tramp-frame.c (tramp_frame_prepend_unwinder): Set stop_reason

View File

@ -1856,23 +1856,15 @@ arm_analyze_prologue (struct gdbarch *gdbarch,
else if (arm_instruction_changes_pc (insn))
/* Don't scan past anything that might change control flow. */
break;
else if ((insn & 0xfe500000) == 0xe8100000) /* ldm */
{
/* Ignore block loads from the stack, potentially copying
parameters from memory. */
if (pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM))
continue;
else
break;
}
else if ((insn & 0xfc500000) == 0xe4100000)
{
/* Similarly ignore single loads from the stack. */
if (pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM))
continue;
else
break;
}
else if ((insn & 0xfe500000) == 0xe8100000 /* ldm */
&& pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM))
/* Ignore block loads from the stack, potentially copying
parameters from memory. */
continue;
else if ((insn & 0xfc500000) == 0xe4100000
&& pv_is_register (regs[bits (insn, 16, 19)], ARM_SP_REGNUM))
/* Similarly ignore single loads from the stack. */
continue;
else if ((insn & 0xffff0ff0) == 0xe1a00000)
/* MOV Rd, Rm. Skip register copies, i.e. saves to another
register instead of the stack. */