gas: sparc: fix relaxation of CALL instruction into branches in a.out targets
This patch avoids CALL instructions to be optimized into branches if the symbols referred to in the CALL instruction are not fully resolved at the time the assembler writes its output. Tested in sparc64-linux-gnu and sparc-sun-sunos4.1.3 targets. No regressions. gas/ChangeLog: 2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com> PR gas/21407 * config/tc-sparc.c (md_apply_fix): Do not transform `call' instructions into branch instructions in fixups generating additional relocations. * testsuite/gas/sparc/call-relax.s: New file. * testsuite/gas/sparc/call-relax.d: Likewise. * testsuite/gas/sparc/call-relax-aout.d: Likewise. * testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout.
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2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com>
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PR gas/21407
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* config/tc-sparc.c (md_apply_fix): Do not transform `call'
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instructions into branch instructions in fixups generating
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additional relocations.
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* testsuite/gas/sparc/call-relax.s: New file.
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* testsuite/gas/sparc/call-relax.d: Likewise.
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* testsuite/gas/sparc/call-relax-aout.d: Likewise.
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* testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout.
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2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS.
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@ -3584,8 +3584,13 @@ md_apply_fix (fixS *fixP, valueT *valP, segT segment ATTRIBUTE_UNUSED)
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insn |= val & 0x3fffffff;
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/* See if we have a delay slot. */
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if (sparc_relax && fixP->fx_where + 8 <= fixP->fx_frag->fr_fix)
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/* See if we have a delay slot. In that case we attempt to
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optimize several cases transforming CALL instructions
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into branches. But we can only do that if the relocation
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can be completely resolved here, i.e. if no undefined
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symbol is associated with it. */
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if (sparc_relax && fixP->fx_addsy == NULL
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&& fixP->fx_where + 8 <= fixP->fx_frag->fr_fix)
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{
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#define G0 0
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#define O7 15
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@ -0,0 +1,19 @@
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#as: -Av9 -relax
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#source: call-relax.s
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#objdump: -dr
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#name: sparc relax CALL (a.out)
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.*: +file format .*a\.out.*
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Disassembly of section .text:
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0+ <foo>:
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0: 31 00 00 00 sethi %hi\(0\), %i0
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4: 10 80 00 02 b c <bar>
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8: 91 ee 20 00 restore %i0, 0, %o0
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0+c <bar>:
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c: 31 00 00 00 sethi %hi\(0\), %i0
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10: 40 00 00 00 call 10 <bar\+0x4>
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10: WDISP30 _undefined-0x10
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14: 91 ee 20 00 restore %i0, 0, %o0
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@ -0,0 +1,18 @@
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#as: -Av9 -relax
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#objdump: -dr
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#name: sparc relax CALL
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.*: +file format .*sparc.*
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Disassembly of section .text:
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0+ <foo>:
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0: 31 00 00 00 sethi %hi\(0\), %i0
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4: 10 68 00 02 b %xcc, c <bar>
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8: 91 ee 20 00 restore %i0, 0, %o0
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0+c <bar>:
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c: 31 00 00 00 sethi %hi\(0\), %i0
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10: 40 00 00 00 call 10 <bar\+0x4>
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10: R_SPARC_WDISP30 _undefined
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14: 91 ee 20 00 restore %i0, 0, %o0
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@ -0,0 +1,10 @@
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# Test relaxation of CALL instructions into branches.
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.text
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foo:
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sethi %hi(0), %i0
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call bar, 0
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restore %i0, %lo(0), %o0
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bar:
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sethi %hi(0), %i0
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call _undefined, 0
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restore %i0, %lo(0), %o0
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@ -72,6 +72,10 @@ if [istarget sparc*-*-*] {
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run_dump_test "v9branch1"
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run_dump_test "imm-plus-rreg"
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run_dump_test "dcti-couples-v9"
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run_dump_test "call-relax"
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} else {
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# The next tests are a.out only.
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run_dump_test "call-relax-aout"
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}
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if [gas_64_check] {
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