common/
* cgen-accfp.c (fextsfdf): New arg how. All callers updated. (ftruncdfsf, floatsisf, flostsidf, ufloatsisf, fixsfsi, fixdfsi, ufixsfsi): Ditto. * cgen-fpu.h (CGEN_FPCONV_KIND): New enum. (struct cgen_fp_ops): Update signatures of floating point conversion operations. frv/ * sem.c: Regenerate. sh64/ * cpu.h: Regenerate.
This commit is contained in:
Doug Evans
parent
3fa5b97b27
commit
d2c7a1a63b
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@ -1,5 +1,12 @@
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2010-01-24 Doug Evans <dje@sebabeach.org>
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* cgen-accfp.c (fextsfdf): New arg how. All callers updated.
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(ftruncdfsf, floatsisf, flostsidf, ufloatsisf, fixsfsi, fixdfsi,
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ufixsfsi): Ditto.
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* cgen-fpu.h (CGEN_FPCONV_KIND): New enum.
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(struct cgen_fp_ops): Update signatures of floating point conversion
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operations.
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* Make-common.in (CGEN_SIM_DEPS): Define.
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(CGEN_INCLUDE_DEPS): Use it.
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(CGEN_MAIN_CPU_DEPS): Simplify.
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@ -285,7 +285,7 @@ gesf (CGEN_FPU* fpu, SF x, SF y)
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}
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static DF
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fextsfdf (CGEN_FPU* fpu, SF x)
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fextsfdf (CGEN_FPU* fpu, int how UNUSED, SF x)
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{
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sim_fpu op1;
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unsigned64 res;
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@ -297,7 +297,7 @@ fextsfdf (CGEN_FPU* fpu, SF x)
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}
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static SF
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ftruncdfsf (CGEN_FPU* fpu, DF x)
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ftruncdfsf (CGEN_FPU* fpu, int how UNUSED, DF x)
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{
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sim_fpu op1;
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unsigned32 res;
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@ -309,7 +309,7 @@ ftruncdfsf (CGEN_FPU* fpu, DF x)
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}
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static SF
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floatsisf (CGEN_FPU* fpu, SI x)
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floatsisf (CGEN_FPU* fpu, int how UNUSED, SI x)
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{
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sim_fpu ans;
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unsigned32 res;
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@ -320,7 +320,7 @@ floatsisf (CGEN_FPU* fpu, SI x)
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}
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static DF
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floatsidf (CGEN_FPU* fpu, SI x)
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floatsidf (CGEN_FPU* fpu, int how UNUSED, SI x)
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{
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sim_fpu ans;
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unsigned64 res;
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@ -331,7 +331,7 @@ floatsidf (CGEN_FPU* fpu, SI x)
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}
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static SF
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ufloatsisf (CGEN_FPU* fpu, USI x)
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ufloatsisf (CGEN_FPU* fpu, int how UNUSED, USI x)
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{
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sim_fpu ans;
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unsigned32 res;
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@ -342,7 +342,7 @@ ufloatsisf (CGEN_FPU* fpu, USI x)
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}
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static SI
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fixsfsi (CGEN_FPU* fpu, SF x)
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fixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x)
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{
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sim_fpu op1;
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unsigned32 res;
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@ -353,7 +353,7 @@ fixsfsi (CGEN_FPU* fpu, SF x)
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}
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static SI
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fixdfsi (CGEN_FPU* fpu, DF x)
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fixdfsi (CGEN_FPU* fpu, int how UNUSED, DF x)
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{
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sim_fpu op1;
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unsigned32 res;
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@ -364,7 +364,7 @@ fixdfsi (CGEN_FPU* fpu, DF x)
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}
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static USI
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ufixsfsi (CGEN_FPU* fpu, SF x)
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ufixsfsi (CGEN_FPU* fpu, int how UNUSED, SF x)
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{
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sim_fpu op1;
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unsigned32 res;
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@ -1,5 +1,6 @@
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/* CGEN fpu support
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Copyright (C) 1999 Cygnus Solutions. */
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Copyright (C) 1999 Cygnus Solutions.
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Copyright (C) 2010 Doug Evans. */
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#ifndef CGEN_FPU_H
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#define CGEN_FPU_H
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@ -18,6 +19,18 @@ typedef struct { SI parts[4]; } TF;
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#define TARGET_EXT_FP_WORDS 4
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#endif
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/* Supported floating point conversion kinds (rounding modes).
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FIXME: The IEEE rounding modes need to be implemented. */
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typedef enum {
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FPCONV_DEFAULT = 0,
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FPCONV_TIES_TO_EVEN = 1,
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FPCONV_TIES_TO_AWAY = 2,
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FPCONV_TOWARD_ZERO = 3,
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FPCONV_TOWARD_POSITIVE = 4,
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FPCONV_TOWARD_NEGATIVE = 5
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} CGEN_FPCONV_KIND;
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/* forward decl */
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typedef struct cgen_fp_ops CGEN_FP_OPS;
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@ -100,28 +113,28 @@ struct cgen_fp_ops {
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/* SF/DF conversion ops */
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DF (*fextsfdf) (CGEN_FPU*, SF);
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SF (*ftruncdfsf) (CGEN_FPU*, DF);
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DF (*fextsfdf) (CGEN_FPU*, int, SF);
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SF (*ftruncdfsf) (CGEN_FPU*, int, DF);
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SF (*floatsisf) (CGEN_FPU*, SI);
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SF (*floatdisf) (CGEN_FPU*, DI);
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SF (*ufloatsisf) (CGEN_FPU*, USI);
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SF (*ufloatdisf) (CGEN_FPU*, UDI);
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SF (*floatsisf) (CGEN_FPU*, int, SI);
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SF (*floatdisf) (CGEN_FPU*, int, DI);
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SF (*ufloatsisf) (CGEN_FPU*, int, USI);
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SF (*ufloatdisf) (CGEN_FPU*, int, UDI);
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SI (*fixsfsi) (CGEN_FPU*, SF);
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DI (*fixsfdi) (CGEN_FPU*, SF);
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USI (*ufixsfsi) (CGEN_FPU*, SF);
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UDI (*ufixsfdi) (CGEN_FPU*, SF);
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SI (*fixsfsi) (CGEN_FPU*, int, SF);
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DI (*fixsfdi) (CGEN_FPU*, int, SF);
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USI (*ufixsfsi) (CGEN_FPU*, int, SF);
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UDI (*ufixsfdi) (CGEN_FPU*, int, SF);
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DF (*floatsidf) (CGEN_FPU*, SI);
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DF (*floatdidf) (CGEN_FPU*, DI);
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DF (*ufloatsidf) (CGEN_FPU*, USI);
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DF (*ufloatdidf) (CGEN_FPU*, UDI);
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DF (*floatsidf) (CGEN_FPU*, int, SI);
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DF (*floatdidf) (CGEN_FPU*, int, DI);
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DF (*ufloatsidf) (CGEN_FPU*, int, USI);
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DF (*ufloatdidf) (CGEN_FPU*, int, UDI);
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SI (*fixdfsi) (CGEN_FPU*, DF);
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DI (*fixdfdi) (CGEN_FPU*, DF);
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USI (*ufixdfsi) (CGEN_FPU*, DF);
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UDI (*ufixdfdi) (CGEN_FPU*, DF);
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SI (*fixdfsi) (CGEN_FPU*, int, DF);
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DI (*fixdfdi) (CGEN_FPU*, int, DF);
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USI (*ufixdfsi) (CGEN_FPU*, int, DF);
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UDI (*ufixdfdi) (CGEN_FPU*, int, DF);
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/* XF mode support (kept separate 'cus not always present) */
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@ -146,20 +159,20 @@ struct cgen_fp_ops {
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int (*gtxf) (CGEN_FPU*, XF, XF);
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int (*gexf) (CGEN_FPU*, XF, XF);
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XF (*extsfxf) (CGEN_FPU*, SF);
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XF (*extdfxf) (CGEN_FPU*, DF);
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SF (*truncxfsf) (CGEN_FPU*, XF);
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DF (*truncxfdf) (CGEN_FPU*, XF);
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XF (*extsfxf) (CGEN_FPU*, int, SF);
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XF (*extdfxf) (CGEN_FPU*, int, DF);
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SF (*truncxfsf) (CGEN_FPU*, int, XF);
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DF (*truncxfdf) (CGEN_FPU*, int, XF);
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XF (*floatsixf) (CGEN_FPU*, SI);
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XF (*floatdixf) (CGEN_FPU*, DI);
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XF (*ufloatsixf) (CGEN_FPU*, USI);
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XF (*ufloatdixf) (CGEN_FPU*, UDI);
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XF (*floatsixf) (CGEN_FPU*, int, SI);
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XF (*floatdixf) (CGEN_FPU*, int, DI);
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XF (*ufloatsixf) (CGEN_FPU*, int, USI);
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XF (*ufloatdixf) (CGEN_FPU*, int, UDI);
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SI (*fixxfsi) (CGEN_FPU*, XF);
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DI (*fixxfdi) (CGEN_FPU*, XF);
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USI (*ufixxfsi) (CGEN_FPU*, XF);
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UDI (*ufixxfdi) (CGEN_FPU*, XF);
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SI (*fixxfsi) (CGEN_FPU*, int, XF);
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DI (*fixxfdi) (CGEN_FPU*, int, XF);
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USI (*ufixxfsi) (CGEN_FPU*, int, XF);
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UDI (*ufixxfdi) (CGEN_FPU*, int, XF);
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/* TF mode support (kept separate 'cus not always present) */
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@ -184,20 +197,20 @@ struct cgen_fp_ops {
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int (*gttf) (CGEN_FPU*, TF, TF);
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int (*getf) (CGEN_FPU*, TF, TF);
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TF (*extsftf) (CGEN_FPU*, SF);
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TF (*extdftf) (CGEN_FPU*, DF);
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SF (*trunctfsf) (CGEN_FPU*, TF);
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DF (*trunctfdf) (CGEN_FPU*, TF);
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TF (*extsftf) (CGEN_FPU*, int, SF);
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TF (*extdftf) (CGEN_FPU*, int, DF);
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SF (*trunctfsf) (CGEN_FPU*, int, TF);
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DF (*trunctfdf) (CGEN_FPU*, int, TF);
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TF (*floatsitf) (CGEN_FPU*, SI);
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TF (*floatditf) (CGEN_FPU*, DI);
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TF (*ufloatsitf) (CGEN_FPU*, USI);
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TF (*ufloatditf) (CGEN_FPU*, UDI);
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TF (*floatsitf) (CGEN_FPU*, int, SI);
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TF (*floatditf) (CGEN_FPU*, int, DI);
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TF (*ufloatsitf) (CGEN_FPU*, int, USI);
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TF (*ufloatditf) (CGEN_FPU*, int, UDI);
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SI (*fixtfsi) (CGEN_FPU*, TF);
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DI (*fixtfdi) (CGEN_FPU*, TF);
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USI (*ufixtfsi) (CGEN_FPU*, TF);
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UDI (*ufixtfdi) (CGEN_FPU*, TF);
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SI (*fixtfsi) (CGEN_FPU*, int, TF);
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DI (*fixtfdi) (CGEN_FPU*, int, TF);
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USI (*ufixtfsi) (CGEN_FPU*, int, TF);
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UDI (*ufixtfdi) (CGEN_FPU*, int, TF);
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};
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@ -1,3 +1,7 @@
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2010-01-24 Doug Evans <dje@sebabeach.org>
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* sem.c: Regenerate.
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2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
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* configure: Regenerate.
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@ -16643,7 +16643,7 @@ SEM_FN_NAME (frvbf,fitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
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sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
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}
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@ -16664,7 +16664,7 @@ SEM_FN_NAME (frvbf,fstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
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sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
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}
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@ -16685,7 +16685,7 @@ SEM_FN_NAME (frvbf,fitod) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsidf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
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DF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsidf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
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sim_queue_fn_df_write (current_cpu, frvbf_h_fr_double_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr_double", 'f', opval);
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}
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@ -16706,7 +16706,7 @@ SEM_FN_NAME (frvbf,fdtoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR_DOUBLE (FLD (f_FRj)));
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixdfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_DOUBLE (FLD (f_FRj)));
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sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
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}
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@ -16728,12 +16728,12 @@ SEM_FN_NAME (frvbf,fditos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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{
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
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sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
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}
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{
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
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sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
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TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
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}
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@ -16756,12 +16756,12 @@ SEM_FN_NAME (frvbf,fdstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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{
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
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sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
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}
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{
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USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)));
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USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)));
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sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, ADDSI (FLD (f_FRk), 1), opval);
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TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
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}
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@ -16785,13 +16785,13 @@ SEM_FN_NAME (frvbf,nfditos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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frvbf_set_ne_index (current_cpu, FLD (f_FRk));
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{
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
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sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
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TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
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}
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frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1));
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{
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
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SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (ADDSI (FLD (f_FRj), 1)));
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sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
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TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
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}
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@ -16815,13 +16815,13 @@ SEM_FN_NAME (frvbf,nfdstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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frvbf_set_ne_index (current_cpu, FLD (f_FRk));
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{
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SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
|
||||
SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
|
||||
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
|
||||
}
|
||||
frvbf_set_ne_index (current_cpu, ADDSI (FLD (f_FRk), 1));
|
||||
{
|
||||
USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)));
|
||||
USI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)));
|
||||
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, ADDSI (FLD (f_FRk), 1), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
|
||||
}
|
||||
|
|
@ -16844,7 +16844,7 @@ SEM_FN_NAME (frvbf,cfitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
|||
|
||||
if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
|
||||
{
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
|
||||
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
|
||||
written |= (1 << 3);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
|
||||
|
|
@ -16869,7 +16869,7 @@ SEM_FN_NAME (frvbf,cfstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
|||
|
||||
if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) {
|
||||
{
|
||||
SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
|
||||
SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
|
||||
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
|
||||
written |= (1 << 3);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
|
||||
|
|
@ -16895,7 +16895,7 @@ SEM_FN_NAME (frvbf,nfitos) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
|||
{
|
||||
frvbf_set_ne_index (current_cpu, FLD (f_FRk));
|
||||
{
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), GET_H_FR_INT (FLD (f_FRj)));
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->floatsisf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR_INT (FLD (f_FRj)));
|
||||
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
|
||||
}
|
||||
|
|
@ -16919,7 +16919,7 @@ SEM_FN_NAME (frvbf,nfstoi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
|||
{
|
||||
frvbf_set_ne_index (current_cpu, FLD (f_FRk));
|
||||
{
|
||||
SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)));
|
||||
SI opval = CGEN_CPU_FPU (current_cpu)->ops->fixsfsi (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)));
|
||||
sim_queue_fn_si_write (current_cpu, frvbf_h_fr_int_set, FLD (f_FRk), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr_int", 'x', opval);
|
||||
}
|
||||
|
|
@ -18499,12 +18499,12 @@ SEM_FN_NAME (frvbf,fmad) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
|||
|
||||
{
|
||||
{
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)))));
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)))));
|
||||
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
|
||||
}
|
||||
{
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->adddf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
|
||||
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
|
||||
}
|
||||
|
|
@ -18527,12 +18527,12 @@ SEM_FN_NAME (frvbf,fmsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
|||
|
||||
{
|
||||
{
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (FLD (f_FRj)))));
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->muldf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRi))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (FLD (f_FRj)))));
|
||||
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, FLD (f_FRk), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
|
||||
}
|
||||
{
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
|
||||
SF opval = CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CGEN_CPU_FPU (current_cpu)->ops->subdf (CGEN_CPU_FPU (current_cpu), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRi), 1))), CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FR (ADDSI (FLD (f_FRj), 1)))));
|
||||
sim_queue_fn_sf_write (current_cpu, frvbf_h_fr_set, ADDSI (FLD (f_FRk), 1), opval);
|
||||
TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
2010-01-24 Doug Evans <dje@sebabeach.org>
|
||||
|
||||
* cpu.h: Regenerate.
|
||||
|
||||
2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
||||
|
||||
* configure: Regenerate.
|
||||
|
|
|
|||
|
|
@ -88,22 +88,22 @@ CPU (h_cr[(index)]) = (x);\
|
|||
#define SET_H_FR(a1, x) (CPU (h_fr)[a1] = (x))
|
||||
/* Single/Double precision floating point registers */
|
||||
DF h_fsd[16];
|
||||
#define GET_H_FSD(index) ((GET_H_PRBIT ()) ? (GET_H_DRC (index)) : (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), CPU (h_fr[index]))))
|
||||
#define GET_H_FSD(index) ((GET_H_PRBIT ()) ? (GET_H_DRC (index)) : (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, CPU (h_fr[index]))))
|
||||
#define SET_H_FSD(index, x) \
|
||||
do { \
|
||||
if (GET_H_PRBIT ()) {\
|
||||
SET_H_DRC ((index), (x));\
|
||||
} else {\
|
||||
SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), (x)));\
|
||||
SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, (x)));\
|
||||
}\
|
||||
;} while (0)
|
||||
/* floating point registers for fmov */
|
||||
DF h_fmov[16];
|
||||
#define GET_H_FMOV(index) ((NOTBI (GET_H_SZBIT ())) ? (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FRC (index))) : (((((((index) & (1))) == (1))) ? (GET_H_XD (((index) & ((~ (1)))))) : (GET_H_DR (index)))))
|
||||
#define GET_H_FMOV(index) ((NOTBI (GET_H_SZBIT ())) ? (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, GET_H_FRC (index))) : (((((((index) & (1))) == (1))) ? (GET_H_XD (((index) & ((~ (1)))))) : (GET_H_DR (index)))))
|
||||
#define SET_H_FMOV(index, x) \
|
||||
do { \
|
||||
if (NOTBI (GET_H_SZBIT ())) {\
|
||||
SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), (x)));\
|
||||
SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), FPCONV_DEFAULT, (x)));\
|
||||
} else {\
|
||||
if ((((((index)) & (1))) == (1))) {\
|
||||
SET_H_XD ((((index)) & ((~ (1)))), (x));\
|
||||
|
|
|
|||
Loading…
Reference in New Issue