bfd/
* elf32-arm.c (elf32_arm_check_relocs): Don't create PLT entries for R_ARM_ABS12 relocs. (elf32_arm_finish_dynamic_symbol): Fix the loop that creates non-shared VxWorks PLT entries. ld/testsuite/ * ld-arm/vxworks1-lib.dd: Expect "push" instead of stmdb and "pop" instead of ldmia. Don't require specific symbolic addresses for in-text addresses. Expect data to be rendered as .words rather than disassembled. * ld-arm/vxworks1.dd: Likewise.
This commit is contained in:
parent
ef8c95ad21
commit
d3753b85b4
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@ -1,3 +1,10 @@
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2007-05-10 Richard Sandiford <richard@codesourcery.com>
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* elf32-arm.c (elf32_arm_check_relocs): Don't create PLT entries
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for R_ARM_ABS12 relocs.
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(elf32_arm_finish_dynamic_symbol): Fix the loop that creates
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non-shared VxWorks PLT entries.
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2007-05-11 Alan Modra <amodra@bigpond.net.au>
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PR 4454
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@ -8062,7 +8062,8 @@ elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
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if (r_type != R_ARM_ABS32
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&& r_type != R_ARM_REL32
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&& r_type != R_ARM_ABS32_NOI
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&& r_type != R_ARM_REL32_NOI)
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&& r_type != R_ARM_REL32_NOI
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&& r_type != R_ARM_ABS12)
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h->needs_plt = 1;
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/* If we create a PLT entry, this relocation will reference
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@ -9248,7 +9249,7 @@ elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
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unsigned int i;
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bfd_vma val;
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for (i = 0; i != htab->plt_entry_size / 4; i++)
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for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
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{
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val = elf32_arm_vxworks_exec_plt_entry[i];
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if (i == 2)
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@ -1,3 +1,11 @@
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2007-05-10 Richard Sandiford <richard@codesourcery.com>
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* ld-arm/vxworks1-lib.dd: Expect "push" instead of stmdb and
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"pop" instead of ldmia. Don't require specific symbolic addresses
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for in-text addresses. Expect data to be rendered as .words rather
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than disassembled.
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* ld-arm/vxworks1.dd: Likewise.
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2007-05-10 Richard Sandiford <richard@codesourcery.com>
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* ld-elf/multibss1.d, ld-elf/multibss1.s: New test.
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@ -4,35 +4,35 @@
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Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>
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80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <.*>
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80804: e79cf009 ldr pc, \[ip, r9\]
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80808: 0000000c andeq r0, r0, ip
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8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
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80808: 0000000c .word 0x0000000c
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8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <.*>
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80810: e599f008 ldr pc, \[r9, #8\]
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80814: 00000000 andeq r0, r0, r0
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80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
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80814: 00000000 .word 0x00000000
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80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <.*>
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8081c: e79cf009 ldr pc, \[ip, r9\]
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80820: 00000010 andeq r0, r0, r0, lsl r0
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80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <_PROCEDURE_LINKAGE_TABLE_\+0x2c>
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80820: 00000010 .word 0x00000010
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80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <.*>
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80828: e599f008 ldr pc, \[r9, #8\]
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8082c: 0000000c andeq r0, r0, ip
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8082c: 0000000c .word 0x0000000c
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Disassembly of section \.text:
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00080c00 <foo>:
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80c00: e92dc200 stmdb sp!, {r9, lr, pc}
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80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <\.text\+0x30>
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80c00: e92dc200 push {r9, lr, pc}
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80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <.*>
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80c08: e5999000 ldr r9, \[r9\]
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80c0c: e5999000 ldr r9, \[r9\]
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80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <\.text\+0x34>
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80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <.*>
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80c14: e7991000 ldr r1, \[r9, r0\]
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80c18: e2811001 add r1, r1, #1 ; 0x1
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80c1c: e7891000 str r1, \[r9, r0\]
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80c20: eb000004 bl 80c38 <slocal>
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80c24: ebfffefb bl 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
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80c28: ebfffef4 bl 80800 <_PROCEDURE_LINKAGE_TABLE_>
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80c2c: e8bd8200 ldmia sp!, {r9, pc}
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80c30: 00000000 andeq r0, r0, r0
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80c34: 00000014 andeq r0, r0, r4, lsl r0
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80c24: ebfffefb bl 80818 <.*>
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80c28: ebfffef4 bl 80800 <.*>
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80c2c: e8bd8200 pop {r9, pc}
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80c30: 00000000 .word 0x00000000
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80c34: 00000014 .word 0x00000014
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00080c38 <slocal>:
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80c38: e1a0f00e mov pc, lr
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@ -5,32 +5,32 @@ Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: e52dc008 str ip, \[sp, #-8\]!
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80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
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80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <.*>
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80808: e59cf008 ldr pc, \[ip, #8\]
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8080c: 00081400 andeq r1, r8, r0, lsl #8
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8080c: 00081400 .word 0x00081400
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8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_
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80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
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80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <.*>
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80814: e59cf000 ldr pc, \[ip\]
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80818: 0008140c andeq r1, r8, ip, lsl #8
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80818: 0008140c .word 0x0008140c
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80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc
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8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <_PROCEDURE_LINKAGE_TABLE_\+0x24>
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80820: eafffff6 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
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80824: 00000000 andeq r0, r0, r0
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80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <_PROCEDURE_LINKAGE_TABLE_\+0x30>
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8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <.*>
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80820: eafffff6 b 80800 <.*>
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80824: 00000000 .word 0x00000000
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80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <.*>
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8082c: e59cf000 ldr pc, \[ip\]
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80830: 00081410 andeq r1, r8, r0, lsl r4
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80830: 00081410 .word 0x00081410
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80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10
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80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <_PROCEDURE_LINKAGE_TABLE_\+0x3c>
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80838: eafffff0 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
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8083c: 0000000c andeq r0, r0, ip
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80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <.*>
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80838: eafffff0 b 80800 <.*>
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8083c: 0000000c .word 0x0000000c
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Disassembly of section \.text:
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00080c00 <_start>:
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80c00: ebffff08 bl 80428 <_PROCEDURE_LINKAGE_TABLE_-0x3d8>
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80c00: ebffff08 bl 80428 <.*>
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80c00: R_ARM_PC24 \.plt\+0x20
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80c04: eb000000 bl 80c14 <sexternal\+0x8>
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80c04: R_ARM_PC24 sexternal\+0xfffffff8
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80c08: eaffff00 b 80408 <_PROCEDURE_LINKAGE_TABLE_-0x3f8>
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80c08: eaffff00 b 80408 <.*>
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80c08: R_ARM_PC24 \.plt\+0x8
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00080c0c <sexternal>:
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